diff options
Diffstat (limited to 'test/640-checker-simd/src/SimdLong.java')
| -rw-r--r-- | test/640-checker-simd/src/SimdLong.java | 25 |
1 files changed, 10 insertions, 15 deletions
diff --git a/test/640-checker-simd/src/SimdLong.java b/test/640-checker-simd/src/SimdLong.java index 59ce2bc877..c914b69be7 100644 --- a/test/640-checker-simd/src/SimdLong.java +++ b/test/640-checker-simd/src/SimdLong.java @@ -29,7 +29,7 @@ public class SimdLong { /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM64,MIPS64}: void SimdLong.add(long) loop_optimization (after) + /// CHECK-START-ARM64: void SimdLong.add(long) loop_optimization (after) /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecAdd loop:<<Loop>> outer_loop:none /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none @@ -42,7 +42,7 @@ public class SimdLong { /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM64,MIPS64}: void SimdLong.sub(long) loop_optimization (after) + /// CHECK-START-ARM64: void SimdLong.sub(long) loop_optimization (after) /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecSub loop:<<Loop>> outer_loop:none /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none @@ -59,11 +59,6 @@ public class SimdLong { // /// CHECK-START-ARM64: void SimdLong.mul(long) loop_optimization (after) /// CHECK-NOT: VecMul - // - /// CHECK-START-MIPS64: void SimdLong.mul(long) loop_optimization (after) - /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none - /// CHECK-DAG: VecMul loop:<<Loop>> outer_loop:none - /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none static void mul(long x) { for (int i = 0; i < 128; i++) a[i] *= x; @@ -87,7 +82,7 @@ public class SimdLong { /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM64,MIPS64}: void SimdLong.neg() loop_optimization (after) + /// CHECK-START-ARM64: void SimdLong.neg() loop_optimization (after) /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecNeg loop:<<Loop>> outer_loop:none /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none @@ -100,7 +95,7 @@ public class SimdLong { /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM64,MIPS64}: void SimdLong.not() loop_optimization (after) + /// CHECK-START-ARM64: void SimdLong.not() loop_optimization (after) /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecNot loop:<<Loop>> outer_loop:none /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none @@ -113,7 +108,7 @@ public class SimdLong { /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM64,MIPS64}: void SimdLong.shl4() loop_optimization (after) + /// CHECK-START-ARM64: void SimdLong.shl4() loop_optimization (after) /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecShl loop:<<Loop>> outer_loop:none /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none @@ -126,7 +121,7 @@ public class SimdLong { /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM64,MIPS64}: void SimdLong.sar2() loop_optimization (after) + /// CHECK-START-ARM64: void SimdLong.sar2() loop_optimization (after) /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecShr loop:<<Loop>> outer_loop:none /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none @@ -139,7 +134,7 @@ public class SimdLong { /// CHECK-DAG: ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM64,MIPS64}: void SimdLong.shr2() loop_optimization (after) + /// CHECK-START-ARM64: void SimdLong.shr2() loop_optimization (after) /// CHECK-DAG: VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecUShr loop:<<Loop>> outer_loop:none /// CHECK-DAG: VecStore loop:<<Loop>> outer_loop:none @@ -167,7 +162,7 @@ public class SimdLong { /// CHECK-DAG: <<Get:j\d+>> ArrayGet loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: ArraySet [{{l\d+}},{{i\d+}},<<Get>>] loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM64,MIPS64}: void SimdLong.shr64() loop_optimization (after) + /// CHECK-START-ARM64: void SimdLong.shr64() loop_optimization (after) /// CHECK-DAG: <<Get:d\d+>> VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: VecStore [{{l\d+}},{{i\d+}},<<Get>>] loop:<<Loop>> outer_loop:none static void shr64() { @@ -188,7 +183,7 @@ public class SimdLong { /// CHECK-DAG: <<UShr:j\d+>> UShr [<<Get>>,<<Dist>>] loop:<<Loop>> outer_loop:none /// CHECK-DAG: ArraySet [{{l\d+}},{{i\d+}},<<UShr>>] loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM64,MIPS64}: void SimdLong.shr65() loop_optimization (after) + /// CHECK-START-ARM64: void SimdLong.shr65() loop_optimization (after) /// CHECK-DAG: <<Dist:i\d+>> IntConstant 1 loop:none /// CHECK-DAG: <<Get:d\d+>> VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: <<UShr:d\d+>> VecUShr [<<Get>>,<<Dist>>] loop:<<Loop>> outer_loop:none @@ -210,7 +205,7 @@ public class SimdLong { /// CHECK-DAG: <<UShr:j\d+>> UShr [<<Get>>,<<Dist>>] loop:<<Loop>> outer_loop:none /// CHECK-DAG: ArraySet [{{l\d+}},{{i\d+}},<<UShr>>] loop:<<Loop>> outer_loop:none // - /// CHECK-START-{ARM64,MIPS64}: void SimdLong.shrMinus254() loop_optimization (after) + /// CHECK-START-ARM64: void SimdLong.shrMinus254() loop_optimization (after) /// CHECK-DAG: <<Dist:i\d+>> IntConstant 2 loop:none /// CHECK-DAG: <<Get:d\d+>> VecLoad loop:<<Loop:B\d+>> outer_loop:none /// CHECK-DAG: <<UShr:d\d+>> VecUShr [<<Get>>,<<Dist>>] loop:<<Loop>> outer_loop:none |