diff options
Diffstat (limited to 'src')
| -rw-r--r-- | src/compiler/CompilerIR.h | 2 | ||||
| -rw-r--r-- | src/compiler/IntermediateRep.cc | 46 | ||||
| -rw-r--r-- | src/compiler/codegen/GenCommon.cc | 2 | ||||
| -rw-r--r-- | src/compiler/codegen/arm/Assemble.cc | 2 | ||||
| -rw-r--r-- | src/compiler/codegen/arm/Thumb2/Factory.cc | 13 | ||||
| -rw-r--r-- | src/compiler/codegen/arm/Thumb2/Gen.cc | 2 | ||||
| -rw-r--r-- | src/compiler/codegen/mips/Assemble.cc | 4 | ||||
| -rw-r--r-- | src/compiler/codegen/mips/Mips32/Factory.cc | 15 |
8 files changed, 59 insertions, 27 deletions
diff --git a/src/compiler/CompilerIR.h b/src/compiler/CompilerIR.h index 953e3b11d8..6bda52220c 100644 --- a/src/compiler/CompilerIR.h +++ b/src/compiler/CompilerIR.h @@ -449,6 +449,8 @@ typedef enum OpKind { kOpInvalid, } OpKind; +std::ostream& operator<<(std::ostream& os, const OpKind& kind); + typedef enum ConditionCode { kCondEq, kCondNe, diff --git a/src/compiler/IntermediateRep.cc b/src/compiler/IntermediateRep.cc index 1567fccf1a..662687777d 100644 --- a/src/compiler/IntermediateRep.cc +++ b/src/compiler/IntermediateRep.cc @@ -19,6 +19,52 @@ namespace art { +static const char* gOpKindNames[kOpInvalid + 1] = { + "OpMov", + "OpMvn", + "OpCmp", + "OpLsl", + "OpLsr", + "OpAsr", + "OpRor", + "OpNot", + "OpAnd", + "OpOr", + "OpXor", + "OpNeg", + "OpAdd", + "OpAdc", + "OpSub", + "OpSbc", + "OpRsub", + "OpMul", + "OpDiv", + "OpRem", + "OpBic", + "OpCmn", + "OpTst", + "OpBkpt", + "OpBlx", + "OpPush", + "OpPop", + "Op2Char", + "Op2Short", + "Op2Byte", + "OpCondBr", + "OpUncondBr", + "OpBx", + "OpInvalid", +}; + +std::ostream& operator<<(std::ostream& os, const OpKind& kind) { + if (kind >= kOpMov && kind <= kOpInvalid) { + os << gOpKindNames[kind]; + } else { + os << "Unknown Op " << static_cast<int>(kind); + } + return os; +} + /* Allocate a new basic block */ BasicBlock* oatNewBB(CompilationUnit* cUnit, BBType blockType, int blockId) { diff --git a/src/compiler/codegen/GenCommon.cc b/src/compiler/codegen/GenCommon.cc index 3d46240df6..c43d8ff2a4 100644 --- a/src/compiler/codegen/GenCommon.cc +++ b/src/compiler/codegen/GenCommon.cc @@ -47,7 +47,7 @@ void genBarrier(CompilationUnit* cUnit) /* Generate unconditional branch instructions */ LIR* opUnconditionalBranch(CompilationUnit* cUnit, LIR* target) { - LIR* branch = opNone(cUnit, kOpUncondBr); + LIR* branch = opBranchUnconditional(cUnit, kOpUncondBr); branch->target = (LIR*) target; return branch; } diff --git a/src/compiler/codegen/arm/Assemble.cc b/src/compiler/codegen/arm/Assemble.cc index 2c13107ce7..2a89b6aca7 100644 --- a/src/compiler/codegen/arm/Assemble.cc +++ b/src/compiler/codegen/arm/Assemble.cc @@ -147,7 +147,7 @@ const ArmEncodingMap EncodingMap[kArmLast] = { NEEDS_FIXUP, "b!1c", "!0t", 2), ENCODING_MAP(kThumbBUncond, 0xe000, kFmtBitBlt, 10, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1, - kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH | NEEDS_FIXUP, + kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | NEEDS_FIXUP, "b", "!0t", 2), ENCODING_MAP(kThumbBicRR, 0x4380, kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1, diff --git a/src/compiler/codegen/arm/Thumb2/Factory.cc b/src/compiler/codegen/arm/Thumb2/Factory.cc index 1810573daa..ad6e40d608 100644 --- a/src/compiler/codegen/arm/Thumb2/Factory.cc +++ b/src/compiler/codegen/arm/Thumb2/Factory.cc @@ -188,17 +188,10 @@ LIR* loadConstantNoClobber(CompilationUnit* cUnit, int rDest, int value) return res; } -LIR* opNone(CompilationUnit* cUnit, OpKind op) +LIR* opBranchUnconditional(CompilationUnit* cUnit, OpKind op) { - ArmOpcode opcode = kThumbBkpt; - switch (op) { - case kOpUncondBr: - opcode = kThumbBUncond; - break; - default: - LOG(FATAL) << "Bad opcode " << (int)op; - } - return newLIR0(cUnit, opcode); + DCHECK_EQ(op, kOpUncondBr); + return newLIR1(cUnit, kThumbBUncond, 0 /* offset to be patched */); } LIR* opCondBranch(CompilationUnit* cUnit, ConditionCode cc, LIR* target) diff --git a/src/compiler/codegen/arm/Thumb2/Gen.cc b/src/compiler/codegen/arm/Thumb2/Gen.cc index 557e87b470..20124f9d05 100644 --- a/src/compiler/codegen/arm/Thumb2/Gen.cc +++ b/src/compiler/codegen/arm/Thumb2/Gen.cc @@ -326,7 +326,7 @@ void genMonitorExit(CompilationUnit* cUnit, MIR* mir, RegLocation rlSrc) hopBranch = opCondBranch(cUnit, kCondNe, NULL); oatGenMemBarrier(cUnit, kSY); storeWordDisp(cUnit, r0, Object::MonitorOffset().Int32Value(), r3); - branch = opNone(cUnit, kOpUncondBr); + branch = opBranchUnconditional(cUnit, kOpUncondBr); hopTarget = newLIR0(cUnit, kPseudoTargetLabel); hopBranch->target = (LIR*)hopTarget; diff --git a/src/compiler/codegen/mips/Assemble.cc b/src/compiler/codegen/mips/Assemble.cc index b487602701..359ec428d2 100644 --- a/src/compiler/codegen/mips/Assemble.cc +++ b/src/compiler/codegen/mips/Assemble.cc @@ -106,11 +106,11 @@ MipsEncodingMap EncodingMap[kMipsLast] = { "andi", "!0r,!1r,0x!2h(!2d)", 4), ENCODING_MAP(kMipsB, 0x10000000, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1, - kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH | NEEDS_FIXUP, + kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | NEEDS_FIXUP, "b", "!0t!0N", 8), ENCODING_MAP(kMipsBal, 0x04110000, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1, - kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH | REG_DEF_LR | + kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_DEF_LR | NEEDS_FIXUP, "bal", "!0t!0N", 8), ENCODING_MAP(kMipsBeq, 0x10000000, kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0, diff --git a/src/compiler/codegen/mips/Mips32/Factory.cc b/src/compiler/codegen/mips/Mips32/Factory.cc index 360fbb7c0f..286871054a 100644 --- a/src/compiler/codegen/mips/Mips32/Factory.cc +++ b/src/compiler/codegen/mips/Mips32/Factory.cc @@ -127,19 +127,10 @@ LIR *loadConstantNoClobber(CompilationUnit *cUnit, int rDest, return res; } -LIR *opNone(CompilationUnit *cUnit, OpKind op) +LIR *opBranchUnconditional(CompilationUnit *cUnit, OpKind op) { - LIR *res; - MipsOpCode opcode = kMipsNop; - switch (op) { - case kOpUncondBr: - opcode = kMipsB; - break; - default: - LOG(FATAL) << "Bad case in opNone"; - } - res = newLIR0(cUnit, opcode); - return res; + DCHECK_EQ(op, kOpUncondBr); + return newLIR1(cUnit, kMipsB, 0 /* offset to be patched */ ); } LIR *loadMultiple(CompilationUnit *cUnit, int rBase, int rMask); |