diff options
Diffstat (limited to 'src/compiler/codegen')
| -rw-r--r-- | src/compiler/codegen/CodegenUtil.cc | 3 | ||||
| -rw-r--r-- | src/compiler/codegen/x86/X86/Factory.cc | 2 |
2 files changed, 3 insertions, 2 deletions
diff --git a/src/compiler/codegen/CodegenUtil.cc b/src/compiler/codegen/CodegenUtil.cc index 428b4432f2..a33a1627f4 100644 --- a/src/compiler/codegen/CodegenUtil.cc +++ b/src/compiler/codegen/CodegenUtil.cc @@ -74,14 +74,15 @@ inline u8 getRegMaskCommon(int reg) { u8 seed; int shift; - int regId = reg & 0x1f; #if defined(TARGET_X86) + int regId = reg & 0xf; /* * Double registers in x86 are just a single FP register */ seed = 1; #else + int regId = reg & 0x1f; /* * Each double register is equal to a pair of single-precision FP registers */ diff --git a/src/compiler/codegen/x86/X86/Factory.cc b/src/compiler/codegen/x86/X86/Factory.cc index f77a793cde..e88f7dc7a7 100644 --- a/src/compiler/codegen/x86/X86/Factory.cc +++ b/src/compiler/codegen/x86/X86/Factory.cc @@ -299,7 +299,7 @@ LIR* opRegRegImm(CompilationUnit *cUnit, OpKind op, int rDest, int rSrc, X86OpCode opcode = IS_SIMM8(value) ? kX86Imul32RRI8 : kX86Imul32RRI; return newLIR3(cUnit, opcode, rDest, rSrc, value); } else if (op == kOpAnd) { - if (value == 0xFF && rDest < 4) { + if (value == 0xFF && rSrc < 4) { return newLIR2(cUnit, kX86Movzx8RR, rDest, rSrc); } else if (value == 0xFFFF) { return newLIR2(cUnit, kX86Movzx16RR, rDest, rSrc); |