diff options
Diffstat (limited to 'src/compiler/codegen/codegen.h')
| -rw-r--r-- | src/compiler/codegen/codegen.h | 34 |
1 files changed, 17 insertions, 17 deletions
diff --git a/src/compiler/codegen/codegen.h b/src/compiler/codegen/codegen.h index 901e5da6bb..089c61c97e 100644 --- a/src/compiler/codegen/codegen.h +++ b/src/compiler/codegen/codegen.h @@ -136,15 +136,15 @@ class Codegen { void GenCheckCast(CompilationUnit* cu, uint32_t type_idx, RegLocation rl_src); void GenLong3Addr(CompilationUnit* cu, OpKind first_op, OpKind second_op, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2); - bool GenShiftOpLong(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, + void GenShiftOpLong(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_shift); - bool GenArithOpInt(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, + void GenArithOpInt(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2); - bool GenArithOpIntLit(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, + void GenArithOpIntLit(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src, int lit); - bool GenArithOpLong(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, + void GenArithOpLong(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2); - bool GenConversionCall(CompilationUnit* cu, int func_offset, RegLocation rl_dest, + void GenConversionCall(CompilationUnit* cu, int func_offset, RegLocation rl_dest, RegLocation rl_src); void GenSuspendTest(CompilationUnit* cu, int opt_flags); void GenSuspendTestAndBranch(CompilationUnit* cu, int opt_flags, LIR* target); @@ -288,32 +288,32 @@ class Codegen { virtual bool IsUnconditionalBranch(LIR* lir) = 0; // Required for target - Dalvik-level generators. - virtual bool GenArithImmOpLong(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, + virtual void GenArithImmOpLong(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) = 0; virtual void GenMulLong(CompilationUnit* cu, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) = 0; - virtual bool GenAddLong(CompilationUnit* cu, RegLocation rl_dest, RegLocation rl_src1, + virtual void GenAddLong(CompilationUnit* cu, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) = 0; - virtual bool GenAndLong(CompilationUnit* cu, RegLocation rl_dest, RegLocation rl_src1, + virtual void GenAndLong(CompilationUnit* cu, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) = 0; - virtual bool GenArithOpDouble(CompilationUnit* cu, Instruction::Code opcode, + virtual void GenArithOpDouble(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) = 0; - virtual bool GenArithOpFloat(CompilationUnit *cu, Instruction::Code opcode, RegLocation rl_dest, + virtual void GenArithOpFloat(CompilationUnit *cu, Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) = 0; - virtual bool GenCmpFP(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, + virtual void GenCmpFP(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) = 0; - virtual bool GenConversion(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, + virtual void GenConversion(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src) = 0; virtual bool GenInlinedCas32(CompilationUnit* cu, CallInfo* info, bool need_write_barrier) = 0; virtual bool GenInlinedMinMaxInt(CompilationUnit *cu, CallInfo* info, bool is_min) = 0; virtual bool GenInlinedSqrt(CompilationUnit* cu, CallInfo* info) = 0; - virtual bool GenNegLong(CompilationUnit* cu, RegLocation rl_dest, RegLocation rl_src) = 0; - virtual bool GenOrLong(CompilationUnit* cu, RegLocation rl_dest, RegLocation rl_src1, + virtual void GenNegLong(CompilationUnit* cu, RegLocation rl_dest, RegLocation rl_src) = 0; + virtual void GenOrLong(CompilationUnit* cu, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) = 0; - virtual bool GenSubLong(CompilationUnit* cu, RegLocation rl_dest, RegLocation rl_src1, + virtual void GenSubLong(CompilationUnit* cu, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) = 0; - virtual bool GenXorLong(CompilationUnit* cu, RegLocation rl_dest, RegLocation rl_src1, + virtual void GenXorLong(CompilationUnit* cu, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_src2) = 0; virtual LIR* GenRegMemCheck(CompilationUnit* cu, ConditionCode c_code, int reg1, int base, int offset, ThrowKind kind) = 0; @@ -353,7 +353,7 @@ class Codegen { RegLocation rl_index, RegLocation rl_dest, int scale) = 0; virtual void GenArrayPut(CompilationUnit* cu, int opt_flags, OpSize size, RegLocation rl_array, RegLocation rl_index, RegLocation rl_src, int scale) = 0; - virtual bool GenShiftImmOpLong(CompilationUnit* cu, Instruction::Code opcode, + virtual void GenShiftImmOpLong(CompilationUnit* cu, Instruction::Code opcode, RegLocation rl_dest, RegLocation rl_src1, RegLocation rl_shift) = 0; |