5 files changed, 8 insertions, 8 deletions
diff --git a/src/compiler/codegen/arm/ArchUtility.cc b/src/compiler/codegen/arm/ArchUtility.cc
index be6b44de71..4346bda058 100644
--- a/src/compiler/codegen/arm/ArchUtility.cc
+++ b/src/compiler/codegen/arm/ArchUtility.cc
@@ -25,7 +25,7 @@ namespace art {
 ArmConditionCode oatArmConditionEncoding(ConditionCode code)
 {
     ArmConditionCode res;
-    switch(code) {
+    switch (code) {
         case kCondEq: res = kArmCondEq; break;
         case kCondNe: res = kArmCondNe; break;
         case kCondCs: res = kArmCondCs; break;
@@ -113,7 +113,7 @@ int expandImmediate(int value)
 {
     int mode = (value & 0xf00) >> 8;
     u4 bits = value & 0xff;
-    switch(mode) {
+    switch (mode) {
         case 0:
             return bits;
        case 1:
@@ -156,7 +156,7 @@ std::string buildInsnString(const char* fmt, LIR* lir,
                DCHECK_LT(fmt, fmtEnd);
                DCHECK_LT((unsigned)(nc-'0'), 4U);
                operand = lir->operands[nc-'0'];
-               switch(*fmt++) {
+               switch (*fmt++) {
                    case 'H':
                        if (operand != 0) {
                            sprintf(tbuf, ", %s %d",shiftNames[operand & 0x3],
diff --git a/src/compiler/codegen/arm/Assemble.cc b/src/compiler/codegen/arm/Assemble.cc
index 8901bf3f54..1b7dc2946b 100644
--- a/src/compiler/codegen/arm/Assemble.cc
+++ b/src/compiler/codegen/arm/Assemble.cc
@@ -1256,7 +1256,7 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
             u4 operand;
             u4 value;
             operand = lir->operands[i];
-            switch(encoder->fieldLoc[i].kind) {
+            switch (encoder->fieldLoc[i].kind) {
                 case kFmtUnused:
                     break;
                 case kFmtFPImm:
diff --git a/src/compiler/codegen/arm/FP/Thumb2VFP.cc b/src/compiler/codegen/arm/FP/Thumb2VFP.cc
index 7f372aa7ab..72b4fec39c 100644
--- a/src/compiler/codegen/arm/FP/Thumb2VFP.cc
+++ b/src/compiler/codegen/arm/FP/Thumb2VFP.cc
@@ -189,7 +189,7 @@ bool genCmpFP(CompilationUnit* cUnit, MIR* mir, RegLocation rlDest,
     int defaultResult;
     RegLocation rlResult;
 
-    switch(mir->dalvikInsn.opcode) {
+    switch (mir->dalvikInsn.opcode) {
         case Instruction::CMPL_FLOAT:
             isDouble = false;
             defaultResult = -1;
diff --git a/src/compiler/codegen/arm/Thumb2/Factory.cc b/src/compiler/codegen/arm/Thumb2/Factory.cc
index 11d5bf4c96..e065a2f981 100644
--- a/src/compiler/codegen/arm/Thumb2/Factory.cc
+++ b/src/compiler/codegen/arm/Thumb2/Factory.cc
@@ -418,7 +418,7 @@ LIR* opRegRegImm(CompilationUnit* cUnit, OpKind op, int rDest, int rSrc1,
     int modImm = modifiedImmediate(value);
     int modImmNeg = modifiedImmediate(-value);
 
-    switch(op) {
+    switch (op) {
         case kOpLsl:
             if (allLowRegs)
                 return newLIR3(cUnit, kThumbLslRRI5, rDest, rSrc1, value);
diff --git a/src/compiler/codegen/arm/Thumb2/Gen.cc b/src/compiler/codegen/arm/Thumb2/Gen.cc
index 1938960b30..d5a4efc36d 100644
--- a/src/compiler/codegen/arm/Thumb2/Gen.cc
+++ b/src/compiler/codegen/arm/Thumb2/Gen.cc
@@ -251,7 +251,7 @@ void genSpecialCase(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir,
 {
    cUnit->currentDalvikOffset = mir->offset;
    MIR* nextMir = NULL;
-   switch(specialCase) {
+   switch (specialCase) {
        case kNullMethod:
            DCHECK(mir->dalvikInsn.opcode == Instruction::RETURN_VOID);
            nextMir = mir;
@@ -341,7 +341,7 @@ LIR* opIT(CompilationUnit* cUnit, ArmConditionCode code, const char* guide)
     int mask1 = 0;
 
     //Note: case fallthroughs intentional
-    switch(strlen(guide)) {
+    switch (strlen(guide)) {
         case 3:
             mask1 = (guide[2] == 'T') ? condBit : altBit;
         case 2: