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-rw-r--r--runtime/dex_instruction.cc256
1 files changed, 1 insertions, 255 deletions
diff --git a/runtime/dex_instruction.cc b/runtime/dex_instruction.cc
index 754624538d..0494f22886 100644
--- a/runtime/dex_instruction.cc
+++ b/runtime/dex_instruction.cc
@@ -70,121 +70,6 @@ int const Instruction::kInstructionSizeInCodeUnits[] = {
#undef INSTRUCTION_SIZE
};
-/*
- * Handy macros for helping decode instructions.
- */
-#define FETCH(_offset) (insns[(_offset)])
-#define FETCH_uint32(_offset) (fetch_uint32_impl((_offset), insns))
-#define INST_A(_insn) (((uint16_t)(_insn) >> 8) & 0x0f)
-#define INST_B(_insn) ((uint16_t)(_insn) >> 12)
-#define INST_AA(_insn) ((_insn) >> 8)
-
-/* Helper for FETCH_uint32, above. */
-static inline uint32_t fetch_uint32_impl(uint32_t offset, const uint16_t* insns) {
- return insns[offset] | ((uint32_t) insns[offset+1] << 16);
-}
-
-
-bool Instruction::HasVRegC() const {
- switch (FormatOf(Opcode())) {
- case k23x: return true;
- case k35c: return true;
- case k3rc: return true;
- default: return false;
- }
-}
-
-bool Instruction::HasVRegB() const {
- switch (FormatOf(Opcode())) {
- case k12x: return true;
- case k22b: return true;
- case k22c: return true;
- case k22s: return true;
- case k22t: return true;
- case k22x: return true;
- case k23x: return true;
- case k32x: return true;
- default: return false;
- }
-}
-
-bool Instruction::HasVRegA() const {
- switch (FormatOf(Opcode())) {
- case k11n: return true;
- case k11x: return true;
- case k12x: return true;
- case k21c: return true;
- case k21h: return true;
- case k21s: return true;
- case k21t: return true;
- case k22b: return true;
- case k22c: return true;
- case k22s: return true;
- case k22t: return true;
- case k22x: return true;
- case k23x: return true;
- case k31c: return true;
- case k31i: return true;
- case k31t: return true;
- case k32x: return true;
- case k51l: return true;
- default: return false;
- }
-}
-
-int32_t Instruction::VRegC() const {
- switch (FormatOf(Opcode())) {
- case k23x: return VRegC_23x();
- case k35c: return VRegC_35c();
- case k3rc: return VRegC_3rc();
- default: LOG(FATAL) << "Tried to access vC of instruction " << Name() <<
- " which has no C operand.";
- }
- return -1;
-}
-
-int32_t Instruction::VRegB() const {
- switch (FormatOf(Opcode())) {
- case k12x: return VRegB_12x();
- case k22b: return VRegB_22b();
- case k22c: return VRegB_22c();
- case k22s: return VRegB_22s();
- case k22t: return VRegB_22t();
- case k22x: return VRegB_22x();
- case k23x: return VRegB_23x();
- case k32x: return VRegB_32x();
- default: LOG(FATAL) << "Tried to access vB of instruction " << Name() <<
- " which has no B operand.";
- }
- return -1;
-}
-
-int32_t Instruction::VRegA() const {
- switch (FormatOf(Opcode())) {
- case k11n: return VRegA_11n();
- case k11x: return VRegA_11x();
- case k12x: return VRegA_12x();
- case k21c: return VRegA_21c();
- case k21h: return VRegA_21h();
- case k21s: return VRegA_21s();
- case k21t: return VRegA_21t();
- case k22b: return VRegA_22b();
- case k22c: return VRegA_22c();
- case k22s: return VRegA_22s();
- case k22t: return VRegA_22t();
- case k22x: return VRegA_22x();
- case k23x: return VRegA_23x();
- case k31c: return VRegA_31c();
- case k31i: return VRegA_31i();
- case k31t: return VRegA_31t();
- case k32x: return VRegA_32x();
- case k51l: return VRegA_51l();
- default: LOG(FATAL) << "Tried to access vA of instruction " << Name() <<
- " which has no A operand.";
- }
- return -1;
-}
-
int32_t Instruction::GetTargetOffset() const {
switch (FormatOf(Opcode())) {
// Cases for conditional branches follow.
@@ -207,145 +92,6 @@ bool Instruction::CanFlowThrough() const {
return FlagsOf(opcode) & Instruction::kContinue;
}
-void Instruction::Decode(uint32_t &vA, uint32_t &vB, uint64_t &vB_wide, uint32_t &vC, uint32_t arg[]) const {
- const uint16_t* insns = reinterpret_cast<const uint16_t*>(this);
- uint16_t insn = *insns;
- Code opcode = static_cast<Code>(insn & 0xFF);
-
- switch (FormatOf(opcode)) {
- case k10x: // op
- /* nothing to do; copy the AA bits out for the verifier */
- vA = INST_AA(insn);
- break;
- case k12x: // op vA, vB
- vA = INST_A(insn);
- vB = INST_B(insn);
- break;
- case k11n: // op vA, #+B
- vA = INST_A(insn);
- vB = (int32_t) (INST_B(insn) << 28) >> 28; // sign extend 4-bit value
- break;
- case k11x: // op vAA
- vA = INST_AA(insn);
- break;
- case k10t: // op +AA
- vA = (int8_t) INST_AA(insn); // sign-extend 8-bit value
- break;
- case k20t: // op +AAAA
- vA = (int16_t) FETCH(1); // sign-extend 16-bit value
- break;
- case k21c: // op vAA, thing@BBBB
- case k22x: // op vAA, vBBBB
- vA = INST_AA(insn);
- vB = FETCH(1);
- break;
- case k21s: // op vAA, #+BBBB
- case k21t: // op vAA, +BBBB
- vA = INST_AA(insn);
- vB = (int16_t) FETCH(1); // sign-extend 16-bit value
- break;
- case k21h: // op vAA, #+BBBB0000[00000000]
- vA = INST_AA(insn);
- /*
- * The value should be treated as right-zero-extended, but we don't
- * actually do that here. Among other things, we don't know if it's
- * the top bits of a 32- or 64-bit value.
- */
- vB = FETCH(1);
- break;
- case k23x: // op vAA, vBB, vCC
- vA = INST_AA(insn);
- vB = FETCH(1) & 0xff;
- vC = FETCH(1) >> 8;
- break;
- case k22b: // op vAA, vBB, #+CC
- vA = INST_AA(insn);
- vB = FETCH(1) & 0xff;
- vC = (int8_t) (FETCH(1) >> 8); // sign-extend 8-bit value
- break;
- case k22s: // op vA, vB, #+CCCC
- case k22t: // op vA, vB, +CCCC
- vA = INST_A(insn);
- vB = INST_B(insn);
- vC = (int16_t) FETCH(1); // sign-extend 16-bit value
- break;
- case k22c: // op vA, vB, thing@CCCC
- vA = INST_A(insn);
- vB = INST_B(insn);
- vC = FETCH(1);
- break;
- case k30t: // op +AAAAAAAA
- vA = FETCH_uint32(1); // signed 32-bit value
- break;
- case k31t: // op vAA, +BBBBBBBB
- case k31c: // op vAA, string@BBBBBBBB
- vA = INST_AA(insn);
- vB = FETCH_uint32(1); // 32-bit value
- break;
- case k32x: // op vAAAA, vBBBB
- vA = FETCH(1);
- vB = FETCH(2);
- break;
- case k31i: // op vAA, #+BBBBBBBB
- vA = INST_AA(insn);
- vB = FETCH_uint32(1); // signed 32-bit value
- break;
- case k35c: // op {vC, vD, vE, vF, vG}, thing@BBBB
- {
- /*
- * Note that the fields mentioned in the spec don't appear in
- * their "usual" positions here compared to most formats. This
- * was done so that the field names for the argument count and
- * reference index match between this format and the corresponding
- * range formats (3rc and friends).
- *
- * Bottom line: The argument count is always in vA, and the
- * method constant (or equivalent) is always in vB.
- */
- uint16_t regList;
- int count;
-
- vA = INST_B(insn); // This is labeled A in the spec.
- vB = FETCH(1);
- regList = FETCH(2);
-
- count = vA;
-
- /*
- * Copy the argument registers into the arg[] array, and
- * also copy the first argument (if any) into vC. (The
- * DecodedInstruction structure doesn't have separate
- * fields for {vD, vE, vF, vG}, so there's no need to make
- * copies of those.) Note that cases 5..2 fall through.
- */
- switch (count) {
- case 5: arg[4] = INST_A(insn);
- case 4: arg[3] = (regList >> 12) & 0x0f;
- case 3: arg[2] = (regList >> 8) & 0x0f;
- case 2: arg[1] = (regList >> 4) & 0x0f;
- case 1: vC = arg[0] = regList & 0x0f; break;
- case 0: break; // Valid, but no need to do anything.
- default:
- LOG(ERROR) << "Invalid arg count in 35c (" << count << ")";
- return;
- }
- }
- break;
- case k3rc: // op {vCCCC .. v(CCCC+AA-1)}, meth@BBBB
- vA = INST_AA(insn);
- vB = FETCH(1);
- vC = FETCH(2);
- break;
- case k51l: // op vAA, #+BBBBBBBBBBBBBBBB
- vA = INST_AA(insn);
- vB_wide = FETCH_uint32(1) | ((uint64_t) FETCH_uint32(3) << 32);
- break;
- default:
- LOG(ERROR) << "Can't decode unexpected format " << FormatOf(opcode) << " (op=" << opcode << ")";
- return;
- }
-}
-
size_t Instruction::SizeInCodeUnitsComplexOpcode() const {
const uint16_t* insns = reinterpret_cast<const uint16_t*>(this);
// Handle special NOP encoded variable length sequences.
@@ -549,7 +295,7 @@ std::string Instruction::DumpString(const DexFile* file) const {
break;
case k35c: {
uint32_t arg[5];
- GetArgs(arg);
+ GetVarArgs(arg);
switch (Opcode()) {
case FILLED_NEW_ARRAY:
{
generated by cgit v1.2.3-59-g8ed1b (git 2.39.0) at 2025-11-03 11:44:09 +0000