diff options
Diffstat (limited to 'runtime/arch/mips/context_mips.cc')
-rw-r--r-- | runtime/arch/mips/context_mips.cc | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/runtime/arch/mips/context_mips.cc b/runtime/arch/mips/context_mips.cc index dba62d9200..4dedb3339e 100644 --- a/runtime/arch/mips/context_mips.cc +++ b/runtime/arch/mips/context_mips.cc @@ -16,7 +16,6 @@ #include "context_mips.h" -#include "art_method-inl.h" #include "base/bit_utils.h" #include "quick/quick_method_frame_info.h" @@ -37,21 +36,19 @@ void MipsContext::Reset() { arg0_ = 0; } -void MipsContext::FillCalleeSaves(const StackVisitor& fr) { - ArtCode code = fr.GetCurrentCode(); - const QuickMethodFrameInfo frame_info = code.GetQuickFrameInfo(); +void MipsContext::FillCalleeSaves(uint8_t* frame, const QuickMethodFrameInfo& frame_info) { int spill_pos = 0; // Core registers come first, from the highest down to the lowest. for (uint32_t core_reg : HighToLowBits(frame_info.CoreSpillMask())) { - gprs_[core_reg] = fr.CalleeSaveAddress(spill_pos, frame_info.FrameSizeInBytes()); + gprs_[core_reg] = CalleeSaveAddress(frame, spill_pos, frame_info.FrameSizeInBytes()); ++spill_pos; } DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask())); // FP registers come second, from the highest down to the lowest. for (uint32_t fp_reg : HighToLowBits(frame_info.FpSpillMask())) { - fprs_[fp_reg] = fr.CalleeSaveAddress(spill_pos, frame_info.FrameSizeInBytes()); + fprs_[fp_reg] = CalleeSaveAddress(frame, spill_pos, frame_info.FrameSizeInBytes()); ++spill_pos; } DCHECK_EQ(spill_pos, POPCOUNT(frame_info.CoreSpillMask()) + POPCOUNT(frame_info.FpSpillMask())); |