diff options
Diffstat (limited to 'libartbase/arch/instruction_set.h')
-rw-r--r-- | libartbase/arch/instruction_set.h | 35 |
1 files changed, 31 insertions, 4 deletions
diff --git a/libartbase/arch/instruction_set.h b/libartbase/arch/instruction_set.h index e68ff08c17..8d59f1b1e4 100644 --- a/libartbase/arch/instruction_set.h +++ b/libartbase/arch/instruction_set.h @@ -31,6 +31,7 @@ enum class InstructionSet { kArm, kArm64, kThumb2, + kRiscv64, kX86, kX86_64, kLast = kX86_64 @@ -41,6 +42,8 @@ std::ostream& operator<<(std::ostream& os, InstructionSet rhs); static constexpr InstructionSet kRuntimeISA = InstructionSet::kArm; #elif defined(__aarch64__) static constexpr InstructionSet kRuntimeISA = InstructionSet::kArm64; +#elif defined (__riscv) +static constexpr InstructionSet kRuntimeISA = InstructionSet::kRiscv64; #elif defined(__i386__) static constexpr InstructionSet kRuntimeISA = InstructionSet::kX86; #elif defined(__x86_64__) @@ -52,6 +55,7 @@ static constexpr InstructionSet kRuntimeISA = InstructionSet::kNone; // Architecture-specific pointer sizes static constexpr PointerSize kArmPointerSize = PointerSize::k32; static constexpr PointerSize kArm64PointerSize = PointerSize::k64; +static constexpr PointerSize kRiscv64PointerSize = PointerSize::k64; static constexpr PointerSize kX86PointerSize = PointerSize::k32; static constexpr PointerSize kX86_64PointerSize = PointerSize::k64; @@ -63,12 +67,17 @@ static constexpr size_t kArm64DefaultSVEVectorLength = 256; // ARM processors require code to be 4-byte aligned, but ARM ELF requires 8. static constexpr size_t kArmCodeAlignment = 8; static constexpr size_t kArm64CodeAlignment = 16; +static constexpr size_t kRiscv64CodeAlignment = 16; static constexpr size_t kX86CodeAlignment = 16; // Instruction alignment (every instruction must be aligned at this boundary). This differs from // code alignment, which applies only to the first instruction of a subroutine. +// Android requires the RISC-V compressed instruction extension, and that allows +// *all* instructions (not just compressed ones) to be 2-byte aligned rather +// than the usual 4-byte alignment requirement. static constexpr size_t kThumb2InstructionAlignment = 2; static constexpr size_t kArm64InstructionAlignment = 4; +static constexpr size_t kRiscv64InstructionAlignment = 2; static constexpr size_t kX86InstructionAlignment = 1; static constexpr size_t kX86_64InstructionAlignment = 1; @@ -88,6 +97,8 @@ constexpr PointerSize GetInstructionSetPointerSize(InstructionSet isa) { return kArmPointerSize; case InstructionSet::kArm64: return kArm64PointerSize; + case InstructionSet::kRiscv64: + return kRiscv64PointerSize; case InstructionSet::kX86: return kX86PointerSize; case InstructionSet::kX86_64: @@ -104,6 +115,7 @@ constexpr bool IsValidInstructionSet(InstructionSet isa) { case InstructionSet::kArm: case InstructionSet::kThumb2: case InstructionSet::kArm64: + case InstructionSet::kRiscv64: case InstructionSet::kX86: case InstructionSet::kX86_64: return true; @@ -122,6 +134,8 @@ constexpr size_t GetInstructionSetInstructionAlignment(InstructionSet isa) { return kThumb2InstructionAlignment; case InstructionSet::kArm64: return kArm64InstructionAlignment; + case InstructionSet::kRiscv64: + return kRiscv64InstructionAlignment; case InstructionSet::kX86: return kX86InstructionAlignment; case InstructionSet::kX86_64: @@ -141,6 +155,8 @@ constexpr size_t GetInstructionSetCodeAlignment(InstructionSet isa) { return kArmCodeAlignment; case InstructionSet::kArm64: return kArm64CodeAlignment; + case InstructionSet::kRiscv64: + return kRiscv64CodeAlignment; case InstructionSet::kX86: // Fall-through. case InstructionSet::kX86_64: @@ -158,6 +174,7 @@ constexpr size_t GetInstructionSetEntryPointAdjustment(InstructionSet isa) { switch (isa) { case InstructionSet::kArm: case InstructionSet::kArm64: + case InstructionSet::kRiscv64: case InstructionSet::kX86: case InstructionSet::kX86_64: return 0; @@ -180,6 +197,7 @@ constexpr bool Is64BitInstructionSet(InstructionSet isa) { return false; case InstructionSet::kArm64: + case InstructionSet::kRiscv64: case InstructionSet::kX86_64: return true; @@ -201,6 +219,8 @@ constexpr size_t GetBytesPerGprSpillLocation(InstructionSet isa) { return 4; case InstructionSet::kArm64: return 8; + case InstructionSet::kRiscv64: + return 8; case InstructionSet::kX86: return 4; case InstructionSet::kX86_64: @@ -220,6 +240,8 @@ constexpr size_t GetBytesPerFprSpillLocation(InstructionSet isa) { return 4; case InstructionSet::kArm64: return 8; + case InstructionSet::kRiscv64: + return 8; case InstructionSet::kX86: return 8; case InstructionSet::kX86_64: @@ -237,14 +259,16 @@ std::vector<InstructionSet> GetSupportedInstructionSets(std::string* error_msg); namespace instruction_set_details { #if !defined(ART_STACK_OVERFLOW_GAP_arm) || !defined(ART_STACK_OVERFLOW_GAP_arm64) || \ + !defined(ART_STACK_OVERFLOW_GAP_riscv64) || \ !defined(ART_STACK_OVERFLOW_GAP_x86) || !defined(ART_STACK_OVERFLOW_GAP_x86_64) #error "Missing defines for stack overflow gap" #endif -static constexpr size_t kArmStackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_arm; -static constexpr size_t kArm64StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_arm64; -static constexpr size_t kX86StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_x86; -static constexpr size_t kX86_64StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_x86_64; +static constexpr size_t kArmStackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_arm; +static constexpr size_t kArm64StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_arm64; +static constexpr size_t kRiscv64StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_riscv64; +static constexpr size_t kX86StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_x86; +static constexpr size_t kX86_64StackOverflowReservedBytes = ART_STACK_OVERFLOW_GAP_x86_64; NO_RETURN void GetStackOverflowReservedBytesFailure(const char* error_msg); @@ -260,6 +284,9 @@ constexpr size_t GetStackOverflowReservedBytes(InstructionSet isa) { case InstructionSet::kArm64: return instruction_set_details::kArm64StackOverflowReservedBytes; + case InstructionSet::kRiscv64: + return instruction_set_details::kRiscv64StackOverflowReservedBytes; + case InstructionSet::kX86: return instruction_set_details::kX86StackOverflowReservedBytes; |