diff options
Diffstat (limited to 'disassembler')
| -rw-r--r-- | disassembler/Android.bp | 2 | ||||
| -rw-r--r-- | disassembler/disassembler_mips.cc | 6 | ||||
| -rw-r--r-- | disassembler/disassembler_x86.cc | 66 |
3 files changed, 72 insertions, 2 deletions
diff --git a/disassembler/Android.bp b/disassembler/Android.bp index 8dfada223b..086b8c7990 100644 --- a/disassembler/Android.bp +++ b/disassembler/Android.bp @@ -47,8 +47,8 @@ art_cc_library { art_cc_library { name: "libartd-disassembler", defaults: [ - "libart-disassembler-defaults", "art_debug_defaults", + "libart-disassembler-defaults", ], shared_libs: [ // For disassembler_arm*. diff --git a/disassembler/disassembler_mips.cc b/disassembler/disassembler_mips.cc index eb57d339af..8894cc9899 100644 --- a/disassembler/disassembler_mips.cc +++ b/disassembler/disassembler_mips.cc @@ -433,6 +433,11 @@ static const MipsInstruction gMipsInstructions[] = { { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0x12, "div_u", "Vkmn" }, { kMsaMask | (0x7 << 23), kMsa | (0x6 << 23) | 0x12, "mod_s", "Vkmn" }, { kMsaMask | (0x7 << 23), kMsa | (0x7 << 23) | 0x12, "mod_u", "Vkmn" }, + { kMsaMask | (0x7 << 23), kMsa | (0x0 << 23) | 0x10, "add_a", "Vkmn" }, + { kMsaMask | (0x7 << 23), kMsa | (0x4 << 23) | 0x10, "ave_s", "Vkmn" }, + { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0x10, "ave_u", "Vkmn" }, + { kMsaMask | (0x7 << 23), kMsa | (0x6 << 23) | 0x10, "aver_s", "Vkmn" }, + { kMsaMask | (0x7 << 23), kMsa | (0x7 << 23) | 0x10, "aver_u", "Vkmn" }, { kMsaMask | (0xf << 22), kMsa | (0x0 << 22) | 0x1b, "fadd", "Ukmn" }, { kMsaMask | (0xf << 22), kMsa | (0x1 << 22) | 0x1b, "fsub", "Ukmn" }, { kMsaMask | (0xf << 22), kMsa | (0x2 << 22) | 0x1b, "fmul", "Ukmn" }, @@ -451,6 +456,7 @@ static const MipsInstruction gMipsInstructions[] = { { kMsaMask | (0x7 << 23), kMsa | (0x6 << 23) | 0x7, "ldi", "kx" }, { kMsaSpecialMask | (0xf << 2), kMsa | (0x8 << 2), "ld", "kw" }, { kMsaSpecialMask | (0xf << 2), kMsa | (0x9 << 2), "st", "kw" }, + { kMsaMask | (0x7 << 23), kMsa | (0x5 << 23) | 0x14, "ilvr", "Vkmn" }, }; static uint32_t ReadU32(const uint8_t* ptr) { diff --git a/disassembler/disassembler_x86.cc b/disassembler/disassembler_x86.cc index e12bcec776..4824f70a28 100644 --- a/disassembler/disassembler_x86.cc +++ b/disassembler/disassembler_x86.cc @@ -581,13 +581,69 @@ DISASSEMBLER_ENTRY(cmp, load = true; src_reg_file = dst_reg_file = SSE; break; - case 0x39: + case 0x37: opcode1 = "pcmpgtq"; prefix[2] = 0; has_modrm = true; load = true; src_reg_file = dst_reg_file = SSE; break; + case 0x38: + opcode1 = "pminsb"; + prefix[2] = 0; + has_modrm = true; + load = true; + src_reg_file = dst_reg_file = SSE; + break; + case 0x39: + opcode1 = "pminsd"; + prefix[2] = 0; + has_modrm = true; + load = true; + src_reg_file = dst_reg_file = SSE; + break; + case 0x3A: + opcode1 = "pminuw"; + prefix[2] = 0; + has_modrm = true; + load = true; + src_reg_file = dst_reg_file = SSE; + break; + case 0x3B: + opcode1 = "pminud"; + prefix[2] = 0; + has_modrm = true; + load = true; + src_reg_file = dst_reg_file = SSE; + break; + case 0x3C: + opcode1 = "pmaxsb"; + prefix[2] = 0; + has_modrm = true; + load = true; + src_reg_file = dst_reg_file = SSE; + break; + case 0x3D: + opcode1 = "pmaxsd"; + prefix[2] = 0; + has_modrm = true; + load = true; + src_reg_file = dst_reg_file = SSE; + break; + case 0x3E: + opcode1 = "pmaxuw"; + prefix[2] = 0; + has_modrm = true; + load = true; + src_reg_file = dst_reg_file = SSE; + break; + case 0x3F: + opcode1 = "pmaxud"; + prefix[2] = 0; + has_modrm = true; + load = true; + src_reg_file = dst_reg_file = SSE; + break; case 0x40: opcode1 = "pmulld"; prefix[2] = 0; @@ -1133,8 +1189,12 @@ DISASSEMBLER_ENTRY(cmp, opcode1 = opcode_tmp.c_str(); } break; + case 0xDA: + case 0xDE: case 0xE0: case 0xE3: + case 0xEA: + case 0xEE: if (prefix[2] == 0x66) { src_reg_file = dst_reg_file = SSE; prefix[2] = 0; // clear prefix now it's served its purpose as part of the opcode @@ -1142,8 +1202,12 @@ DISASSEMBLER_ENTRY(cmp, src_reg_file = dst_reg_file = MMX; } switch (*instr) { + case 0xDA: opcode1 = "pminub"; break; + case 0xDE: opcode1 = "pmaxub"; break; case 0xE0: opcode1 = "pavgb"; break; case 0xE3: opcode1 = "pavgw"; break; + case 0xEA: opcode1 = "pminsw"; break; + case 0xEE: opcode1 = "pmaxsw"; break; } prefix[2] = 0; has_modrm = true; |