diff options
Diffstat (limited to 'disassembler/disassembler_mips.cc')
| -rw-r--r-- | disassembler/disassembler_mips.cc | 47 |
1 files changed, 34 insertions, 13 deletions
diff --git a/disassembler/disassembler_mips.cc b/disassembler/disassembler_mips.cc index c55d285f9f..c2f23aa523 100644 --- a/disassembler/disassembler_mips.cc +++ b/disassembler/disassembler_mips.cc @@ -58,9 +58,10 @@ static const MipsInstruction gMipsInstructions[] = { // 0, 1, movci { kRTypeMask, 2, "srl", "DTA", }, { kRTypeMask, 3, "sra", "DTA", }, - { kRTypeMask, 4, "sllv", "DTS", }, - { kRTypeMask, 6, "srlv", "DTS", }, - { kRTypeMask, 7, "srav", "DTS", }, + { kRTypeMask | (0x1f << 6), 4, "sllv", "DTS", }, + { kRTypeMask | (0x1f << 6), 6, "srlv", "DTS", }, + { kRTypeMask | (0x1f << 6), (1 << 6) | 6, "rotrv", "DTS", }, + { kRTypeMask | (0x1f << 6), 7, "srav", "DTS", }, { kRTypeMask, 8, "jr", "S", }, { kRTypeMask | (0x1f << 11), 9 | (31 << 11), "jalr", "S", }, // rd = 31 is implicit. { kRTypeMask | (0x1f << 11), 9, "jr", "S", }, // rd = 0 is implicit. @@ -74,9 +75,10 @@ static const MipsInstruction gMipsInstructions[] = { { kRTypeMask, 17, "mthi", "S", }, { kRTypeMask, 18, "mflo", "D", }, { kRTypeMask, 19, "mtlo", "S", }, - { kRTypeMask, 20, "dsllv", "DTS", }, - { kRTypeMask, 22, "dsrlv", "DTS", }, - { kRTypeMask, 23, "dsrav", "DTS", }, + { kRTypeMask | (0x1f << 6), 20, "dsllv", "DTS", }, + { kRTypeMask | (0x1f << 6), 22, "dsrlv", "DTS", }, + { kRTypeMask | (0x1f << 6), (1 << 6) | 22, "drotrv", "DTS", }, + { kRTypeMask | (0x1f << 6), 23, "dsrav", "DTS", }, { kRTypeMask | (0x1f << 6), 24, "mult", "ST", }, { kRTypeMask | (0x1f << 6), 25, "multu", "ST", }, { kRTypeMask | (0x1f << 6), 26, "div", "ST", }, @@ -99,13 +101,14 @@ static const MipsInstruction gMipsInstructions[] = { { kRTypeMask, 46, "dsub", "DST", }, { kRTypeMask, 47, "dsubu", "DST", }, // TODO: tge[u], tlt[u], teg, tne - { kRTypeMask, 56, "dsll", "DTA", }, - { kRTypeMask, 58, "dsrl", "DTA", }, - { kRTypeMask, 59, "dsra", "DTA", }, - { kRTypeMask, 60, "dsll32", "DTA", }, - { kRTypeMask | (0x1f << 21), 62 | (1 << 21), "drotr32", "DTA", }, - { kRTypeMask, 62, "dsrl32", "DTA", }, - { kRTypeMask, 63, "dsra32", "DTA", }, + { kRTypeMask | (0x1f << 21), 56, "dsll", "DTA", }, + { kRTypeMask | (0x1f << 21), 58, "dsrl", "DTA", }, + { kRTypeMask | (0x1f << 21), (1 << 21) | 58, "drotr", "DTA", }, + { kRTypeMask | (0x1f << 21), 59, "dsra", "DTA", }, + { kRTypeMask | (0x1f << 21), 60, "dsll32", "DTA", }, + { kRTypeMask | (0x1f << 21), 62, "dsrl32", "DTA", }, + { kRTypeMask | (0x1f << 21), (1 << 21) | 62, "drotr32", "DTA", }, + { kRTypeMask | (0x1f << 21), 63, "dsra32", "DTA", }, // SPECIAL0 { kSpecial0Mask | 0x7ff, (2 << 6) | 24, "mul", "DST" }, @@ -280,6 +283,7 @@ static const MipsInstruction gMipsInstructions[] = { { kITypeMask, 41u << kOpcodeShift, "sh", "TO", }, { kITypeMask, 43u << kOpcodeShift, "sw", "TO", }, { kITypeMask, 49u << kOpcodeShift, "lwc1", "tO", }, + { kJTypeMask, 50u << kOpcodeShift, "bc", "P" }, { kITypeMask, 53u << kOpcodeShift, "ldc1", "tO", }, { kITypeMask | (0x1f << 21), 54u << kOpcodeShift, "jic", "Ti" }, { kITypeMask | (1 << 21), (54u << kOpcodeShift) | (1 << 21), "beqzc", "Sb" }, // TODO: de-dup? @@ -290,6 +294,7 @@ static const MipsInstruction gMipsInstructions[] = { { kITypeMask, 55u << kOpcodeShift, "ld", "TO", }, { kITypeMask, 57u << kOpcodeShift, "swc1", "tO", }, { kITypeMask | (0x1f << 16), (59u << kOpcodeShift) | (30 << 16), "auipc", "Si" }, + { kITypeMask | (0x3 << 19), (59u << kOpcodeShift) | (0 << 19), "addiupc", "Sp" }, { kITypeMask, 61u << kOpcodeShift, "sdc1", "tO", }, { kITypeMask | (0x1f << 21), 62u << kOpcodeShift, "jialc", "Ti" }, { kITypeMask | (1 << 21), (62u << kOpcodeShift) | (1 << 21), "bnezc", "Sb" }, // TODO: de-dup? @@ -432,6 +437,22 @@ size_t DisassemblerMips::Dump(std::ostream& os, const uint8_t* instr_ptr) { } } break; + case 'P': // 26-bit offset in bc. + { + int32_t offset = (instruction & 0x3ffffff) - ((instruction & 0x2000000) << 1); + offset <<= 2; + offset += 4; + args << FormatInstructionPointer(instr_ptr + offset); + args << StringPrintf(" ; %+d", offset); + } + break; + case 'p': // 19-bit offset in addiupc. + { + int32_t offset = (instruction & 0x7ffff) - ((instruction & 0x40000) << 1); + args << offset << " ; move r" << rs << ", "; + args << FormatInstructionPointer(instr_ptr + (offset << 2)); + } + break; case 'S': args << 'r' << rs; break; case 's': args << 'f' << rs; break; case 'T': args << 'r' << rt; break; |