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-rw-r--r--compiler/optimizing/code_generator_x86_64.cc4
-rw-r--r--compiler/utils/x86_64/assembler_x86_64.cc3
2 files changed, 5 insertions, 2 deletions
diff --git a/compiler/optimizing/code_generator_x86_64.cc b/compiler/optimizing/code_generator_x86_64.cc
index ffd8c42e20..7c94a8cc71 100644
--- a/compiler/optimizing/code_generator_x86_64.cc
+++ b/compiler/optimizing/code_generator_x86_64.cc
@@ -786,7 +786,7 @@ void CodeGeneratorX86_64::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invo
switch (invoke->GetMethodLoadKind()) {
case HInvokeStaticOrDirect::MethodLoadKind::kStringInit:
// temp = thread->string_init_entrypoint
- __ gs()->movl(temp.AsRegister<CpuRegister>(),
+ __ gs()->movq(temp.AsRegister<CpuRegister>(),
Address::Absolute(invoke->GetStringInitOffset(), /* no_rip */ true));
break;
case HInvokeStaticOrDirect::MethodLoadKind::kRecursive:
@@ -6385,7 +6385,7 @@ void InstructionCodeGeneratorX86_64::VisitPackedSwitch(HPackedSwitch* switch_ins
if (index != num_entries) {
// There are an odd number of entries. Handle the last one.
DCHECK_EQ(index + 1, num_entries);
- __ cmpl(value_reg_in, Immediate(lower_bound + index));
+ __ cmpl(value_reg_in, Immediate(static_cast<int32_t>(lower_bound + index)));
__ j(kEqual, codegen_->GetLabelOf(successors[index]));
}
diff --git a/compiler/utils/x86_64/assembler_x86_64.cc b/compiler/utils/x86_64/assembler_x86_64.cc
index 9eb5e67041..db072678ef 100644
--- a/compiler/utils/x86_64/assembler_x86_64.cc
+++ b/compiler/utils/x86_64/assembler_x86_64.cc
@@ -1213,6 +1213,7 @@ void X86_64Assembler::xchgl(CpuRegister reg, const Address& address) {
void X86_64Assembler::cmpw(const Address& address, const Immediate& imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+ CHECK(imm.is_int32());
EmitOperandSizeOverride();
EmitOptionalRex32(address);
EmitComplex(7, address, imm);
@@ -1221,6 +1222,7 @@ void X86_64Assembler::cmpw(const Address& address, const Immediate& imm) {
void X86_64Assembler::cmpl(CpuRegister reg, const Immediate& imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+ CHECK(imm.is_int32());
EmitOptionalRex32(reg);
EmitComplex(7, Operand(reg), imm);
}
@@ -1252,6 +1254,7 @@ void X86_64Assembler::cmpl(const Address& address, CpuRegister reg) {
void X86_64Assembler::cmpl(const Address& address, const Immediate& imm) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+ CHECK(imm.is_int32());
EmitOptionalRex32(address);
EmitComplex(7, address, imm);
}