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-rw-r--r--compiler/utils/arm/jni_macro_assembler_arm_vixl.cc11
-rw-r--r--compiler/utils/arm/jni_macro_assembler_arm_vixl.h2
-rw-r--r--compiler/utils/arm64/jni_macro_assembler_arm64.cc5
-rw-r--r--compiler/utils/arm64/jni_macro_assembler_arm64.h2
-rw-r--r--compiler/utils/assembler_thumb_test.cc3
-rw-r--r--compiler/utils/assembler_thumb_test_expected.cc.inc110
-rw-r--r--compiler/utils/jni_macro_assembler.h6
-rw-r--r--compiler/utils/x86/jni_macro_assembler_x86.cc14
-rw-r--r--compiler/utils/x86/jni_macro_assembler_x86.h2
-rw-r--r--compiler/utils/x86_64/jni_macro_assembler_x86_64.cc11
-rw-r--r--compiler/utils/x86_64/jni_macro_assembler_x86_64.h2
11 files changed, 67 insertions, 101 deletions
diff --git a/compiler/utils/arm/jni_macro_assembler_arm_vixl.cc b/compiler/utils/arm/jni_macro_assembler_arm_vixl.cc
index 61151fe6be..6e6d40dc92 100644
--- a/compiler/utils/arm/jni_macro_assembler_arm_vixl.cc
+++ b/compiler/utils/arm/jni_macro_assembler_arm_vixl.cc
@@ -428,15 +428,8 @@ void ArmVIXLJNIMacroAssembler::StoreStackOffsetToThread(ThreadOffset32 thr_offs,
asm_.StoreToOffset(kStoreWord, scratch, tr, thr_offs.Int32Value());
}
-void ArmVIXLJNIMacroAssembler::StoreStackPointerToThread(ThreadOffset32 thr_offs, bool tag_sp) {
- if (tag_sp) {
- UseScratchRegisterScope temps(asm_.GetVIXLAssembler());
- vixl32::Register reg = temps.Acquire();
- ___ Orr(reg, sp, 0x2);
- asm_.StoreToOffset(kStoreWord, reg, tr, thr_offs.Int32Value());
- } else {
- asm_.StoreToOffset(kStoreWord, sp, tr, thr_offs.Int32Value());
- }
+void ArmVIXLJNIMacroAssembler::StoreStackPointerToThread(ThreadOffset32 thr_offs) {
+ asm_.StoreToOffset(kStoreWord, sp, tr, thr_offs.Int32Value());
}
void ArmVIXLJNIMacroAssembler::SignExtend(ManagedRegister mreg ATTRIBUTE_UNUSED,
diff --git a/compiler/utils/arm/jni_macro_assembler_arm_vixl.h b/compiler/utils/arm/jni_macro_assembler_arm_vixl.h
index 980de41392..ed453ae8ff 100644
--- a/compiler/utils/arm/jni_macro_assembler_arm_vixl.h
+++ b/compiler/utils/arm/jni_macro_assembler_arm_vixl.h
@@ -70,7 +70,7 @@ class ArmVIXLJNIMacroAssembler final
void StoreStackOffsetToThread(ThreadOffset32 thr_offs, FrameOffset fr_offs) override;
- void StoreStackPointerToThread(ThreadOffset32 thr_offs, bool tag_sp) override;
+ void StoreStackPointerToThread(ThreadOffset32 thr_offs) override;
void StoreSpanning(FrameOffset dest, ManagedRegister src, FrameOffset in_off) override;
diff --git a/compiler/utils/arm64/jni_macro_assembler_arm64.cc b/compiler/utils/arm64/jni_macro_assembler_arm64.cc
index 323a01e60b..50ca468499 100644
--- a/compiler/utils/arm64/jni_macro_assembler_arm64.cc
+++ b/compiler/utils/arm64/jni_macro_assembler_arm64.cc
@@ -218,13 +218,10 @@ void Arm64JNIMacroAssembler::StoreStackOffsetToThread(ThreadOffset64 tr_offs, Fr
___ Str(scratch, MEM_OP(reg_x(TR), tr_offs.Int32Value()));
}
-void Arm64JNIMacroAssembler::StoreStackPointerToThread(ThreadOffset64 tr_offs, bool tag_sp) {
+void Arm64JNIMacroAssembler::StoreStackPointerToThread(ThreadOffset64 tr_offs) {
UseScratchRegisterScope temps(asm_.GetVIXLAssembler());
Register scratch = temps.AcquireX();
___ Mov(scratch, reg_x(SP));
- if (tag_sp) {
- ___ Orr(scratch, scratch, 0x2);
- }
___ Str(scratch, MEM_OP(reg_x(TR), tr_offs.Int32Value()));
}
diff --git a/compiler/utils/arm64/jni_macro_assembler_arm64.h b/compiler/utils/arm64/jni_macro_assembler_arm64.h
index daea95ded8..2c04184848 100644
--- a/compiler/utils/arm64/jni_macro_assembler_arm64.h
+++ b/compiler/utils/arm64/jni_macro_assembler_arm64.h
@@ -72,7 +72,7 @@ class Arm64JNIMacroAssembler final : public JNIMacroAssemblerFwd<Arm64Assembler,
void StoreRawPtr(FrameOffset dest, ManagedRegister src) override;
void StoreImmediateToFrame(FrameOffset dest, uint32_t imm) override;
void StoreStackOffsetToThread(ThreadOffset64 thr_offs, FrameOffset fr_offs) override;
- void StoreStackPointerToThread(ThreadOffset64 thr_offs, bool tag_sp) override;
+ void StoreStackPointerToThread(ThreadOffset64 thr_offs) override;
void StoreSpanning(FrameOffset dest, ManagedRegister src, FrameOffset in_off) override;
// Load routines.
diff --git a/compiler/utils/assembler_thumb_test.cc b/compiler/utils/assembler_thumb_test.cc
index f867a052a2..b2d4dcd9f6 100644
--- a/compiler/utils/assembler_thumb_test.cc
+++ b/compiler/utils/assembler_thumb_test.cc
@@ -159,8 +159,7 @@ TEST_F(ArmVIXLAssemblerTest, VixlJniHelpers) {
__ StoreRef(FrameOffset(48), scratch_register);
__ StoreSpanning(FrameOffset(48), method_register, FrameOffset(48));
__ StoreStackOffsetToThread(ThreadOffset32(512), FrameOffset(4096));
- __ StoreStackPointerToThread(ThreadOffset32(512), false);
- __ StoreStackPointerToThread(ThreadOffset32(512), true);
+ __ StoreStackPointerToThread(ThreadOffset32(512));
// Other
__ Call(method_register, FrameOffset(48));
diff --git a/compiler/utils/assembler_thumb_test_expected.cc.inc b/compiler/utils/assembler_thumb_test_expected.cc.inc
index dac21ae4dc..1775014e9e 100644
--- a/compiler/utils/assembler_thumb_test_expected.cc.inc
+++ b/compiler/utils/assembler_thumb_test_expected.cc.inc
@@ -41,46 +41,46 @@ const char* const VixlJniHelpersResults = {
" 7e: 0d f5 80 5c add.w r12, sp, #4096\n"
" 82: c9 f8 00 c2 str.w r12, [r9, #512]\n"
" 86: c9 f8 00 d2 str.w sp, [r9, #512]\n"
- " 8a: 4d f0 02 0c orr r12, sp, #2\n"
- " 8e: c9 f8 00 c2 str.w r12, [r9, #512]\n"
- " 92: d0 f8 30 e0 ldr.w lr, [r0, #48]\n"
- " 96: f0 47 blx lr\n"
- " 98: dd f8 2c c0 ldr.w r12, [sp, #44]\n"
- " 9c: cd f8 30 c0 str.w r12, [sp, #48]\n"
- " a0: d9 f8 00 c2 ldr.w r12, [r9, #512]\n"
- " a4: cd f8 2c c0 str.w r12, [sp, #44]\n"
- " a8: dd f8 2c c0 ldr.w r12, [sp, #44]\n"
- " ac: cd f8 30 c0 str.w r12, [sp, #48]\n"
- " b0: 48 46 mov r0, r9\n"
- " b2: cd f8 30 90 str.w r9, [sp, #48]\n"
- " b6: 04 46 mov r4, r0\n"
- " b8: 0d f1 30 0c add.w r12, sp, #48\n"
- " bc: bb f1 00 0f cmp.w r11, #0\n"
- " c0: 18 bf it ne\n"
- " c2: e3 46 movne r11, r12\n"
- " c4: 0d f1 30 0b add.w r11, sp, #48\n"
- " c8: 5f ea 0b 00 movs.w r0, r11\n"
- " cc: 18 bf it ne\n"
- " ce: 0c a8 addne r0, sp, #48\n"
- " d0: dd f8 40 c0 ldr.w r12, [sp, #64]\n"
- " d4: bc f1 00 0f cmp.w r12, #0\n"
- " d8: 18 bf it ne\n"
- " da: 0d f1 40 0c addne.w r12, sp, #64\n"
- " de: cd f8 30 c0 str.w r12, [sp, #48]\n"
- " e2: 5f ea 0b 00 movs.w r0, r11\n"
- " e6: 18 bf it ne\n"
- " e8: 00 a8 addne r0, sp, #0\n"
- " ea: 0d f2 04 40 addw r0, sp, #1028\n"
- " ee: bb f1 00 0f cmp.w r11, #0\n"
- " f2: 08 bf it eq\n"
- " f4: 58 46 moveq r0, r11\n"
- " f6: 0d f2 04 4c addw r12, sp, #1028\n"
- " fa: bb f1 00 0f cmp.w r11, #0\n"
- " fe: 18 bf it ne\n"
- " 100: e3 46 movne r11, r12\n"
- " 102: d9 f8 9c c0 ldr.w r12, [r9, #156]\n"
- " 106: bc f1 00 0f cmp.w r12, #0\n"
- " 10a: 71 d1 bne 0x1f0 @ imm = #226\n"
+ " 8a: d0 f8 30 e0 ldr.w lr, [r0, #48]\n"
+ " 8e: f0 47 blx lr\n"
+ " 90: dd f8 2c c0 ldr.w r12, [sp, #44]\n"
+ " 94: cd f8 30 c0 str.w r12, [sp, #48]\n"
+ " 98: d9 f8 00 c2 ldr.w r12, [r9, #512]\n"
+ " 9c: cd f8 2c c0 str.w r12, [sp, #44]\n"
+ " a0: dd f8 2c c0 ldr.w r12, [sp, #44]\n"
+ " a4: cd f8 30 c0 str.w r12, [sp, #48]\n"
+ " a8: 48 46 mov r0, r9\n"
+ " aa: cd f8 30 90 str.w r9, [sp, #48]\n"
+ " ae: 04 46 mov r4, r0\n"
+ " b0: 0d f1 30 0c add.w r12, sp, #48\n"
+ " b4: bb f1 00 0f cmp.w r11, #0\n"
+ " b8: 18 bf it ne\n"
+ " ba: e3 46 movne r11, r12\n"
+ " bc: 0d f1 30 0b add.w r11, sp, #48\n"
+ " c0: 5f ea 0b 00 movs.w r0, r11\n"
+ " c4: 18 bf it ne\n"
+ " c6: 0c a8 addne r0, sp, #48\n"
+ " c8: dd f8 40 c0 ldr.w r12, [sp, #64]\n"
+ " cc: bc f1 00 0f cmp.w r12, #0\n"
+ " d0: 18 bf it ne\n"
+ " d2: 0d f1 40 0c addne.w r12, sp, #64\n"
+ " d6: cd f8 30 c0 str.w r12, [sp, #48]\n"
+ " da: 5f ea 0b 00 movs.w r0, r11\n"
+ " de: 18 bf it ne\n"
+ " e0: 00 a8 addne r0, sp, #0\n"
+ " e2: 0d f2 04 40 addw r0, sp, #1028\n"
+ " e6: bb f1 00 0f cmp.w r11, #0\n"
+ " ea: 08 bf it eq\n"
+ " ec: 58 46 moveq r0, r11\n"
+ " ee: 0d f2 04 4c addw r12, sp, #1028\n"
+ " f2: bb f1 00 0f cmp.w r11, #0\n"
+ " f6: 18 bf it ne\n"
+ " f8: e3 46 movne r11, r12\n"
+ " fa: d9 f8 9c c0 ldr.w r12, [r9, #156]\n"
+ " fe: bc f1 00 0f cmp.w r12, #0\n"
+ " 102: 71 d1 bne 0x1e8 @ imm = #226\n"
+ " 104: cd f8 ff c7 str.w r12, [sp, #2047]\n"
+ " 108: cd f8 ff c7 str.w r12, [sp, #2047]\n"
" 10c: cd f8 ff c7 str.w r12, [sp, #2047]\n"
" 110: cd f8 ff c7 str.w r12, [sp, #2047]\n"
" 114: cd f8 ff c7 str.w r12, [sp, #2047]\n"
@@ -135,28 +135,26 @@ const char* const VixlJniHelpersResults = {
" 1d8: cd f8 ff c7 str.w r12, [sp, #2047]\n"
" 1dc: cd f8 ff c7 str.w r12, [sp, #2047]\n"
" 1e0: cd f8 ff c7 str.w r12, [sp, #2047]\n"
- " 1e4: cd f8 ff c7 str.w r12, [sp, #2047]\n"
- " 1e8: cd f8 ff c7 str.w r12, [sp, #2047]\n"
- " 1ec: 00 f0 02 b8 b.w 0x1f4 @ imm = #4\n"
- " 1f0: 00 f0 1b b8 b.w 0x22a @ imm = #54\n"
+ " 1e4: 00 f0 02 b8 b.w 0x1ec @ imm = #4\n"
+ " 1e8: 00 f0 1b b8 b.w 0x222 @ imm = #54\n"
+ " 1ec: cd f8 ff c7 str.w r12, [sp, #2047]\n"
+ " 1f0: cd f8 ff c7 str.w r12, [sp, #2047]\n"
" 1f4: cd f8 ff c7 str.w r12, [sp, #2047]\n"
" 1f8: cd f8 ff c7 str.w r12, [sp, #2047]\n"
" 1fc: cd f8 ff c7 str.w r12, [sp, #2047]\n"
" 200: cd f8 ff c7 str.w r12, [sp, #2047]\n"
" 204: cd f8 ff c7 str.w r12, [sp, #2047]\n"
" 208: cd f8 ff c7 str.w r12, [sp, #2047]\n"
- " 20c: cd f8 ff c7 str.w r12, [sp, #2047]\n"
- " 210: cd f8 ff c7 str.w r12, [sp, #2047]\n"
- " 214: 0d f5 80 5d add.w sp, sp, #4096\n"
- " 218: 08 b0 add sp, #32\n"
- " 21a: 01 b0 add sp, #4\n"
- " 21c: bd ec 10 8a vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}\n"
- " 220: bd e8 e0 4d pop.w {r5, r6, r7, r8, r10, r11, lr}\n"
- " 224: d9 f8 24 80 ldr.w r8, [r9, #36]\n"
- " 228: 70 47 bx lr\n"
- " 22a: d9 f8 9c 00 ldr.w r0, [r9, #156]\n"
- " 22e: d9 f8 d0 e2 ldr.w lr, [r9, #720]\n"
- " 232: f0 47 blx lr\n"
+ " 20c: 0d f5 80 5d add.w sp, sp, #4096\n"
+ " 210: 08 b0 add sp, #32\n"
+ " 212: 01 b0 add sp, #4\n"
+ " 214: bd ec 10 8a vpop {s16, s17, s18, s19, s20, s21, s22, s23, s24, s25, s26, s27, s28, s29, s30, s31}\n"
+ " 218: bd e8 e0 4d pop.w {r5, r6, r7, r8, r10, r11, lr}\n"
+ " 21c: d9 f8 24 80 ldr.w r8, [r9, #36]\n"
+ " 220: 70 47 bx lr\n"
+ " 222: d9 f8 9c 00 ldr.w r0, [r9, #156]\n"
+ " 226: d9 f8 d0 e2 ldr.w lr, [r9, #720]\n"
+ " 22a: f0 47 blx lr\n"
};
const char* const VixlLoadFromOffsetResults = {
diff --git a/compiler/utils/jni_macro_assembler.h b/compiler/utils/jni_macro_assembler.h
index c8c713ae67..7022e3df92 100644
--- a/compiler/utils/jni_macro_assembler.h
+++ b/compiler/utils/jni_macro_assembler.h
@@ -126,11 +126,7 @@ class JNIMacroAssembler : public DeletableArenaObject<kArenaAllocAssembler> {
virtual void StoreStackOffsetToThread(ThreadOffset<kPointerSize> thr_offs,
FrameOffset fr_offs) = 0;
- // Stores stack pointer by tagging it if required so we can walk the stack. In debuggable runtimes
- // we use tag to tell if we are using JITed code or AOT code. In non-debuggable runtimes we never
- // use JITed code when AOT code is present. So checking for AOT code is sufficient to detect which
- // code is being executed. We avoid tagging in non-debuggable runtimes to reduce instructions.
- virtual void StoreStackPointerToThread(ThreadOffset<kPointerSize> thr_offs, bool tag_sp) = 0;
+ virtual void StoreStackPointerToThread(ThreadOffset<kPointerSize> thr_offs) = 0;
virtual void StoreSpanning(FrameOffset dest,
ManagedRegister src,
diff --git a/compiler/utils/x86/jni_macro_assembler_x86.cc b/compiler/utils/x86/jni_macro_assembler_x86.cc
index 55d54283fa..685f5f1b48 100644
--- a/compiler/utils/x86/jni_macro_assembler_x86.cc
+++ b/compiler/utils/x86/jni_macro_assembler_x86.cc
@@ -187,18 +187,8 @@ void X86JNIMacroAssembler::StoreStackOffsetToThread(ThreadOffset32 thr_offs, Fra
__ fs()->movl(Address::Absolute(thr_offs), scratch);
}
-void X86JNIMacroAssembler::StoreStackPointerToThread(ThreadOffset32 thr_offs, bool tag_sp) {
- if (tag_sp) {
- // There is no free register, store contents onto stack and restore back later.
- Register scratch = ECX;
- __ movl(Address(ESP, -32), scratch);
- __ movl(scratch, ESP);
- __ orl(scratch, Immediate(0x2));
- __ fs()->movl(Address::Absolute(thr_offs), scratch);
- __ movl(scratch, Address(ESP, -32));
- } else {
- __ fs()->movl(Address::Absolute(thr_offs), ESP);
- }
+void X86JNIMacroAssembler::StoreStackPointerToThread(ThreadOffset32 thr_offs) {
+ __ fs()->movl(Address::Absolute(thr_offs), ESP);
}
void X86JNIMacroAssembler::StoreSpanning(FrameOffset /*dst*/,
diff --git a/compiler/utils/x86/jni_macro_assembler_x86.h b/compiler/utils/x86/jni_macro_assembler_x86.h
index f8ce38b541..29fccfd386 100644
--- a/compiler/utils/x86/jni_macro_assembler_x86.h
+++ b/compiler/utils/x86/jni_macro_assembler_x86.h
@@ -66,7 +66,7 @@ class X86JNIMacroAssembler final : public JNIMacroAssemblerFwd<X86Assembler, Poi
void StoreStackOffsetToThread(ThreadOffset32 thr_offs, FrameOffset fr_offs) override;
- void StoreStackPointerToThread(ThreadOffset32 thr_offs, bool tag_sp) override;
+ void StoreStackPointerToThread(ThreadOffset32 thr_offs) override;
void StoreSpanning(FrameOffset dest, ManagedRegister src, FrameOffset in_off) override;
diff --git a/compiler/utils/x86_64/jni_macro_assembler_x86_64.cc b/compiler/utils/x86_64/jni_macro_assembler_x86_64.cc
index adc431f716..d5d1bbadc9 100644
--- a/compiler/utils/x86_64/jni_macro_assembler_x86_64.cc
+++ b/compiler/utils/x86_64/jni_macro_assembler_x86_64.cc
@@ -217,15 +217,8 @@ void X86_64JNIMacroAssembler::StoreStackOffsetToThread(ThreadOffset64 thr_offs,
__ gs()->movq(Address::Absolute(thr_offs, true), scratch);
}
-void X86_64JNIMacroAssembler::StoreStackPointerToThread(ThreadOffset64 thr_offs, bool tag_sp) {
- if (tag_sp) {
- CpuRegister reg = GetScratchRegister();
- __ movq(reg, CpuRegister(RSP));
- __ orq(reg, Immediate(0x2));
- __ gs()->movq(Address::Absolute(thr_offs, true), reg);
- } else {
- __ gs()->movq(Address::Absolute(thr_offs, true), CpuRegister(RSP));
- }
+void X86_64JNIMacroAssembler::StoreStackPointerToThread(ThreadOffset64 thr_offs) {
+ __ gs()->movq(Address::Absolute(thr_offs, true), CpuRegister(RSP));
}
void X86_64JNIMacroAssembler::StoreSpanning(FrameOffset /*dst*/,
diff --git a/compiler/utils/x86_64/jni_macro_assembler_x86_64.h b/compiler/utils/x86_64/jni_macro_assembler_x86_64.h
index feaf27e53d..e080f0b3df 100644
--- a/compiler/utils/x86_64/jni_macro_assembler_x86_64.h
+++ b/compiler/utils/x86_64/jni_macro_assembler_x86_64.h
@@ -67,7 +67,7 @@ class X86_64JNIMacroAssembler final : public JNIMacroAssemblerFwd<X86_64Assemble
void StoreStackOffsetToThread(ThreadOffset64 thr_offs, FrameOffset fr_offs) override;
- void StoreStackPointerToThread(ThreadOffset64 thr_offs, bool tag_sp) override;
+ void StoreStackPointerToThread(ThreadOffset64 thr_offs) override;
void StoreSpanning(FrameOffset dest, ManagedRegister src, FrameOffset in_off) override;
generated by cgit v1.2.3-59-g8ed1b (git 2.39.0) at 2025-10-20 14:27:59 +0000