diff options
Diffstat (limited to 'compiler/optimizing')
| -rw-r--r-- | compiler/optimizing/code_generator.cc | 4 | ||||
| -rw-r--r-- | compiler/optimizing/code_generator_arm_vixl.cc | 28 | ||||
| -rw-r--r-- | compiler/optimizing/code_generator_mips.cc | 8 | ||||
| -rw-r--r-- | compiler/optimizing/code_generator_mips64.cc | 19 | ||||
| -rw-r--r-- | compiler/optimizing/optimizing_cfi_test.cc | 4 |
5 files changed, 23 insertions, 40 deletions
diff --git a/compiler/optimizing/code_generator.cc b/compiler/optimizing/code_generator.cc index dee74e96dc..729b08e92d 100644 --- a/compiler/optimizing/code_generator.cc +++ b/compiler/optimizing/code_generator.cc @@ -45,6 +45,7 @@ #include "base/casts.h" #include "bytecode_utils.h" #include "class_linker.h" +#include "code_item_accessors-inl.h" #include "compiled_method.h" #include "dex/verified_method.h" #include "driver/compiler_driver.h" @@ -910,7 +911,8 @@ static void CheckLoopEntriesCanBeUsedForOsr(const HGraph& graph, } ArenaVector<size_t> covered( loop_headers.size(), 0, graph.GetAllocator()->Adapter(kArenaAllocMisc)); - for (const DexInstructionPcPair& pair : code_item.Instructions()) { + for (const DexInstructionPcPair& pair : CodeItemInstructionAccessor(&graph.GetDexFile(), + &code_item)) { const uint32_t dex_pc = pair.DexPc(); const Instruction& instruction = pair.Inst(); if (instruction.IsBranch()) { diff --git a/compiler/optimizing/code_generator_arm_vixl.cc b/compiler/optimizing/code_generator_arm_vixl.cc index 017598d484..c6e1b042a7 100644 --- a/compiler/optimizing/code_generator_arm_vixl.cc +++ b/compiler/optimizing/code_generator_arm_vixl.cc @@ -1128,7 +1128,7 @@ class LoadReferenceWithBakerReadBarrierAndUpdateFieldSlowPathARMVIXL // // Note that this field could also hold a different object, if // another thread had concurrently changed it. In that case, the - // LDREX/SUBS/ITNE sequence of instructions in the compare-and-set + // LDREX/CMP/BNE sequence of instructions in the compare-and-set // (CAS) operation below would abort the CAS, leaving the field // as-is. __ Cmp(temp1_, ref_reg); @@ -1168,28 +1168,16 @@ class LoadReferenceWithBakerReadBarrierAndUpdateFieldSlowPathARMVIXL // tmp = [r_ptr] - expected; // } while (tmp == 0 && failure([r_ptr] <- r_new_value)); - vixl32::Label loop_head, exit_loop; + vixl32::Label loop_head, comparison_failed, exit_loop; __ Bind(&loop_head); - __ Ldrex(tmp, MemOperand(tmp_ptr)); - - __ Subs(tmp, tmp, expected); - - { - ExactAssemblyScope aas(arm_codegen->GetVIXLAssembler(), - 2 * kMaxInstructionSizeInBytes, - CodeBufferCheckScope::kMaximumSize); - - __ it(ne); - __ clrex(ne); - } - - __ B(ne, &exit_loop, /* far_target */ false); - + __ Cmp(tmp, expected); + __ B(ne, &comparison_failed, /* far_target */ false); __ Strex(tmp, value, MemOperand(tmp_ptr)); - __ Cmp(tmp, 1); - __ B(eq, &loop_head, /* far_target */ false); - + __ CompareAndBranchIfZero(tmp, &exit_loop, /* far_target */ false); + __ B(&loop_head); + __ Bind(&comparison_failed); + __ Clrex(); __ Bind(&exit_loop); if (kPoisonHeapReferences) { diff --git a/compiler/optimizing/code_generator_mips.cc b/compiler/optimizing/code_generator_mips.cc index 9f4c2349e7..c4772ad79f 100644 --- a/compiler/optimizing/code_generator_mips.cc +++ b/compiler/optimizing/code_generator_mips.cc @@ -3774,8 +3774,12 @@ void InstructionCodeGeneratorMIPS::DivRemByPowerOfTwo(HBinaryOperation* instruct if (IsUint<16>(abs_imm - 1)) { __ Andi(out, out, abs_imm - 1); } else { - __ Sll(out, out, 32 - ctz_imm); - __ Srl(out, out, 32 - ctz_imm); + if (codegen_->GetInstructionSetFeatures().IsMipsIsaRevGreaterThanEqual2()) { + __ Ins(out, ZERO, ctz_imm, 32 - ctz_imm); + } else { + __ Sll(out, out, 32 - ctz_imm); + __ Srl(out, out, 32 - ctz_imm); + } } __ Subu(out, out, TMP); } diff --git a/compiler/optimizing/code_generator_mips64.cc b/compiler/optimizing/code_generator_mips64.cc index eb64f1be23..c8891eddfc 100644 --- a/compiler/optimizing/code_generator_mips64.cc +++ b/compiler/optimizing/code_generator_mips64.cc @@ -3311,12 +3311,7 @@ void InstructionCodeGeneratorMIPS64::DivRemByPowerOfTwo(HBinaryOperation* instru __ Sra(TMP, dividend, 31); __ Srl(TMP, TMP, 32 - ctz_imm); __ Addu(out, dividend, TMP); - if (IsUint<16>(abs_imm - 1)) { - __ Andi(out, out, abs_imm - 1); - } else { - __ Sll(out, out, 32 - ctz_imm); - __ Srl(out, out, 32 - ctz_imm); - } + __ Ins(out, ZERO, ctz_imm, 32 - ctz_imm); __ Subu(out, out, TMP); } } else { @@ -3335,17 +3330,7 @@ void InstructionCodeGeneratorMIPS64::DivRemByPowerOfTwo(HBinaryOperation* instru __ Dsrl32(TMP, TMP, 32 - ctz_imm); } __ Daddu(out, dividend, TMP); - if (IsUint<16>(abs_imm - 1)) { - __ Andi(out, out, abs_imm - 1); - } else { - if (ctz_imm > 32) { - __ Dsll(out, out, 64 - ctz_imm); - __ Dsrl(out, out, 64 - ctz_imm); - } else { - __ Dsll32(out, out, 32 - ctz_imm); - __ Dsrl32(out, out, 32 - ctz_imm); - } - } + __ DblIns(out, ZERO, ctz_imm, 64 - ctz_imm); __ Dsubu(out, out, TMP); } } diff --git a/compiler/optimizing/optimizing_cfi_test.cc b/compiler/optimizing/optimizing_cfi_test.cc index 4ad29961be..e2b2106f65 100644 --- a/compiler/optimizing/optimizing_cfi_test.cc +++ b/compiler/optimizing/optimizing_cfi_test.cc @@ -18,6 +18,7 @@ #include <vector> #include "arch/instruction_set.h" +#include "base/runtime_debug.h" #include "cfi_test.h" #include "driver/compiler_options.h" #include "gtest/gtest.h" @@ -56,6 +57,9 @@ class OptimizingCFITest : public CFITest { ArenaAllocator* GetAllocator() { return pool_and_allocator_.GetAllocator(); } void SetUpFrame(InstructionSet isa) { + // Ensure that slow-debug is off, so that there is no unexpected read-barrier check emitted. + SetRuntimeDebugFlagsEnabled(false); + // Setup simple context. std::string error; isa_features_ = InstructionSetFeatures::FromVariant(isa, "default", &error); |