diff options
Diffstat (limited to 'compiler/optimizing')
44 files changed, 6605 insertions, 382 deletions
diff --git a/compiler/optimizing/builder.cc b/compiler/optimizing/builder.cc index 5dd5be3259..ed193c7b61 100644 --- a/compiler/optimizing/builder.cc +++ b/compiler/optimizing/builder.cc @@ -774,11 +774,12 @@ bool HGraphBuilder::BuildInvoke(const Instruction& instruction, &string_init_offset); // Replace calls to String.<init> with StringFactory. if (is_string_init) { - HInvokeStaticOrDirect::DispatchInfo dispatch_info = ComputeDispatchInfo(is_string_init, - string_init_offset, - target_method, - direct_method, - direct_code); + HInvokeStaticOrDirect::DispatchInfo dispatch_info = { + HInvokeStaticOrDirect::MethodLoadKind::kStringInit, + HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod, + dchecked_integral_cast<uint64_t>(string_init_offset), + 0U + }; HInvoke* invoke = new (arena_) HInvokeStaticOrDirect( arena_, number_of_arguments - 1, @@ -841,11 +842,12 @@ bool HGraphBuilder::BuildInvoke(const Instruction& instruction, clinit_check = ProcessClinitCheckForInvoke(dex_pc, method_idx, &clinit_check_requirement); } - HInvokeStaticOrDirect::DispatchInfo dispatch_info = ComputeDispatchInfo(is_string_init, - string_init_offset, - target_method, - direct_method, - direct_code); + HInvokeStaticOrDirect::DispatchInfo dispatch_info = { + HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod, + HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod, + 0u, + 0U + }; invoke = new (arena_) HInvokeStaticOrDirect(arena_, number_of_arguments, return_type, @@ -958,77 +960,6 @@ HClinitCheck* HGraphBuilder::ProcessClinitCheckForInvoke( return clinit_check; } -HInvokeStaticOrDirect::DispatchInfo HGraphBuilder::ComputeDispatchInfo( - bool is_string_init, - int32_t string_init_offset, - MethodReference target_method, - uintptr_t direct_method, - uintptr_t direct_code) { - HInvokeStaticOrDirect::MethodLoadKind method_load_kind; - HInvokeStaticOrDirect::CodePtrLocation code_ptr_location; - uint64_t method_load_data = 0u; - uint64_t direct_code_ptr = 0u; - - if (is_string_init) { - // TODO: Use direct_method and direct_code for the appropriate StringFactory method. - method_load_kind = HInvokeStaticOrDirect::MethodLoadKind::kStringInit; - code_ptr_location = HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod; - method_load_data = string_init_offset; - } else if (target_method.dex_file == outer_compilation_unit_->GetDexFile() && - target_method.dex_method_index == outer_compilation_unit_->GetDexMethodIndex()) { - method_load_kind = HInvokeStaticOrDirect::MethodLoadKind::kRecursive; - code_ptr_location = HInvokeStaticOrDirect::CodePtrLocation::kCallSelf; - } else { - if (direct_method != 0u) { // Should we use a direct pointer to the method? - if (direct_method != static_cast<uintptr_t>(-1)) { // Is the method pointer known now? - method_load_kind = HInvokeStaticOrDirect::MethodLoadKind::kDirectAddress; - method_load_data = direct_method; - } else { // The direct pointer will be known at link time. - method_load_kind = HInvokeStaticOrDirect::MethodLoadKind::kDirectAddressWithFixup; - } - } else { // Use dex cache. - DCHECK(target_method.dex_file == dex_compilation_unit_->GetDexFile()); - DexCacheArraysLayout layout = - compiler_driver_->GetDexCacheArraysLayout(target_method.dex_file); - if (layout.Valid()) { // Can we use PC-relative access to the dex cache arrays? - method_load_kind = HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative; - method_load_data = layout.MethodOffset(target_method.dex_method_index); - } else { // We must go through the ArtMethod's pointer to resolved methods. - method_load_kind = HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod; - } - } - if (direct_code != 0u) { // Should we use a direct pointer to the code? - if (direct_code != static_cast<uintptr_t>(-1)) { // Is the code pointer known now? - code_ptr_location = HInvokeStaticOrDirect::CodePtrLocation::kCallDirect; - direct_code_ptr = direct_code; - } else if (compiler_driver_->IsImage() || - target_method.dex_file == dex_compilation_unit_->GetDexFile()) { - // Use PC-relative calls for invokes within a multi-dex oat file. - // TODO: Recognize when the target dex file is within the current oat file for - // app compilation. At the moment we recognize only the boot image as multi-dex. - // NOTE: This will require changing the ARM backend which currently falls - // through from kCallPCRelative to kDirectCodeFixup for different dex files. - code_ptr_location = HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative; - } else { // The direct pointer will be known at link time. - // NOTE: This is used for app->boot calls when compiling an app against - // a relocatable but not yet relocated image. - code_ptr_location = HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup; - } - } else { // We must use the code pointer from the ArtMethod. - code_ptr_location = HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod; - } - } - - if (graph_->IsDebuggable()) { - // For debuggable apps always use the code pointer from ArtMethod - // so that we don't circumvent instrumentation stubs if installed. - code_ptr_location = HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod; - } - - return HInvokeStaticOrDirect::DispatchInfo { - method_load_kind, code_ptr_location, method_load_data, direct_code_ptr }; -} - bool HGraphBuilder::SetupInvokeArguments(HInvoke* invoke, uint32_t number_of_vreg_arguments, uint32_t* args, @@ -1241,12 +1172,14 @@ bool HGraphBuilder::BuildInstanceFieldAccess(const Instruction& instruction, field_index, dex_pc); } else { + uint16_t class_def_index = resolved_field->GetDeclaringClass()->GetDexClassDefIndex(); field_set = new (arena_) HInstanceFieldSet(null_check, value, field_type, resolved_field->GetOffset(), resolved_field->IsVolatile(), field_index, + class_def_index, *dex_file_, dex_compilation_unit_->GetDexCache(), dex_pc); @@ -1261,11 +1194,13 @@ bool HGraphBuilder::BuildInstanceFieldAccess(const Instruction& instruction, field_index, dex_pc); } else { + uint16_t class_def_index = resolved_field->GetDeclaringClass()->GetDexClassDefIndex(); field_get = new (arena_) HInstanceFieldGet(null_check, field_type, resolved_field->GetOffset(), resolved_field->IsVolatile(), field_index, + class_def_index, *dex_file_, dex_compilation_unit_->GetDexCache(), dex_pc); @@ -1407,6 +1342,8 @@ bool HGraphBuilder::BuildStaticFieldAccess(const Instruction& instruction, cls = new (arena_) HClinitCheck(constant, dex_pc); current_block_->AddInstruction(cls); } + + uint16_t class_def_index = resolved_field->GetDeclaringClass()->GetDexClassDefIndex(); if (is_put) { // We need to keep the class alive before loading the value. Temporaries temps(graph_); @@ -1419,6 +1356,7 @@ bool HGraphBuilder::BuildStaticFieldAccess(const Instruction& instruction, resolved_field->GetOffset(), resolved_field->IsVolatile(), field_index, + class_def_index, *dex_file_, dex_cache_, dex_pc)); @@ -1428,6 +1366,7 @@ bool HGraphBuilder::BuildStaticFieldAccess(const Instruction& instruction, resolved_field->GetOffset(), resolved_field->IsVolatile(), field_index, + class_def_index, *dex_file_, dex_cache_, dex_pc)); diff --git a/compiler/optimizing/builder.h b/compiler/optimizing/builder.h index 6910d5195c..9eaa4b62c5 100644 --- a/compiler/optimizing/builder.h +++ b/compiler/optimizing/builder.h @@ -276,12 +276,6 @@ class HGraphBuilder : public ValueObject { uint32_t dex_pc, HInvoke* invoke); - HInvokeStaticOrDirect::DispatchInfo ComputeDispatchInfo(bool is_string_init, - int32_t string_init_offset, - MethodReference target_method, - uintptr_t direct_method, - uintptr_t direct_code); - bool SetupInvokeArguments(HInvoke* invoke, uint32_t number_of_vreg_arguments, uint32_t* args, diff --git a/compiler/optimizing/code_generator.cc b/compiler/optimizing/code_generator.cc index 6a743ebbc9..a1bb5e0838 100644 --- a/compiler/optimizing/code_generator.cc +++ b/compiler/optimizing/code_generator.cc @@ -32,6 +32,10 @@ #include "code_generator_x86_64.h" #endif +#ifdef ART_ENABLE_CODEGEN_mips +#include "code_generator_mips.h" +#endif + #ifdef ART_ENABLE_CODEGEN_mips64 #include "code_generator_mips64.h" #endif @@ -375,13 +379,17 @@ void CodeGenerator::CreateCommonInvokeLocationSummary( if (invoke->IsInvokeStaticOrDirect()) { HInvokeStaticOrDirect* call = invoke->AsInvokeStaticOrDirect(); - if (call->IsStringInit()) { - locations->AddTemp(visitor->GetMethodLocation()); - } else if (call->IsRecursive()) { - locations->SetInAt(call->GetCurrentMethodInputIndex(), visitor->GetMethodLocation()); - } else { - locations->AddTemp(visitor->GetMethodLocation()); - locations->SetInAt(call->GetCurrentMethodInputIndex(), Location::RequiresRegister()); + switch (call->GetMethodLoadKind()) { + case HInvokeStaticOrDirect::MethodLoadKind::kRecursive: + locations->SetInAt(call->GetCurrentMethodInputIndex(), visitor->GetMethodLocation()); + break; + case HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod: + locations->AddTemp(visitor->GetMethodLocation()); + locations->SetInAt(call->GetCurrentMethodInputIndex(), Location::RequiresRegister()); + break; + default: + locations->AddTemp(visitor->GetMethodLocation()); + break; } } else { locations->AddTemp(visitor->GetMethodLocation()); @@ -742,11 +750,12 @@ CodeGenerator* CodeGenerator::Create(HGraph* graph, } #endif #ifdef ART_ENABLE_CODEGEN_mips - case kMips: - UNUSED(compiler_options); - UNUSED(graph); - UNUSED(isa_features); - return nullptr; + case kMips: { + return new mips::CodeGeneratorMIPS(graph, + *isa_features.AsMipsInstructionSetFeatures(), + compiler_options, + stats); + } #endif #ifdef ART_ENABLE_CODEGEN_mips64 case kMips64: { diff --git a/compiler/optimizing/code_generator.h b/compiler/optimizing/code_generator.h index b04dfc00b2..47b6f30450 100644 --- a/compiler/optimizing/code_generator.h +++ b/compiler/optimizing/code_generator.h @@ -172,6 +172,7 @@ class CodeGenerator { OptimizingCompilerStats* stats = nullptr); virtual ~CodeGenerator() {} + // Get the graph. This is the outermost graph, never the graph of a method being inlined. HGraph* GetGraph() const { return graph_; } HBasicBlock* GetNextBlockToEmit() const; @@ -431,6 +432,12 @@ class CodeGenerator { uint32_t dex_pc, SlowPathCode* slow_path) = 0; + // Check if the desired_dispatch_info is supported. If it is, return it, + // otherwise return a fall-back info that should be used instead. + virtual HInvokeStaticOrDirect::DispatchInfo GetSupportedInvokeStaticOrDirectDispatch( + const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, + MethodReference target_method) = 0; + // Generate a call to a static or direct method. virtual void GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) = 0; // Generate a call to a virtual method. diff --git a/compiler/optimizing/code_generator_arm.cc b/compiler/optimizing/code_generator_arm.cc index 92a5878476..8d9794bd79 100644 --- a/compiler/optimizing/code_generator_arm.cc +++ b/compiler/optimizing/code_generator_arm.cc @@ -5155,26 +5155,51 @@ void InstructionCodeGeneratorARM::HandleBitwiseOperation(HBinaryOperation* instr } } +HInvokeStaticOrDirect::DispatchInfo CodeGeneratorARM::GetSupportedInvokeStaticOrDirectDispatch( + const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, + MethodReference target_method) { + if (desired_dispatch_info.method_load_kind == + HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative) { + // TODO: Implement this type. For the moment, we fall back to kDexCacheViaMethod. + return HInvokeStaticOrDirect::DispatchInfo { + HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod, + HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod, + 0u, + 0u + }; + } + if (desired_dispatch_info.code_ptr_location == + HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative) { + const DexFile& outer_dex_file = GetGraph()->GetDexFile(); + if (&outer_dex_file != target_method.dex_file) { + // Calls across dex files are more likely to exceed the available BL range, + // so use absolute patch with fixup if available and kCallArtMethod otherwise. + HInvokeStaticOrDirect::CodePtrLocation code_ptr_location = + (desired_dispatch_info.method_load_kind == + HInvokeStaticOrDirect::MethodLoadKind::kDirectAddressWithFixup) + ? HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup + : HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod; + return HInvokeStaticOrDirect::DispatchInfo { + desired_dispatch_info.method_load_kind, + code_ptr_location, + desired_dispatch_info.method_load_data, + 0u + }; + } + } + return desired_dispatch_info; +} + void CodeGeneratorARM::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) { // For better instruction scheduling we load the direct code pointer before the method pointer. - bool direct_code_loaded = false; switch (invoke->GetCodePtrLocation()) { - case HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative: - if (IsSameDexFile(*invoke->GetTargetMethod().dex_file, GetGraph()->GetDexFile())) { - break; - } - // Calls across dex files are more likely to exceed the available BL range, - // so use absolute patch by falling through to kDirectCodeFixup. - FALLTHROUGH_INTENDED; case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup: // LR = code address from literal pool with link-time patch. __ LoadLiteral(LR, DeduplicateMethodCodeLiteral(invoke->GetTargetMethod())); - direct_code_loaded = true; break; case HInvokeStaticOrDirect::CodePtrLocation::kCallDirect: // LR = invoke->GetDirectCodePtr(); __ LoadImmediate(LR, invoke->GetDirectCodePtr()); - direct_code_loaded = true; break; default: break; @@ -5197,8 +5222,10 @@ void CodeGeneratorARM::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, DeduplicateMethodAddressLiteral(invoke->GetTargetMethod())); break; case HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative: - // TODO: Implement this type. For the moment, we fall back to kDexCacheViaMethod. - FALLTHROUGH_INTENDED; + // TODO: Implement this type. + // Currently filtered out by GetSupportedInvokeStaticOrDirectDispatch(). + LOG(FATAL) << "Unsupported"; + UNREACHABLE(); case HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod: { Location current_method = invoke->GetLocations()->InAt(invoke->GetCurrentMethodInputIndex()); Register method_reg; @@ -5227,20 +5254,14 @@ void CodeGeneratorARM::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, __ bl(GetFrameEntryLabel()); break; case HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative: - if (!direct_code_loaded) { - relative_call_patches_.emplace_back(invoke->GetTargetMethod()); - __ Bind(&relative_call_patches_.back().label); - Label label; - __ bl(&label); // Arbitrarily branch to the instruction after BL, override at link time. - __ Bind(&label); - break; - } - // If we loaded the direct code above, fall through. - FALLTHROUGH_INTENDED; + relative_call_patches_.emplace_back(invoke->GetTargetMethod()); + __ Bind(&relative_call_patches_.back().label); + // Arbitrarily branch to the BL itself, override at link time. + __ bl(&relative_call_patches_.back().label); + break; case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup: case HInvokeStaticOrDirect::CodePtrLocation::kCallDirect: // LR prepared above for better instruction scheduling. - DCHECK(direct_code_loaded); // LR() __ blx(LR); break; diff --git a/compiler/optimizing/code_generator_arm.h b/compiler/optimizing/code_generator_arm.h index 6900933e87..cef1095c5d 100644 --- a/compiler/optimizing/code_generator_arm.h +++ b/compiler/optimizing/code_generator_arm.h @@ -362,6 +362,12 @@ class CodeGeneratorARM : public CodeGenerator { Label* GetFrameEntryLabel() { return &frame_entry_label_; } + // Check if the desired_dispatch_info is supported. If it is, return it, + // otherwise return a fall-back info that should be used instead. + HInvokeStaticOrDirect::DispatchInfo GetSupportedInvokeStaticOrDirectDispatch( + const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, + MethodReference target_method) OVERRIDE; + void GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) OVERRIDE; void GenerateVirtualCall(HInvokeVirtual* invoke, Location temp) OVERRIDE; diff --git a/compiler/optimizing/code_generator_arm64.cc b/compiler/optimizing/code_generator_arm64.cc index f68b11b504..b0be446174 100644 --- a/compiler/optimizing/code_generator_arm64.cc +++ b/compiler/optimizing/code_generator_arm64.cc @@ -1580,6 +1580,21 @@ void InstructionCodeGeneratorARM64::VisitAnd(HAnd* instruction) { HandleBinaryOp(instruction); } +void LocationsBuilderARM64::VisitArm64IntermediateAddress(HArm64IntermediateAddress* instruction) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall); + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetInAt(1, ARM64EncodableConstantOrRegister(instruction->GetOffset(), instruction)); + locations->SetOut(Location::RequiresRegister()); +} + +void InstructionCodeGeneratorARM64::VisitArm64IntermediateAddress( + HArm64IntermediateAddress* instruction) { + __ Add(OutputRegister(instruction), + InputRegisterAt(instruction, 0), + Operand(InputOperandAt(instruction, 1))); +} + void LocationsBuilderARM64::VisitArrayGet(HArrayGet* instruction) { LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall); @@ -1593,14 +1608,16 @@ void LocationsBuilderARM64::VisitArrayGet(HArrayGet* instruction) { } void InstructionCodeGeneratorARM64::VisitArrayGet(HArrayGet* instruction) { - LocationSummary* locations = instruction->GetLocations(); Primitive::Type type = instruction->GetType(); Register obj = InputRegisterAt(instruction, 0); - Location index = locations->InAt(1); + Location index = instruction->GetLocations()->InAt(1); size_t offset = mirror::Array::DataOffset(Primitive::ComponentSize(type)).Uint32Value(); MemOperand source = HeapOperand(obj); + CPURegister dest = OutputCPURegister(instruction); + MacroAssembler* masm = GetVIXLAssembler(); UseScratchRegisterScope temps(masm); + // Block pools between `Load` and `MaybeRecordImplicitNullCheck`. BlockPoolsScope block_pools(masm); if (index.IsConstant()) { @@ -1608,15 +1625,26 @@ void InstructionCodeGeneratorARM64::VisitArrayGet(HArrayGet* instruction) { source = HeapOperand(obj, offset); } else { Register temp = temps.AcquireSameSizeAs(obj); - __ Add(temp, obj, offset); + if (instruction->GetArray()->IsArm64IntermediateAddress()) { + // We do not need to compute the intermediate address from the array: the + // input instruction has done it already. See the comment in + // `InstructionSimplifierArm64::TryExtractArrayAccessAddress()`. + if (kIsDebugBuild) { + HArm64IntermediateAddress* tmp = instruction->GetArray()->AsArm64IntermediateAddress(); + DCHECK(tmp->GetOffset()->AsIntConstant()->GetValueAsUint64() == offset); + } + temp = obj; + } else { + __ Add(temp, obj, offset); + } source = HeapOperand(temp, XRegisterFrom(index), LSL, Primitive::ComponentSizeShift(type)); } - codegen_->Load(type, OutputCPURegister(instruction), source); + codegen_->Load(type, dest, source); codegen_->MaybeRecordImplicitNullCheck(instruction); - if (type == Primitive::kPrimNot) { - GetAssembler()->MaybeUnpoisonHeapReference(OutputCPURegister(instruction).W()); + if (instruction->GetType() == Primitive::kPrimNot) { + GetAssembler()->MaybeUnpoisonHeapReference(dest.W()); } } @@ -1670,7 +1698,18 @@ void InstructionCodeGeneratorARM64::VisitArraySet(HArraySet* instruction) { } else { UseScratchRegisterScope temps(masm); Register temp = temps.AcquireSameSizeAs(array); - __ Add(temp, array, offset); + if (instruction->GetArray()->IsArm64IntermediateAddress()) { + // We do not need to compute the intermediate address from the array: the + // input instruction has done it already. See the comment in + // `InstructionSimplifierArm64::TryExtractArrayAccessAddress()`. + if (kIsDebugBuild) { + HArm64IntermediateAddress* tmp = instruction->GetArray()->AsArm64IntermediateAddress(); + DCHECK(tmp->GetOffset()->AsIntConstant()->GetValueAsUint64() == offset); + } + temp = array; + } else { + __ Add(temp, array, offset); + } destination = HeapOperand(temp, XRegisterFrom(index), LSL, @@ -1680,6 +1719,7 @@ void InstructionCodeGeneratorARM64::VisitArraySet(HArraySet* instruction) { codegen_->MaybeRecordImplicitNullCheck(instruction); } else { DCHECK(needs_write_barrier); + DCHECK(!instruction->GetArray()->IsArm64IntermediateAddress()); vixl::Label done; SlowPathCodeARM64* slow_path = nullptr; { @@ -2786,6 +2826,13 @@ static bool TryGenerateIntrinsicCode(HInvoke* invoke, CodeGeneratorARM64* codege return false; } +HInvokeStaticOrDirect::DispatchInfo CodeGeneratorARM64::GetSupportedInvokeStaticOrDirectDispatch( + const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, + MethodReference target_method ATTRIBUTE_UNUSED) { + // On arm64 we support all dispatch types. + return desired_dispatch_info; +} + void CodeGeneratorARM64::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) { // For better instruction scheduling we load the direct code pointer before the method pointer. bool direct_code_loaded = false; diff --git a/compiler/optimizing/code_generator_arm64.h b/compiler/optimizing/code_generator_arm64.h index a068b48797..ab684ea538 100644 --- a/compiler/optimizing/code_generator_arm64.h +++ b/compiler/optimizing/code_generator_arm64.h @@ -382,12 +382,18 @@ class CodeGeneratorARM64 : public CodeGenerator { uint32_t dex_pc, SlowPathCode* slow_path); - ParallelMoveResolverARM64* GetMoveResolver() { return &move_resolver_; } + ParallelMoveResolverARM64* GetMoveResolver() OVERRIDE { return &move_resolver_; } bool NeedsTwoRegisters(Primitive::Type type ATTRIBUTE_UNUSED) const OVERRIDE { return false; } + // Check if the desired_dispatch_info is supported. If it is, return it, + // otherwise return a fall-back info that should be used instead. + HInvokeStaticOrDirect::DispatchInfo GetSupportedInvokeStaticOrDirectDispatch( + const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, + MethodReference target_method) OVERRIDE; + void GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) OVERRIDE; void GenerateVirtualCall(HInvokeVirtual* invoke, Location temp) OVERRIDE; diff --git a/compiler/optimizing/code_generator_mips.cc b/compiler/optimizing/code_generator_mips.cc new file mode 100644 index 0000000000..6aed4447f7 --- /dev/null +++ b/compiler/optimizing/code_generator_mips.cc @@ -0,0 +1,4218 @@ +/* + * Copyright (C) 2015 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "code_generator_mips.h" + +#include "arch/mips/entrypoints_direct_mips.h" +#include "arch/mips/instruction_set_features_mips.h" +#include "art_method.h" +#include "entrypoints/quick/quick_entrypoints.h" +#include "entrypoints/quick/quick_entrypoints_enum.h" +#include "gc/accounting/card_table.h" +#include "intrinsics.h" +#include "mirror/array-inl.h" +#include "mirror/class-inl.h" +#include "offsets.h" +#include "thread.h" +#include "utils/assembler.h" +#include "utils/mips/assembler_mips.h" +#include "utils/stack_checks.h" + +namespace art { +namespace mips { + +static constexpr int kCurrentMethodStackOffset = 0; +static constexpr Register kMethodRegisterArgument = A0; + +// We need extra temporary/scratch registers (in addition to AT) in some cases. +static constexpr Register TMP = T8; +static constexpr FRegister FTMP = F8; + +// ART Thread Register. +static constexpr Register TR = S1; + +Location MipsReturnLocation(Primitive::Type return_type) { + switch (return_type) { + case Primitive::kPrimBoolean: + case Primitive::kPrimByte: + case Primitive::kPrimChar: + case Primitive::kPrimShort: + case Primitive::kPrimInt: + case Primitive::kPrimNot: + return Location::RegisterLocation(V0); + + case Primitive::kPrimLong: + return Location::RegisterPairLocation(V0, V1); + + case Primitive::kPrimFloat: + case Primitive::kPrimDouble: + return Location::FpuRegisterLocation(F0); + + case Primitive::kPrimVoid: + return Location(); + } + UNREACHABLE(); +} + +Location InvokeDexCallingConventionVisitorMIPS::GetReturnLocation(Primitive::Type type) const { + return MipsReturnLocation(type); +} + +Location InvokeDexCallingConventionVisitorMIPS::GetMethodLocation() const { + return Location::RegisterLocation(kMethodRegisterArgument); +} + +Location InvokeDexCallingConventionVisitorMIPS::GetNextLocation(Primitive::Type type) { + Location next_location; + + switch (type) { + case Primitive::kPrimBoolean: + case Primitive::kPrimByte: + case Primitive::kPrimChar: + case Primitive::kPrimShort: + case Primitive::kPrimInt: + case Primitive::kPrimNot: { + uint32_t gp_index = gp_index_++; + if (gp_index < calling_convention.GetNumberOfRegisters()) { + next_location = Location::RegisterLocation(calling_convention.GetRegisterAt(gp_index)); + } else { + size_t stack_offset = calling_convention.GetStackOffsetOf(stack_index_); + next_location = Location::StackSlot(stack_offset); + } + break; + } + + case Primitive::kPrimLong: { + uint32_t gp_index = gp_index_; + gp_index_ += 2; + if (gp_index + 1 < calling_convention.GetNumberOfRegisters()) { + if (calling_convention.GetRegisterAt(gp_index) == A1) { + gp_index_++; // Skip A1, and use A2_A3 instead. + gp_index++; + } + Register low_even = calling_convention.GetRegisterAt(gp_index); + Register high_odd = calling_convention.GetRegisterAt(gp_index + 1); + DCHECK_EQ(low_even + 1, high_odd); + next_location = Location::RegisterPairLocation(low_even, high_odd); + } else { + size_t stack_offset = calling_convention.GetStackOffsetOf(stack_index_); + next_location = Location::DoubleStackSlot(stack_offset); + } + break; + } + + // Note: both float and double types are stored in even FPU registers. On 32 bit FPU, double + // will take up the even/odd pair, while floats are stored in even regs only. + // On 64 bit FPU, both double and float are stored in even registers only. + case Primitive::kPrimFloat: + case Primitive::kPrimDouble: { + uint32_t float_index = float_index_++; + if (float_index < calling_convention.GetNumberOfFpuRegisters()) { + next_location = Location::FpuRegisterLocation( + calling_convention.GetFpuRegisterAt(float_index)); + } else { + size_t stack_offset = calling_convention.GetStackOffsetOf(stack_index_); + next_location = Primitive::Is64BitType(type) ? Location::DoubleStackSlot(stack_offset) + : Location::StackSlot(stack_offset); + } + break; + } + + case Primitive::kPrimVoid: + LOG(FATAL) << "Unexpected parameter type " << type; + break; + } + + // Space on the stack is reserved for all arguments. + stack_index_ += Primitive::Is64BitType(type) ? 2 : 1; + + return next_location; +} + +Location InvokeRuntimeCallingConvention::GetReturnLocation(Primitive::Type type) { + return MipsReturnLocation(type); +} + +#define __ down_cast<CodeGeneratorMIPS*>(codegen)->GetAssembler()-> +#define QUICK_ENTRY_POINT(x) QUICK_ENTRYPOINT_OFFSET(kMipsWordSize, x).Int32Value() + +class BoundsCheckSlowPathMIPS : public SlowPathCodeMIPS { + public: + explicit BoundsCheckSlowPathMIPS(HBoundsCheck* instruction) : instruction_(instruction) {} + + void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { + LocationSummary* locations = instruction_->GetLocations(); + CodeGeneratorMIPS* mips_codegen = down_cast<CodeGeneratorMIPS*>(codegen); + __ Bind(GetEntryLabel()); + if (instruction_->CanThrowIntoCatchBlock()) { + // Live registers will be restored in the catch block if caught. + SaveLiveRegisters(codegen, instruction_->GetLocations()); + } + // We're moving two locations to locations that could overlap, so we need a parallel + // move resolver. + InvokeRuntimeCallingConvention calling_convention; + codegen->EmitParallelMoves(locations->InAt(0), + Location::RegisterLocation(calling_convention.GetRegisterAt(0)), + Primitive::kPrimInt, + locations->InAt(1), + Location::RegisterLocation(calling_convention.GetRegisterAt(1)), + Primitive::kPrimInt); + mips_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pThrowArrayBounds), + instruction_, + instruction_->GetDexPc(), + this, + IsDirectEntrypoint(kQuickThrowArrayBounds)); + CheckEntrypointTypes<kQuickThrowArrayBounds, void, int32_t, int32_t>(); + } + + bool IsFatal() const OVERRIDE { return true; } + + const char* GetDescription() const OVERRIDE { return "BoundsCheckSlowPathMIPS"; } + + private: + HBoundsCheck* const instruction_; + + DISALLOW_COPY_AND_ASSIGN(BoundsCheckSlowPathMIPS); +}; + +class DivZeroCheckSlowPathMIPS : public SlowPathCodeMIPS { + public: + explicit DivZeroCheckSlowPathMIPS(HDivZeroCheck* instruction) : instruction_(instruction) {} + + void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { + CodeGeneratorMIPS* mips_codegen = down_cast<CodeGeneratorMIPS*>(codegen); + __ Bind(GetEntryLabel()); + if (instruction_->CanThrowIntoCatchBlock()) { + // Live registers will be restored in the catch block if caught. + SaveLiveRegisters(codegen, instruction_->GetLocations()); + } + mips_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pThrowDivZero), + instruction_, + instruction_->GetDexPc(), + this, + IsDirectEntrypoint(kQuickThrowDivZero)); + CheckEntrypointTypes<kQuickThrowDivZero, void, void>(); + } + + bool IsFatal() const OVERRIDE { return true; } + + const char* GetDescription() const OVERRIDE { return "DivZeroCheckSlowPathMIPS"; } + + private: + HDivZeroCheck* const instruction_; + DISALLOW_COPY_AND_ASSIGN(DivZeroCheckSlowPathMIPS); +}; + +class LoadClassSlowPathMIPS : public SlowPathCodeMIPS { + public: + LoadClassSlowPathMIPS(HLoadClass* cls, + HInstruction* at, + uint32_t dex_pc, + bool do_clinit) + : cls_(cls), at_(at), dex_pc_(dex_pc), do_clinit_(do_clinit) { + DCHECK(at->IsLoadClass() || at->IsClinitCheck()); + } + + void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { + LocationSummary* locations = at_->GetLocations(); + CodeGeneratorMIPS* mips_codegen = down_cast<CodeGeneratorMIPS*>(codegen); + + __ Bind(GetEntryLabel()); + SaveLiveRegisters(codegen, locations); + + InvokeRuntimeCallingConvention calling_convention; + __ LoadConst32(calling_convention.GetRegisterAt(0), cls_->GetTypeIndex()); + + int32_t entry_point_offset = do_clinit_ ? QUICK_ENTRY_POINT(pInitializeStaticStorage) + : QUICK_ENTRY_POINT(pInitializeType); + bool direct = do_clinit_ ? IsDirectEntrypoint(kQuickInitializeStaticStorage) + : IsDirectEntrypoint(kQuickInitializeType); + + mips_codegen->InvokeRuntime(entry_point_offset, at_, dex_pc_, this, direct); + if (do_clinit_) { + CheckEntrypointTypes<kQuickInitializeStaticStorage, void*, uint32_t>(); + } else { + CheckEntrypointTypes<kQuickInitializeType, void*, uint32_t>(); + } + + // Move the class to the desired location. + Location out = locations->Out(); + if (out.IsValid()) { + DCHECK(out.IsRegister() && !locations->GetLiveRegisters()->ContainsCoreRegister(out.reg())); + Primitive::Type type = at_->GetType(); + mips_codegen->MoveLocation(out, calling_convention.GetReturnLocation(type), type); + } + + RestoreLiveRegisters(codegen, locations); + __ B(GetExitLabel()); + } + + const char* GetDescription() const OVERRIDE { return "LoadClassSlowPathMIPS"; } + + private: + // The class this slow path will load. + HLoadClass* const cls_; + + // The instruction where this slow path is happening. + // (Might be the load class or an initialization check). + HInstruction* const at_; + + // The dex PC of `at_`. + const uint32_t dex_pc_; + + // Whether to initialize the class. + const bool do_clinit_; + + DISALLOW_COPY_AND_ASSIGN(LoadClassSlowPathMIPS); +}; + +class LoadStringSlowPathMIPS : public SlowPathCodeMIPS { + public: + explicit LoadStringSlowPathMIPS(HLoadString* instruction) : instruction_(instruction) {} + + void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { + LocationSummary* locations = instruction_->GetLocations(); + DCHECK(!locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); + CodeGeneratorMIPS* mips_codegen = down_cast<CodeGeneratorMIPS*>(codegen); + + __ Bind(GetEntryLabel()); + SaveLiveRegisters(codegen, locations); + + InvokeRuntimeCallingConvention calling_convention; + __ LoadConst32(calling_convention.GetRegisterAt(0), instruction_->GetStringIndex()); + mips_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pResolveString), + instruction_, + instruction_->GetDexPc(), + this, + IsDirectEntrypoint(kQuickResolveString)); + CheckEntrypointTypes<kQuickResolveString, void*, uint32_t>(); + Primitive::Type type = instruction_->GetType(); + mips_codegen->MoveLocation(locations->Out(), + calling_convention.GetReturnLocation(type), + type); + + RestoreLiveRegisters(codegen, locations); + __ B(GetExitLabel()); + } + + const char* GetDescription() const OVERRIDE { return "LoadStringSlowPathMIPS"; } + + private: + HLoadString* const instruction_; + + DISALLOW_COPY_AND_ASSIGN(LoadStringSlowPathMIPS); +}; + +class NullCheckSlowPathMIPS : public SlowPathCodeMIPS { + public: + explicit NullCheckSlowPathMIPS(HNullCheck* instr) : instruction_(instr) {} + + void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { + CodeGeneratorMIPS* mips_codegen = down_cast<CodeGeneratorMIPS*>(codegen); + __ Bind(GetEntryLabel()); + if (instruction_->CanThrowIntoCatchBlock()) { + // Live registers will be restored in the catch block if caught. + SaveLiveRegisters(codegen, instruction_->GetLocations()); + } + mips_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pThrowNullPointer), + instruction_, + instruction_->GetDexPc(), + this, + IsDirectEntrypoint(kQuickThrowNullPointer)); + CheckEntrypointTypes<kQuickThrowNullPointer, void, void>(); + } + + bool IsFatal() const OVERRIDE { return true; } + + const char* GetDescription() const OVERRIDE { return "NullCheckSlowPathMIPS"; } + + private: + HNullCheck* const instruction_; + + DISALLOW_COPY_AND_ASSIGN(NullCheckSlowPathMIPS); +}; + +class SuspendCheckSlowPathMIPS : public SlowPathCodeMIPS { + public: + SuspendCheckSlowPathMIPS(HSuspendCheck* instruction, HBasicBlock* successor) + : instruction_(instruction), successor_(successor) {} + + void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { + CodeGeneratorMIPS* mips_codegen = down_cast<CodeGeneratorMIPS*>(codegen); + __ Bind(GetEntryLabel()); + SaveLiveRegisters(codegen, instruction_->GetLocations()); + mips_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pTestSuspend), + instruction_, + instruction_->GetDexPc(), + this, + IsDirectEntrypoint(kQuickTestSuspend)); + CheckEntrypointTypes<kQuickTestSuspend, void, void>(); + RestoreLiveRegisters(codegen, instruction_->GetLocations()); + if (successor_ == nullptr) { + __ B(GetReturnLabel()); + } else { + __ B(mips_codegen->GetLabelOf(successor_)); + } + } + + MipsLabel* GetReturnLabel() { + DCHECK(successor_ == nullptr); + return &return_label_; + } + + const char* GetDescription() const OVERRIDE { return "SuspendCheckSlowPathMIPS"; } + + private: + HSuspendCheck* const instruction_; + // If not null, the block to branch to after the suspend check. + HBasicBlock* const successor_; + + // If `successor_` is null, the label to branch to after the suspend check. + MipsLabel return_label_; + + DISALLOW_COPY_AND_ASSIGN(SuspendCheckSlowPathMIPS); +}; + +class TypeCheckSlowPathMIPS : public SlowPathCodeMIPS { + public: + explicit TypeCheckSlowPathMIPS(HInstruction* instruction) : instruction_(instruction) {} + + void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { + LocationSummary* locations = instruction_->GetLocations(); + Location object_class = instruction_->IsCheckCast() ? locations->GetTemp(0) : locations->Out(); + uint32_t dex_pc = instruction_->GetDexPc(); + DCHECK(instruction_->IsCheckCast() + || !locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); + CodeGeneratorMIPS* mips_codegen = down_cast<CodeGeneratorMIPS*>(codegen); + + __ Bind(GetEntryLabel()); + SaveLiveRegisters(codegen, locations); + + // We're moving two locations to locations that could overlap, so we need a parallel + // move resolver. + InvokeRuntimeCallingConvention calling_convention; + codegen->EmitParallelMoves(locations->InAt(1), + Location::RegisterLocation(calling_convention.GetRegisterAt(0)), + Primitive::kPrimNot, + object_class, + Location::RegisterLocation(calling_convention.GetRegisterAt(1)), + Primitive::kPrimNot); + + if (instruction_->IsInstanceOf()) { + mips_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pInstanceofNonTrivial), + instruction_, + dex_pc, + this, + IsDirectEntrypoint(kQuickInstanceofNonTrivial)); + Primitive::Type ret_type = instruction_->GetType(); + Location ret_loc = calling_convention.GetReturnLocation(ret_type); + mips_codegen->MoveLocation(locations->Out(), ret_loc, ret_type); + CheckEntrypointTypes<kQuickInstanceofNonTrivial, + uint32_t, + const mirror::Class*, + const mirror::Class*>(); + } else { + DCHECK(instruction_->IsCheckCast()); + mips_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pCheckCast), + instruction_, + dex_pc, + this, + IsDirectEntrypoint(kQuickCheckCast)); + CheckEntrypointTypes<kQuickCheckCast, void, const mirror::Class*, const mirror::Class*>(); + } + + RestoreLiveRegisters(codegen, locations); + __ B(GetExitLabel()); + } + + const char* GetDescription() const OVERRIDE { return "TypeCheckSlowPathMIPS"; } + + private: + HInstruction* const instruction_; + + DISALLOW_COPY_AND_ASSIGN(TypeCheckSlowPathMIPS); +}; + +class DeoptimizationSlowPathMIPS : public SlowPathCodeMIPS { + public: + explicit DeoptimizationSlowPathMIPS(HInstruction* instruction) + : instruction_(instruction) {} + + void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { + __ Bind(GetEntryLabel()); + SaveLiveRegisters(codegen, instruction_->GetLocations()); + DCHECK(instruction_->IsDeoptimize()); + HDeoptimize* deoptimize = instruction_->AsDeoptimize(); + uint32_t dex_pc = deoptimize->GetDexPc(); + CodeGeneratorMIPS* mips_codegen = down_cast<CodeGeneratorMIPS*>(codegen); + mips_codegen->InvokeRuntime(QUICK_ENTRY_POINT(pDeoptimize), + instruction_, + dex_pc, + this, + IsDirectEntrypoint(kQuickDeoptimize)); + } + + const char* GetDescription() const OVERRIDE { return "DeoptimizationSlowPathMIPS"; } + + private: + HInstruction* const instruction_; + DISALLOW_COPY_AND_ASSIGN(DeoptimizationSlowPathMIPS); +}; + +CodeGeneratorMIPS::CodeGeneratorMIPS(HGraph* graph, + const MipsInstructionSetFeatures& isa_features, + const CompilerOptions& compiler_options, + OptimizingCompilerStats* stats) + : CodeGenerator(graph, + kNumberOfCoreRegisters, + kNumberOfFRegisters, + kNumberOfRegisterPairs, + ComputeRegisterMask(reinterpret_cast<const int*>(kCoreCalleeSaves), + arraysize(kCoreCalleeSaves)), + ComputeRegisterMask(reinterpret_cast<const int*>(kFpuCalleeSaves), + arraysize(kFpuCalleeSaves)), + compiler_options, + stats), + block_labels_(nullptr), + location_builder_(graph, this), + instruction_visitor_(graph, this), + move_resolver_(graph->GetArena(), this), + assembler_(&isa_features), + isa_features_(isa_features) { + // Save RA (containing the return address) to mimic Quick. + AddAllocatedRegister(Location::RegisterLocation(RA)); +} + +#undef __ +#define __ down_cast<MipsAssembler*>(GetAssembler())-> +#define QUICK_ENTRY_POINT(x) QUICK_ENTRYPOINT_OFFSET(kMipsWordSize, x).Int32Value() + +void CodeGeneratorMIPS::Finalize(CodeAllocator* allocator) { + // Ensure that we fix up branches. + __ FinalizeCode(); + + // Adjust native pc offsets in stack maps. + for (size_t i = 0, num = stack_map_stream_.GetNumberOfStackMaps(); i != num; ++i) { + uint32_t old_position = stack_map_stream_.GetStackMap(i).native_pc_offset; + uint32_t new_position = __ GetAdjustedPosition(old_position); + DCHECK_GE(new_position, old_position); + stack_map_stream_.SetStackMapNativePcOffset(i, new_position); + } + + // Adjust pc offsets for the disassembly information. + if (disasm_info_ != nullptr) { + GeneratedCodeInterval* frame_entry_interval = disasm_info_->GetFrameEntryInterval(); + frame_entry_interval->start = __ GetAdjustedPosition(frame_entry_interval->start); + frame_entry_interval->end = __ GetAdjustedPosition(frame_entry_interval->end); + for (auto& it : *disasm_info_->GetInstructionIntervals()) { + it.second.start = __ GetAdjustedPosition(it.second.start); + it.second.end = __ GetAdjustedPosition(it.second.end); + } + for (auto& it : *disasm_info_->GetSlowPathIntervals()) { + it.code_interval.start = __ GetAdjustedPosition(it.code_interval.start); + it.code_interval.end = __ GetAdjustedPosition(it.code_interval.end); + } + } + + CodeGenerator::Finalize(allocator); +} + +MipsAssembler* ParallelMoveResolverMIPS::GetAssembler() const { + return codegen_->GetAssembler(); +} + +void ParallelMoveResolverMIPS::EmitMove(size_t index) { + DCHECK_LT(index, moves_.size()); + MoveOperands* move = moves_[index]; + codegen_->MoveLocation(move->GetDestination(), move->GetSource(), move->GetType()); +} + +void ParallelMoveResolverMIPS::EmitSwap(size_t index) { + DCHECK_LT(index, moves_.size()); + MoveOperands* move = moves_[index]; + Primitive::Type type = move->GetType(); + Location loc1 = move->GetDestination(); + Location loc2 = move->GetSource(); + + DCHECK(!loc1.IsConstant()); + DCHECK(!loc2.IsConstant()); + + if (loc1.Equals(loc2)) { + return; + } + + if (loc1.IsRegister() && loc2.IsRegister()) { + // Swap 2 GPRs. + Register r1 = loc1.AsRegister<Register>(); + Register r2 = loc2.AsRegister<Register>(); + __ Move(TMP, r2); + __ Move(r2, r1); + __ Move(r1, TMP); + } else if (loc1.IsFpuRegister() && loc2.IsFpuRegister()) { + FRegister f1 = loc1.AsFpuRegister<FRegister>(); + FRegister f2 = loc2.AsFpuRegister<FRegister>(); + if (type == Primitive::kPrimFloat) { + __ MovS(FTMP, f2); + __ MovS(f2, f1); + __ MovS(f1, FTMP); + } else { + DCHECK_EQ(type, Primitive::kPrimDouble); + __ MovD(FTMP, f2); + __ MovD(f2, f1); + __ MovD(f1, FTMP); + } + } else if ((loc1.IsRegister() && loc2.IsFpuRegister()) || + (loc1.IsFpuRegister() && loc2.IsRegister())) { + // Swap FPR and GPR. + DCHECK_EQ(type, Primitive::kPrimFloat); // Can only swap a float. + FRegister f1 = loc1.IsFpuRegister() ? loc1.AsFpuRegister<FRegister>() + : loc2.AsFpuRegister<FRegister>(); + Register r2 = loc1.IsRegister() ? loc1.AsRegister<Register>() + : loc2.AsRegister<Register>(); + __ Move(TMP, r2); + __ Mfc1(r2, f1); + __ Mtc1(TMP, f1); + } else if (loc1.IsRegisterPair() && loc2.IsRegisterPair()) { + // Swap 2 GPR register pairs. + Register r1 = loc1.AsRegisterPairLow<Register>(); + Register r2 = loc2.AsRegisterPairLow<Register>(); + __ Move(TMP, r2); + __ Move(r2, r1); + __ Move(r1, TMP); + r1 = loc1.AsRegisterPairHigh<Register>(); + r2 = loc2.AsRegisterPairHigh<Register>(); + __ Move(TMP, r2); + __ Move(r2, r1); + __ Move(r1, TMP); + } else if ((loc1.IsRegisterPair() && loc2.IsFpuRegister()) || + (loc1.IsFpuRegister() && loc2.IsRegisterPair())) { + // Swap FPR and GPR register pair. + DCHECK_EQ(type, Primitive::kPrimDouble); + FRegister f1 = loc1.IsFpuRegister() ? loc1.AsFpuRegister<FRegister>() + : loc2.AsFpuRegister<FRegister>(); + Register r2_l = loc1.IsRegisterPair() ? loc1.AsRegisterPairLow<Register>() + : loc2.AsRegisterPairLow<Register>(); + Register r2_h = loc1.IsRegisterPair() ? loc1.AsRegisterPairHigh<Register>() + : loc2.AsRegisterPairHigh<Register>(); + // Use 2 temporary registers because we can't first swap the low 32 bits of an FPR and + // then swap the high 32 bits of the same FPR. mtc1 makes the high 32 bits of an FPR + // unpredictable and the following mfch1 will fail. + __ Mfc1(TMP, f1); + __ Mfhc1(AT, f1); + __ Mtc1(r2_l, f1); + __ Mthc1(r2_h, f1); + __ Move(r2_l, TMP); + __ Move(r2_h, AT); + } else if (loc1.IsStackSlot() && loc2.IsStackSlot()) { + Exchange(loc1.GetStackIndex(), loc2.GetStackIndex(), /* double_slot */ false); + } else if (loc1.IsDoubleStackSlot() && loc2.IsDoubleStackSlot()) { + Exchange(loc1.GetStackIndex(), loc2.GetStackIndex(), /* double_slot */ true); + } else { + LOG(FATAL) << "Swap between " << loc1 << " and " << loc2 << " is unsupported"; + } +} + +void ParallelMoveResolverMIPS::RestoreScratch(int reg) { + __ Pop(static_cast<Register>(reg)); +} + +void ParallelMoveResolverMIPS::SpillScratch(int reg) { + __ Push(static_cast<Register>(reg)); +} + +void ParallelMoveResolverMIPS::Exchange(int index1, int index2, bool double_slot) { + // Allocate a scratch register other than TMP, if available. + // Else, spill V0 (arbitrary choice) and use it as a scratch register (it will be + // automatically unspilled when the scratch scope object is destroyed). + ScratchRegisterScope ensure_scratch(this, TMP, V0, codegen_->GetNumberOfCoreRegisters()); + // If V0 spills onto the stack, SP-relative offsets need to be adjusted. + int stack_offset = ensure_scratch.IsSpilled() ? kMipsWordSize : 0; + for (int i = 0; i <= (double_slot ? 1 : 0); i++, stack_offset += kMipsWordSize) { + __ LoadFromOffset(kLoadWord, + Register(ensure_scratch.GetRegister()), + SP, + index1 + stack_offset); + __ LoadFromOffset(kLoadWord, + TMP, + SP, + index2 + stack_offset); + __ StoreToOffset(kStoreWord, + Register(ensure_scratch.GetRegister()), + SP, + index2 + stack_offset); + __ StoreToOffset(kStoreWord, TMP, SP, index1 + stack_offset); + } +} + +static dwarf::Reg DWARFReg(Register reg) { + return dwarf::Reg::MipsCore(static_cast<int>(reg)); +} + +// TODO: mapping of floating-point registers to DWARF. + +void CodeGeneratorMIPS::GenerateFrameEntry() { + __ Bind(&frame_entry_label_); + + bool do_overflow_check = FrameNeedsStackCheck(GetFrameSize(), kMips) || !IsLeafMethod(); + + if (do_overflow_check) { + __ LoadFromOffset(kLoadWord, + ZERO, + SP, + -static_cast<int32_t>(GetStackOverflowReservedBytes(kMips))); + RecordPcInfo(nullptr, 0); + } + + if (HasEmptyFrame()) { + return; + } + + // Make sure the frame size isn't unreasonably large. + if (GetFrameSize() > GetStackOverflowReservedBytes(kMips)) { + LOG(FATAL) << "Stack frame larger than " << GetStackOverflowReservedBytes(kMips) << " bytes"; + } + + // Spill callee-saved registers. + // Note that their cumulative size is small and they can be indexed using + // 16-bit offsets. + + // TODO: increment/decrement SP in one step instead of two or remove this comment. + + uint32_t ofs = FrameEntrySpillSize(); + bool unaligned_float = ofs & 0x7; + bool fpu_32bit = isa_features_.Is32BitFloatingPoint(); + __ IncreaseFrameSize(ofs); + + for (int i = arraysize(kCoreCalleeSaves) - 1; i >= 0; --i) { + Register reg = kCoreCalleeSaves[i]; + if (allocated_registers_.ContainsCoreRegister(reg)) { + ofs -= kMipsWordSize; + __ Sw(reg, SP, ofs); + __ cfi().RelOffset(DWARFReg(reg), ofs); + } + } + + for (int i = arraysize(kFpuCalleeSaves) - 1; i >= 0; --i) { + FRegister reg = kFpuCalleeSaves[i]; + if (allocated_registers_.ContainsFloatingPointRegister(reg)) { + ofs -= kMipsDoublewordSize; + // TODO: Change the frame to avoid unaligned accesses for fpu registers. + if (unaligned_float) { + if (fpu_32bit) { + __ Swc1(reg, SP, ofs); + __ Swc1(static_cast<FRegister>(reg + 1), SP, ofs + 4); + } else { + __ Mfhc1(TMP, reg); + __ Swc1(reg, SP, ofs); + __ Sw(TMP, SP, ofs + 4); + } + } else { + __ Sdc1(reg, SP, ofs); + } + // TODO: __ cfi().RelOffset(DWARFReg(reg), ofs); + } + } + + // Allocate the rest of the frame and store the current method pointer + // at its end. + + __ IncreaseFrameSize(GetFrameSize() - FrameEntrySpillSize()); + + static_assert(IsInt<16>(kCurrentMethodStackOffset), + "kCurrentMethodStackOffset must fit into int16_t"); + __ Sw(kMethodRegisterArgument, SP, kCurrentMethodStackOffset); +} + +void CodeGeneratorMIPS::GenerateFrameExit() { + __ cfi().RememberState(); + + if (!HasEmptyFrame()) { + // Deallocate the rest of the frame. + + __ DecreaseFrameSize(GetFrameSize() - FrameEntrySpillSize()); + + // Restore callee-saved registers. + // Note that their cumulative size is small and they can be indexed using + // 16-bit offsets. + + // TODO: increment/decrement SP in one step instead of two or remove this comment. + + uint32_t ofs = 0; + bool unaligned_float = FrameEntrySpillSize() & 0x7; + bool fpu_32bit = isa_features_.Is32BitFloatingPoint(); + + for (size_t i = 0; i < arraysize(kFpuCalleeSaves); ++i) { + FRegister reg = kFpuCalleeSaves[i]; + if (allocated_registers_.ContainsFloatingPointRegister(reg)) { + if (unaligned_float) { + if (fpu_32bit) { + __ Lwc1(reg, SP, ofs); + __ Lwc1(static_cast<FRegister>(reg + 1), SP, ofs + 4); + } else { + __ Lwc1(reg, SP, ofs); + __ Lw(TMP, SP, ofs + 4); + __ Mthc1(TMP, reg); + } + } else { + __ Ldc1(reg, SP, ofs); + } + ofs += kMipsDoublewordSize; + // TODO: __ cfi().Restore(DWARFReg(reg)); + } + } + + for (size_t i = 0; i < arraysize(kCoreCalleeSaves); ++i) { + Register reg = kCoreCalleeSaves[i]; + if (allocated_registers_.ContainsCoreRegister(reg)) { + __ Lw(reg, SP, ofs); + ofs += kMipsWordSize; + __ cfi().Restore(DWARFReg(reg)); + } + } + + DCHECK_EQ(ofs, FrameEntrySpillSize()); + __ DecreaseFrameSize(ofs); + } + + __ Jr(RA); + __ Nop(); + + __ cfi().RestoreState(); + __ cfi().DefCFAOffset(GetFrameSize()); +} + +void CodeGeneratorMIPS::Bind(HBasicBlock* block) { + __ Bind(GetLabelOf(block)); +} + +void CodeGeneratorMIPS::MoveLocation(Location dst, Location src, Primitive::Type dst_type) { + if (src.Equals(dst)) { + return; + } + + if (src.IsConstant()) { + MoveConstant(dst, src.GetConstant()); + } else { + if (Primitive::Is64BitType(dst_type)) { + Move64(dst, src); + } else { + Move32(dst, src); + } + } +} + +void CodeGeneratorMIPS::Move32(Location destination, Location source) { + if (source.Equals(destination)) { + return; + } + + if (destination.IsRegister()) { + if (source.IsRegister()) { + __ Move(destination.AsRegister<Register>(), source.AsRegister<Register>()); + } else if (source.IsFpuRegister()) { + __ Mfc1(destination.AsRegister<Register>(), source.AsFpuRegister<FRegister>()); + } else { + DCHECK(source.IsStackSlot()) << "Cannot move from " << source << " to " << destination; + __ LoadFromOffset(kLoadWord, destination.AsRegister<Register>(), SP, source.GetStackIndex()); + } + } else if (destination.IsFpuRegister()) { + if (source.IsRegister()) { + __ Mtc1(source.AsRegister<Register>(), destination.AsFpuRegister<FRegister>()); + } else if (source.IsFpuRegister()) { + __ MovS(destination.AsFpuRegister<FRegister>(), source.AsFpuRegister<FRegister>()); + } else { + DCHECK(source.IsStackSlot()) << "Cannot move from " << source << " to " << destination; + __ LoadSFromOffset(destination.AsFpuRegister<FRegister>(), SP, source.GetStackIndex()); + } + } else { + DCHECK(destination.IsStackSlot()) << destination; + if (source.IsRegister()) { + __ StoreToOffset(kStoreWord, source.AsRegister<Register>(), SP, destination.GetStackIndex()); + } else if (source.IsFpuRegister()) { + __ StoreSToOffset(source.AsFpuRegister<FRegister>(), SP, destination.GetStackIndex()); + } else { + DCHECK(source.IsStackSlot()) << "Cannot move from " << source << " to " << destination; + __ LoadFromOffset(kLoadWord, TMP, SP, source.GetStackIndex()); + __ StoreToOffset(kStoreWord, TMP, SP, destination.GetStackIndex()); + } + } +} + +void CodeGeneratorMIPS::Move64(Location destination, Location source) { + if (source.Equals(destination)) { + return; + } + + if (destination.IsRegisterPair()) { + if (source.IsRegisterPair()) { + __ Move(destination.AsRegisterPairHigh<Register>(), source.AsRegisterPairHigh<Register>()); + __ Move(destination.AsRegisterPairLow<Register>(), source.AsRegisterPairLow<Register>()); + } else if (source.IsFpuRegister()) { + Register dst_high = destination.AsRegisterPairHigh<Register>(); + Register dst_low = destination.AsRegisterPairLow<Register>(); + FRegister src = source.AsFpuRegister<FRegister>(); + __ Mfc1(dst_low, src); + __ Mfhc1(dst_high, src); + } else { + DCHECK(source.IsDoubleStackSlot()) << "Cannot move from " << source << " to " << destination; + int32_t off = source.GetStackIndex(); + Register r = destination.AsRegisterPairLow<Register>(); + __ LoadFromOffset(kLoadDoubleword, r, SP, off); + } + } else if (destination.IsFpuRegister()) { + if (source.IsRegisterPair()) { + FRegister dst = destination.AsFpuRegister<FRegister>(); + Register src_high = source.AsRegisterPairHigh<Register>(); + Register src_low = source.AsRegisterPairLow<Register>(); + __ Mtc1(src_low, dst); + __ Mthc1(src_high, dst); + } else if (source.IsFpuRegister()) { + __ MovD(destination.AsFpuRegister<FRegister>(), source.AsFpuRegister<FRegister>()); + } else { + DCHECK(source.IsDoubleStackSlot()) << "Cannot move from " << source << " to " << destination; + __ LoadDFromOffset(destination.AsFpuRegister<FRegister>(), SP, source.GetStackIndex()); + } + } else { + DCHECK(destination.IsDoubleStackSlot()) << destination; + int32_t off = destination.GetStackIndex(); + if (source.IsRegisterPair()) { + __ StoreToOffset(kStoreDoubleword, source.AsRegisterPairLow<Register>(), SP, off); + } else if (source.IsFpuRegister()) { + __ StoreDToOffset(source.AsFpuRegister<FRegister>(), SP, off); + } else { + DCHECK(source.IsDoubleStackSlot()) << "Cannot move from " << source << " to " << destination; + __ LoadFromOffset(kLoadWord, TMP, SP, source.GetStackIndex()); + __ StoreToOffset(kStoreWord, TMP, SP, off); + __ LoadFromOffset(kLoadWord, TMP, SP, source.GetStackIndex() + 4); + __ StoreToOffset(kStoreWord, TMP, SP, off + 4); + } + } +} + +void CodeGeneratorMIPS::MoveConstant(Location destination, HConstant* c) { + if (c->IsIntConstant() || c->IsNullConstant()) { + // Move 32 bit constant. + int32_t value = GetInt32ValueOf(c); + if (destination.IsRegister()) { + Register dst = destination.AsRegister<Register>(); + __ LoadConst32(dst, value); + } else { + DCHECK(destination.IsStackSlot()) + << "Cannot move " << c->DebugName() << " to " << destination; + __ StoreConst32ToOffset(value, SP, destination.GetStackIndex(), TMP); + } + } else if (c->IsLongConstant()) { + // Move 64 bit constant. + int64_t value = GetInt64ValueOf(c); + if (destination.IsRegisterPair()) { + Register r_h = destination.AsRegisterPairHigh<Register>(); + Register r_l = destination.AsRegisterPairLow<Register>(); + __ LoadConst64(r_h, r_l, value); + } else { + DCHECK(destination.IsDoubleStackSlot()) + << "Cannot move " << c->DebugName() << " to " << destination; + __ StoreConst64ToOffset(value, SP, destination.GetStackIndex(), TMP); + } + } else if (c->IsFloatConstant()) { + // Move 32 bit float constant. + int32_t value = GetInt32ValueOf(c); + if (destination.IsFpuRegister()) { + __ LoadSConst32(destination.AsFpuRegister<FRegister>(), value, TMP); + } else { + DCHECK(destination.IsStackSlot()) + << "Cannot move " << c->DebugName() << " to " << destination; + __ StoreConst32ToOffset(value, SP, destination.GetStackIndex(), TMP); + } + } else { + // Move 64 bit double constant. + DCHECK(c->IsDoubleConstant()) << c->DebugName(); + int64_t value = GetInt64ValueOf(c); + if (destination.IsFpuRegister()) { + FRegister fd = destination.AsFpuRegister<FRegister>(); + __ LoadDConst64(fd, value, TMP); + } else { + DCHECK(destination.IsDoubleStackSlot()) + << "Cannot move " << c->DebugName() << " to " << destination; + __ StoreConst64ToOffset(value, SP, destination.GetStackIndex(), TMP); + } + } +} + +void CodeGeneratorMIPS::MoveConstant(Location destination, int32_t value) { + DCHECK(destination.IsRegister()); + Register dst = destination.AsRegister<Register>(); + __ LoadConst32(dst, value); +} + +void CodeGeneratorMIPS::Move(HInstruction* instruction, + Location location, + HInstruction* move_for) { + LocationSummary* locations = instruction->GetLocations(); + Primitive::Type type = instruction->GetType(); + DCHECK_NE(type, Primitive::kPrimVoid); + + if (instruction->IsCurrentMethod()) { + Move32(location, Location::StackSlot(kCurrentMethodStackOffset)); + } else if (locations != nullptr && locations->Out().Equals(location)) { + return; + } else if (instruction->IsIntConstant() + || instruction->IsLongConstant() + || instruction->IsNullConstant()) { + MoveConstant(location, instruction->AsConstant()); + } else if (instruction->IsTemporary()) { + Location temp_location = GetTemporaryLocation(instruction->AsTemporary()); + if (temp_location.IsStackSlot()) { + Move32(location, temp_location); + } else { + DCHECK(temp_location.IsDoubleStackSlot()); + Move64(location, temp_location); + } + } else if (instruction->IsLoadLocal()) { + uint32_t stack_slot = GetStackSlot(instruction->AsLoadLocal()->GetLocal()); + if (Primitive::Is64BitType(type)) { + Move64(location, Location::DoubleStackSlot(stack_slot)); + } else { + Move32(location, Location::StackSlot(stack_slot)); + } + } else { + DCHECK((instruction->GetNext() == move_for) || instruction->GetNext()->IsTemporary()); + if (Primitive::Is64BitType(type)) { + Move64(location, locations->Out()); + } else { + Move32(location, locations->Out()); + } + } +} + +void CodeGeneratorMIPS::AddLocationAsTemp(Location location, LocationSummary* locations) { + if (location.IsRegister()) { + locations->AddTemp(location); + } else if (location.IsRegisterPair()) { + locations->AddTemp(Location::RegisterLocation(location.AsRegisterPairLow<Register>())); + locations->AddTemp(Location::RegisterLocation(location.AsRegisterPairHigh<Register>())); + } else { + UNIMPLEMENTED(FATAL) << "AddLocationAsTemp not implemented for location " << location; + } +} + +Location CodeGeneratorMIPS::GetStackLocation(HLoadLocal* load) const { + Primitive::Type type = load->GetType(); + + switch (type) { + case Primitive::kPrimNot: + case Primitive::kPrimInt: + case Primitive::kPrimFloat: + return Location::StackSlot(GetStackSlot(load->GetLocal())); + + case Primitive::kPrimLong: + case Primitive::kPrimDouble: + return Location::DoubleStackSlot(GetStackSlot(load->GetLocal())); + + case Primitive::kPrimBoolean: + case Primitive::kPrimByte: + case Primitive::kPrimChar: + case Primitive::kPrimShort: + case Primitive::kPrimVoid: + LOG(FATAL) << "Unexpected type " << type; + } + + LOG(FATAL) << "Unreachable"; + return Location::NoLocation(); +} + +void CodeGeneratorMIPS::MarkGCCard(Register object, Register value) { + MipsLabel done; + Register card = AT; + Register temp = TMP; + __ Beqz(value, &done); + __ LoadFromOffset(kLoadWord, + card, + TR, + Thread::CardTableOffset<kMipsWordSize>().Int32Value()); + __ Srl(temp, object, gc::accounting::CardTable::kCardShift); + __ Addu(temp, card, temp); + __ Sb(card, temp, 0); + __ Bind(&done); +} + +void CodeGeneratorMIPS::SetupBlockedRegisters(bool is_baseline) const { + // Don't allocate the dalvik style register pair passing. + blocked_register_pairs_[A1_A2] = true; + + // ZERO, K0, K1, GP, SP, RA are always reserved and can't be allocated. + blocked_core_registers_[ZERO] = true; + blocked_core_registers_[K0] = true; + blocked_core_registers_[K1] = true; + blocked_core_registers_[GP] = true; + blocked_core_registers_[SP] = true; + blocked_core_registers_[RA] = true; + + // AT and TMP(T8) are used as temporary/scratch registers + // (similar to how AT is used by MIPS assemblers). + blocked_core_registers_[AT] = true; + blocked_core_registers_[TMP] = true; + blocked_fpu_registers_[FTMP] = true; + + // Reserve suspend and thread registers. + blocked_core_registers_[S0] = true; + blocked_core_registers_[TR] = true; + + // Reserve T9 for function calls + blocked_core_registers_[T9] = true; + + // Reserve odd-numbered FPU registers. + for (size_t i = 1; i < kNumberOfFRegisters; i += 2) { + blocked_fpu_registers_[i] = true; + } + + if (is_baseline) { + for (size_t i = 0; i < arraysize(kCoreCalleeSaves); ++i) { + blocked_core_registers_[kCoreCalleeSaves[i]] = true; + } + + for (size_t i = 0; i < arraysize(kFpuCalleeSaves); ++i) { + blocked_fpu_registers_[kFpuCalleeSaves[i]] = true; + } + } + + UpdateBlockedPairRegisters(); +} + +void CodeGeneratorMIPS::UpdateBlockedPairRegisters() const { + for (int i = 0; i < kNumberOfRegisterPairs; i++) { + MipsManagedRegister current = + MipsManagedRegister::FromRegisterPair(static_cast<RegisterPair>(i)); + if (blocked_core_registers_[current.AsRegisterPairLow()] + || blocked_core_registers_[current.AsRegisterPairHigh()]) { + blocked_register_pairs_[i] = true; + } + } +} + +Location CodeGeneratorMIPS::AllocateFreeRegister(Primitive::Type type) const { + switch (type) { + case Primitive::kPrimLong: { + size_t reg = FindFreeEntry(blocked_register_pairs_, kNumberOfRegisterPairs); + MipsManagedRegister pair = + MipsManagedRegister::FromRegisterPair(static_cast<RegisterPair>(reg)); + DCHECK(!blocked_core_registers_[pair.AsRegisterPairLow()]); + DCHECK(!blocked_core_registers_[pair.AsRegisterPairHigh()]); + + blocked_core_registers_[pair.AsRegisterPairLow()] = true; + blocked_core_registers_[pair.AsRegisterPairHigh()] = true; + UpdateBlockedPairRegisters(); + return Location::RegisterPairLocation(pair.AsRegisterPairLow(), pair.AsRegisterPairHigh()); + } + + case Primitive::kPrimByte: + case Primitive::kPrimBoolean: + case Primitive::kPrimChar: + case Primitive::kPrimShort: + case Primitive::kPrimInt: + case Primitive::kPrimNot: { + int reg = FindFreeEntry(blocked_core_registers_, kNumberOfCoreRegisters); + // Block all register pairs that contain `reg`. + for (int i = 0; i < kNumberOfRegisterPairs; i++) { + MipsManagedRegister current = + MipsManagedRegister::FromRegisterPair(static_cast<RegisterPair>(i)); + if (current.AsRegisterPairLow() == reg || current.AsRegisterPairHigh() == reg) { + blocked_register_pairs_[i] = true; + } + } + return Location::RegisterLocation(reg); + } + + case Primitive::kPrimFloat: + case Primitive::kPrimDouble: { + int reg = FindFreeEntry(blocked_fpu_registers_, kNumberOfFRegisters); + return Location::FpuRegisterLocation(reg); + } + + case Primitive::kPrimVoid: + LOG(FATAL) << "Unreachable type " << type; + } + + UNREACHABLE(); +} + +size_t CodeGeneratorMIPS::SaveCoreRegister(size_t stack_index, uint32_t reg_id) { + __ StoreToOffset(kStoreWord, Register(reg_id), SP, stack_index); + return kMipsWordSize; +} + +size_t CodeGeneratorMIPS::RestoreCoreRegister(size_t stack_index, uint32_t reg_id) { + __ LoadFromOffset(kLoadWord, Register(reg_id), SP, stack_index); + return kMipsWordSize; +} + +size_t CodeGeneratorMIPS::SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id) { + __ StoreDToOffset(FRegister(reg_id), SP, stack_index); + return kMipsDoublewordSize; +} + +size_t CodeGeneratorMIPS::RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id) { + __ LoadDFromOffset(FRegister(reg_id), SP, stack_index); + return kMipsDoublewordSize; +} + +void CodeGeneratorMIPS::DumpCoreRegister(std::ostream& stream, int reg) const { + stream << MipsManagedRegister::FromCoreRegister(Register(reg)); +} + +void CodeGeneratorMIPS::DumpFloatingPointRegister(std::ostream& stream, int reg) const { + stream << MipsManagedRegister::FromFRegister(FRegister(reg)); +} + +void CodeGeneratorMIPS::InvokeRuntime(QuickEntrypointEnum entrypoint, + HInstruction* instruction, + uint32_t dex_pc, + SlowPathCode* slow_path) { + InvokeRuntime(GetThreadOffset<kMipsWordSize>(entrypoint).Int32Value(), + instruction, + dex_pc, + slow_path, + IsDirectEntrypoint(entrypoint)); +} + +constexpr size_t kMipsDirectEntrypointRuntimeOffset = 16; + +void CodeGeneratorMIPS::InvokeRuntime(int32_t entry_point_offset, + HInstruction* instruction, + uint32_t dex_pc, + SlowPathCode* slow_path, + bool is_direct_entrypoint) { + if (is_direct_entrypoint) { + // Reserve argument space on stack (for $a0-$a3) for + // entrypoints that directly reference native implementations. + // Called function may use this space to store $a0-$a3 regs. + __ IncreaseFrameSize(kMipsDirectEntrypointRuntimeOffset); + } + __ LoadFromOffset(kLoadWord, T9, TR, entry_point_offset); + __ Jalr(T9); + __ Nop(); + if (is_direct_entrypoint) { + __ DecreaseFrameSize(kMipsDirectEntrypointRuntimeOffset); + } + RecordPcInfo(instruction, dex_pc, slow_path); +} + +void InstructionCodeGeneratorMIPS::GenerateClassInitializationCheck(SlowPathCodeMIPS* slow_path, + Register class_reg) { + __ LoadFromOffset(kLoadWord, TMP, class_reg, mirror::Class::StatusOffset().Int32Value()); + __ LoadConst32(AT, mirror::Class::kStatusInitialized); + __ Blt(TMP, AT, slow_path->GetEntryLabel()); + // Even if the initialized flag is set, we need to ensure consistent memory ordering. + __ Sync(0); + __ Bind(slow_path->GetExitLabel()); +} + +void InstructionCodeGeneratorMIPS::GenerateMemoryBarrier(MemBarrierKind kind ATTRIBUTE_UNUSED) { + __ Sync(0); // Only stype 0 is supported. +} + +void InstructionCodeGeneratorMIPS::GenerateSuspendCheck(HSuspendCheck* instruction, + HBasicBlock* successor) { + SuspendCheckSlowPathMIPS* slow_path = + new (GetGraph()->GetArena()) SuspendCheckSlowPathMIPS(instruction, successor); + codegen_->AddSlowPath(slow_path); + + __ LoadFromOffset(kLoadUnsignedHalfword, + TMP, + TR, + Thread::ThreadFlagsOffset<kMipsWordSize>().Int32Value()); + if (successor == nullptr) { + __ Bnez(TMP, slow_path->GetEntryLabel()); + __ Bind(slow_path->GetReturnLabel()); + } else { + __ Beqz(TMP, codegen_->GetLabelOf(successor)); + __ B(slow_path->GetEntryLabel()); + // slow_path will return to GetLabelOf(successor). + } +} + +InstructionCodeGeneratorMIPS::InstructionCodeGeneratorMIPS(HGraph* graph, + CodeGeneratorMIPS* codegen) + : HGraphVisitor(graph), + assembler_(codegen->GetAssembler()), + codegen_(codegen) {} + +void LocationsBuilderMIPS::HandleBinaryOp(HBinaryOperation* instruction) { + DCHECK_EQ(instruction->InputCount(), 2U); + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction); + Primitive::Type type = instruction->GetResultType(); + switch (type) { + case Primitive::kPrimInt: { + locations->SetInAt(0, Location::RequiresRegister()); + HInstruction* right = instruction->InputAt(1); + bool can_use_imm = false; + if (right->IsConstant()) { + int32_t imm = CodeGenerator::GetInt32ValueOf(right->AsConstant()); + if (instruction->IsAnd() || instruction->IsOr() || instruction->IsXor()) { + can_use_imm = IsUint<16>(imm); + } else if (instruction->IsAdd()) { + can_use_imm = IsInt<16>(imm); + } else { + DCHECK(instruction->IsSub()); + can_use_imm = IsInt<16>(-imm); + } + } + if (can_use_imm) + locations->SetInAt(1, Location::ConstantLocation(right->AsConstant())); + else + locations->SetInAt(1, Location::RequiresRegister()); + locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); + break; + } + + case Primitive::kPrimLong: { + // TODO: can 2nd param be const? + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetInAt(1, Location::RequiresRegister()); + if (instruction->IsAdd() || instruction->IsSub()) { + locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap); + } else { + DCHECK(instruction->IsAnd() || instruction->IsOr() || instruction->IsXor()); + locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); + } + break; + } + + case Primitive::kPrimFloat: + case Primitive::kPrimDouble: + DCHECK(instruction->IsAdd() || instruction->IsSub()); + locations->SetInAt(0, Location::RequiresFpuRegister()); + locations->SetInAt(1, Location::RequiresFpuRegister()); + locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap); + break; + + default: + LOG(FATAL) << "Unexpected " << instruction->DebugName() << " type " << type; + } +} + +void InstructionCodeGeneratorMIPS::HandleBinaryOp(HBinaryOperation* instruction) { + Primitive::Type type = instruction->GetType(); + LocationSummary* locations = instruction->GetLocations(); + + switch (type) { + case Primitive::kPrimInt: { + Register dst = locations->Out().AsRegister<Register>(); + Register lhs = locations->InAt(0).AsRegister<Register>(); + Location rhs_location = locations->InAt(1); + + Register rhs_reg = ZERO; + int32_t rhs_imm = 0; + bool use_imm = rhs_location.IsConstant(); + if (use_imm) { + rhs_imm = CodeGenerator::GetInt32ValueOf(rhs_location.GetConstant()); + } else { + rhs_reg = rhs_location.AsRegister<Register>(); + } + + if (instruction->IsAnd()) { + if (use_imm) + __ Andi(dst, lhs, rhs_imm); + else + __ And(dst, lhs, rhs_reg); + } else if (instruction->IsOr()) { + if (use_imm) + __ Ori(dst, lhs, rhs_imm); + else + __ Or(dst, lhs, rhs_reg); + } else if (instruction->IsXor()) { + if (use_imm) + __ Xori(dst, lhs, rhs_imm); + else + __ Xor(dst, lhs, rhs_reg); + } else if (instruction->IsAdd()) { + if (use_imm) + __ Addiu(dst, lhs, rhs_imm); + else + __ Addu(dst, lhs, rhs_reg); + } else { + DCHECK(instruction->IsSub()); + if (use_imm) + __ Addiu(dst, lhs, -rhs_imm); + else + __ Subu(dst, lhs, rhs_reg); + } + break; + } + + case Primitive::kPrimLong: { + // TODO: can 2nd param be const? + Register dst_high = locations->Out().AsRegisterPairHigh<Register>(); + Register dst_low = locations->Out().AsRegisterPairLow<Register>(); + Register lhs_high = locations->InAt(0).AsRegisterPairHigh<Register>(); + Register lhs_low = locations->InAt(0).AsRegisterPairLow<Register>(); + Register rhs_high = locations->InAt(1).AsRegisterPairHigh<Register>(); + Register rhs_low = locations->InAt(1).AsRegisterPairLow<Register>(); + + if (instruction->IsAnd()) { + __ And(dst_low, lhs_low, rhs_low); + __ And(dst_high, lhs_high, rhs_high); + } else if (instruction->IsOr()) { + __ Or(dst_low, lhs_low, rhs_low); + __ Or(dst_high, lhs_high, rhs_high); + } else if (instruction->IsXor()) { + __ Xor(dst_low, lhs_low, rhs_low); + __ Xor(dst_high, lhs_high, rhs_high); + } else if (instruction->IsAdd()) { + __ Addu(dst_low, lhs_low, rhs_low); + __ Sltu(TMP, dst_low, lhs_low); + __ Addu(dst_high, lhs_high, rhs_high); + __ Addu(dst_high, dst_high, TMP); + } else { + DCHECK(instruction->IsSub()); + __ Subu(dst_low, lhs_low, rhs_low); + __ Sltu(TMP, lhs_low, dst_low); + __ Subu(dst_high, lhs_high, rhs_high); + __ Subu(dst_high, dst_high, TMP); + } + break; + } + + case Primitive::kPrimFloat: + case Primitive::kPrimDouble: { + FRegister dst = locations->Out().AsFpuRegister<FRegister>(); + FRegister lhs = locations->InAt(0).AsFpuRegister<FRegister>(); + FRegister rhs = locations->InAt(1).AsFpuRegister<FRegister>(); + if (instruction->IsAdd()) { + if (type == Primitive::kPrimFloat) { + __ AddS(dst, lhs, rhs); + } else { + __ AddD(dst, lhs, rhs); + } + } else { + DCHECK(instruction->IsSub()); + if (type == Primitive::kPrimFloat) { + __ SubS(dst, lhs, rhs); + } else { + __ SubD(dst, lhs, rhs); + } + } + break; + } + + default: + LOG(FATAL) << "Unexpected binary operation type " << type; + } +} + +void LocationsBuilderMIPS::HandleShift(HBinaryOperation* instr) { + DCHECK(instr->IsShl() || instr->IsShr() || instr->IsUShr()); + + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instr); + Primitive::Type type = instr->GetResultType(); + switch (type) { + case Primitive::kPrimInt: + case Primitive::kPrimLong: { + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetInAt(1, Location::RegisterOrConstant(instr->InputAt(1))); + locations->SetOut(Location::RequiresRegister()); + break; + } + default: + LOG(FATAL) << "Unexpected shift type " << type; + } +} + +static constexpr size_t kMipsBitsPerWord = kMipsWordSize * kBitsPerByte; + +void InstructionCodeGeneratorMIPS::HandleShift(HBinaryOperation* instr) { + DCHECK(instr->IsShl() || instr->IsShr() || instr->IsUShr()); + LocationSummary* locations = instr->GetLocations(); + Primitive::Type type = instr->GetType(); + + Location rhs_location = locations->InAt(1); + bool use_imm = rhs_location.IsConstant(); + Register rhs_reg = use_imm ? ZERO : rhs_location.AsRegister<Register>(); + int64_t rhs_imm = use_imm ? CodeGenerator::GetInt64ValueOf(rhs_location.GetConstant()) : 0; + uint32_t shift_mask = (type == Primitive::kPrimInt) ? kMaxIntShiftValue : kMaxLongShiftValue; + uint32_t shift_value = rhs_imm & shift_mask; + + switch (type) { + case Primitive::kPrimInt: { + Register dst = locations->Out().AsRegister<Register>(); + Register lhs = locations->InAt(0).AsRegister<Register>(); + if (use_imm) { + if (instr->IsShl()) { + __ Sll(dst, lhs, shift_value); + } else if (instr->IsShr()) { + __ Sra(dst, lhs, shift_value); + } else { + __ Srl(dst, lhs, shift_value); + } + } else { + if (instr->IsShl()) { + __ Sllv(dst, lhs, rhs_reg); + } else if (instr->IsShr()) { + __ Srav(dst, lhs, rhs_reg); + } else { + __ Srlv(dst, lhs, rhs_reg); + } + } + break; + } + + case Primitive::kPrimLong: { + Register dst_high = locations->Out().AsRegisterPairHigh<Register>(); + Register dst_low = locations->Out().AsRegisterPairLow<Register>(); + Register lhs_high = locations->InAt(0).AsRegisterPairHigh<Register>(); + Register lhs_low = locations->InAt(0).AsRegisterPairLow<Register>(); + if (use_imm) { + if (shift_value == 0) { + codegen_->Move64(locations->Out(), locations->InAt(0)); + } else if (shift_value < kMipsBitsPerWord) { + if (instr->IsShl()) { + __ Sll(dst_low, lhs_low, shift_value); + __ Srl(TMP, lhs_low, kMipsBitsPerWord - shift_value); + __ Sll(dst_high, lhs_high, shift_value); + __ Or(dst_high, dst_high, TMP); + } else if (instr->IsShr()) { + __ Sra(dst_high, lhs_high, shift_value); + __ Sll(TMP, lhs_high, kMipsBitsPerWord - shift_value); + __ Srl(dst_low, lhs_low, shift_value); + __ Or(dst_low, dst_low, TMP); + } else { + __ Srl(dst_high, lhs_high, shift_value); + __ Sll(TMP, lhs_high, kMipsBitsPerWord - shift_value); + __ Srl(dst_low, lhs_low, shift_value); + __ Or(dst_low, dst_low, TMP); + } + } else { + shift_value -= kMipsBitsPerWord; + if (instr->IsShl()) { + __ Sll(dst_high, lhs_low, shift_value); + __ Move(dst_low, ZERO); + } else if (instr->IsShr()) { + __ Sra(dst_low, lhs_high, shift_value); + __ Sra(dst_high, dst_low, kMipsBitsPerWord - 1); + } else { + __ Srl(dst_low, lhs_high, shift_value); + __ Move(dst_high, ZERO); + } + } + } else { + MipsLabel done; + if (instr->IsShl()) { + __ Sllv(dst_low, lhs_low, rhs_reg); + __ Nor(AT, ZERO, rhs_reg); + __ Srl(TMP, lhs_low, 1); + __ Srlv(TMP, TMP, AT); + __ Sllv(dst_high, lhs_high, rhs_reg); + __ Or(dst_high, dst_high, TMP); + __ Andi(TMP, rhs_reg, kMipsBitsPerWord); + __ Beqz(TMP, &done); + __ Move(dst_high, dst_low); + __ Move(dst_low, ZERO); + } else if (instr->IsShr()) { + __ Srav(dst_high, lhs_high, rhs_reg); + __ Nor(AT, ZERO, rhs_reg); + __ Sll(TMP, lhs_high, 1); + __ Sllv(TMP, TMP, AT); + __ Srlv(dst_low, lhs_low, rhs_reg); + __ Or(dst_low, dst_low, TMP); + __ Andi(TMP, rhs_reg, kMipsBitsPerWord); + __ Beqz(TMP, &done); + __ Move(dst_low, dst_high); + __ Sra(dst_high, dst_high, 31); + } else { + __ Srlv(dst_high, lhs_high, rhs_reg); + __ Nor(AT, ZERO, rhs_reg); + __ Sll(TMP, lhs_high, 1); + __ Sllv(TMP, TMP, AT); + __ Srlv(dst_low, lhs_low, rhs_reg); + __ Or(dst_low, dst_low, TMP); + __ Andi(TMP, rhs_reg, kMipsBitsPerWord); + __ Beqz(TMP, &done); + __ Move(dst_low, dst_high); + __ Move(dst_high, ZERO); + } + __ Bind(&done); + } + break; + } + + default: + LOG(FATAL) << "Unexpected shift operation type " << type; + } +} + +void LocationsBuilderMIPS::VisitAdd(HAdd* instruction) { + HandleBinaryOp(instruction); +} + +void InstructionCodeGeneratorMIPS::VisitAdd(HAdd* instruction) { + HandleBinaryOp(instruction); +} + +void LocationsBuilderMIPS::VisitAnd(HAnd* instruction) { + HandleBinaryOp(instruction); +} + +void InstructionCodeGeneratorMIPS::VisitAnd(HAnd* instruction) { + HandleBinaryOp(instruction); +} + +void LocationsBuilderMIPS::VisitArrayGet(HArrayGet* instruction) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall); + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetInAt(1, Location::RegisterOrConstant(instruction->InputAt(1))); + if (Primitive::IsFloatingPointType(instruction->GetType())) { + locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap); + } else { + locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); + } +} + +void InstructionCodeGeneratorMIPS::VisitArrayGet(HArrayGet* instruction) { + LocationSummary* locations = instruction->GetLocations(); + Register obj = locations->InAt(0).AsRegister<Register>(); + Location index = locations->InAt(1); + Primitive::Type type = instruction->GetType(); + + switch (type) { + case Primitive::kPrimBoolean: { + uint32_t data_offset = mirror::Array::DataOffset(sizeof(uint8_t)).Uint32Value(); + Register out = locations->Out().AsRegister<Register>(); + if (index.IsConstant()) { + size_t offset = + (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_1) + data_offset; + __ LoadFromOffset(kLoadUnsignedByte, out, obj, offset); + } else { + __ Addu(TMP, obj, index.AsRegister<Register>()); + __ LoadFromOffset(kLoadUnsignedByte, out, TMP, data_offset); + } + break; + } + + case Primitive::kPrimByte: { + uint32_t data_offset = mirror::Array::DataOffset(sizeof(int8_t)).Uint32Value(); + Register out = locations->Out().AsRegister<Register>(); + if (index.IsConstant()) { + size_t offset = + (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_1) + data_offset; + __ LoadFromOffset(kLoadSignedByte, out, obj, offset); + } else { + __ Addu(TMP, obj, index.AsRegister<Register>()); + __ LoadFromOffset(kLoadSignedByte, out, TMP, data_offset); + } + break; + } + + case Primitive::kPrimShort: { + uint32_t data_offset = mirror::Array::DataOffset(sizeof(int16_t)).Uint32Value(); + Register out = locations->Out().AsRegister<Register>(); + if (index.IsConstant()) { + size_t offset = + (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset; + __ LoadFromOffset(kLoadSignedHalfword, out, obj, offset); + } else { + __ Sll(TMP, index.AsRegister<Register>(), TIMES_2); + __ Addu(TMP, obj, TMP); + __ LoadFromOffset(kLoadSignedHalfword, out, TMP, data_offset); + } + break; + } + + case Primitive::kPrimChar: { + uint32_t data_offset = mirror::Array::DataOffset(sizeof(uint16_t)).Uint32Value(); + Register out = locations->Out().AsRegister<Register>(); + if (index.IsConstant()) { + size_t offset = + (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset; + __ LoadFromOffset(kLoadUnsignedHalfword, out, obj, offset); + } else { + __ Sll(TMP, index.AsRegister<Register>(), TIMES_2); + __ Addu(TMP, obj, TMP); + __ LoadFromOffset(kLoadUnsignedHalfword, out, TMP, data_offset); + } + break; + } + + case Primitive::kPrimInt: + case Primitive::kPrimNot: { + DCHECK_EQ(sizeof(mirror::HeapReference<mirror::Object>), sizeof(int32_t)); + uint32_t data_offset = mirror::Array::DataOffset(sizeof(int32_t)).Uint32Value(); + Register out = locations->Out().AsRegister<Register>(); + if (index.IsConstant()) { + size_t offset = + (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset; + __ LoadFromOffset(kLoadWord, out, obj, offset); + } else { + __ Sll(TMP, index.AsRegister<Register>(), TIMES_4); + __ Addu(TMP, obj, TMP); + __ LoadFromOffset(kLoadWord, out, TMP, data_offset); + } + break; + } + + case Primitive::kPrimLong: { + uint32_t data_offset = mirror::Array::DataOffset(sizeof(int64_t)).Uint32Value(); + Register out = locations->Out().AsRegisterPairLow<Register>(); + if (index.IsConstant()) { + size_t offset = + (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset; + __ LoadFromOffset(kLoadDoubleword, out, obj, offset); + } else { + __ Sll(TMP, index.AsRegister<Register>(), TIMES_8); + __ Addu(TMP, obj, TMP); + __ LoadFromOffset(kLoadDoubleword, out, TMP, data_offset); + } + break; + } + + case Primitive::kPrimFloat: { + uint32_t data_offset = mirror::Array::DataOffset(sizeof(float)).Uint32Value(); + FRegister out = locations->Out().AsFpuRegister<FRegister>(); + if (index.IsConstant()) { + size_t offset = + (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset; + __ LoadSFromOffset(out, obj, offset); + } else { + __ Sll(TMP, index.AsRegister<Register>(), TIMES_4); + __ Addu(TMP, obj, TMP); + __ LoadSFromOffset(out, TMP, data_offset); + } + break; + } + + case Primitive::kPrimDouble: { + uint32_t data_offset = mirror::Array::DataOffset(sizeof(double)).Uint32Value(); + FRegister out = locations->Out().AsFpuRegister<FRegister>(); + if (index.IsConstant()) { + size_t offset = + (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset; + __ LoadDFromOffset(out, obj, offset); + } else { + __ Sll(TMP, index.AsRegister<Register>(), TIMES_8); + __ Addu(TMP, obj, TMP); + __ LoadDFromOffset(out, TMP, data_offset); + } + break; + } + + case Primitive::kPrimVoid: + LOG(FATAL) << "Unreachable type " << instruction->GetType(); + UNREACHABLE(); + } + codegen_->MaybeRecordImplicitNullCheck(instruction); +} + +void LocationsBuilderMIPS::VisitArrayLength(HArrayLength* instruction) { + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction); + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); +} + +void InstructionCodeGeneratorMIPS::VisitArrayLength(HArrayLength* instruction) { + LocationSummary* locations = instruction->GetLocations(); + uint32_t offset = mirror::Array::LengthOffset().Uint32Value(); + Register obj = locations->InAt(0).AsRegister<Register>(); + Register out = locations->Out().AsRegister<Register>(); + __ LoadFromOffset(kLoadWord, out, obj, offset); + codegen_->MaybeRecordImplicitNullCheck(instruction); +} + +void LocationsBuilderMIPS::VisitArraySet(HArraySet* instruction) { + Primitive::Type value_type = instruction->GetComponentType(); + bool is_object = value_type == Primitive::kPrimNot; + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary( + instruction, + is_object ? LocationSummary::kCall : LocationSummary::kNoCall); + if (is_object) { + InvokeRuntimeCallingConvention calling_convention; + locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0))); + locations->SetInAt(1, Location::RegisterLocation(calling_convention.GetRegisterAt(1))); + locations->SetInAt(2, Location::RegisterLocation(calling_convention.GetRegisterAt(2))); + } else { + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetInAt(1, Location::RegisterOrConstant(instruction->InputAt(1))); + if (Primitive::IsFloatingPointType(instruction->InputAt(2)->GetType())) { + locations->SetInAt(2, Location::RequiresFpuRegister()); + } else { + locations->SetInAt(2, Location::RequiresRegister()); + } + } +} + +void InstructionCodeGeneratorMIPS::VisitArraySet(HArraySet* instruction) { + LocationSummary* locations = instruction->GetLocations(); + Register obj = locations->InAt(0).AsRegister<Register>(); + Location index = locations->InAt(1); + Primitive::Type value_type = instruction->GetComponentType(); + bool needs_runtime_call = locations->WillCall(); + bool needs_write_barrier = + CodeGenerator::StoreNeedsWriteBarrier(value_type, instruction->GetValue()); + + switch (value_type) { + case Primitive::kPrimBoolean: + case Primitive::kPrimByte: { + uint32_t data_offset = mirror::Array::DataOffset(sizeof(uint8_t)).Uint32Value(); + Register value = locations->InAt(2).AsRegister<Register>(); + if (index.IsConstant()) { + size_t offset = + (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_1) + data_offset; + __ StoreToOffset(kStoreByte, value, obj, offset); + } else { + __ Addu(TMP, obj, index.AsRegister<Register>()); + __ StoreToOffset(kStoreByte, value, TMP, data_offset); + } + break; + } + + case Primitive::kPrimShort: + case Primitive::kPrimChar: { + uint32_t data_offset = mirror::Array::DataOffset(sizeof(uint16_t)).Uint32Value(); + Register value = locations->InAt(2).AsRegister<Register>(); + if (index.IsConstant()) { + size_t offset = + (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_2) + data_offset; + __ StoreToOffset(kStoreHalfword, value, obj, offset); + } else { + __ Sll(TMP, index.AsRegister<Register>(), TIMES_2); + __ Addu(TMP, obj, TMP); + __ StoreToOffset(kStoreHalfword, value, TMP, data_offset); + } + break; + } + + case Primitive::kPrimInt: + case Primitive::kPrimNot: { + if (!needs_runtime_call) { + uint32_t data_offset = mirror::Array::DataOffset(sizeof(int32_t)).Uint32Value(); + Register value = locations->InAt(2).AsRegister<Register>(); + if (index.IsConstant()) { + size_t offset = + (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset; + __ StoreToOffset(kStoreWord, value, obj, offset); + } else { + DCHECK(index.IsRegister()) << index; + __ Sll(TMP, index.AsRegister<Register>(), TIMES_4); + __ Addu(TMP, obj, TMP); + __ StoreToOffset(kStoreWord, value, TMP, data_offset); + } + codegen_->MaybeRecordImplicitNullCheck(instruction); + if (needs_write_barrier) { + DCHECK_EQ(value_type, Primitive::kPrimNot); + codegen_->MarkGCCard(obj, value); + } + } else { + DCHECK_EQ(value_type, Primitive::kPrimNot); + codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pAputObject), + instruction, + instruction->GetDexPc(), + nullptr, + IsDirectEntrypoint(kQuickAputObject)); + CheckEntrypointTypes<kQuickAputObject, void, mirror::Array*, int32_t, mirror::Object*>(); + } + break; + } + + case Primitive::kPrimLong: { + uint32_t data_offset = mirror::Array::DataOffset(sizeof(int64_t)).Uint32Value(); + Register value = locations->InAt(2).AsRegisterPairLow<Register>(); + if (index.IsConstant()) { + size_t offset = + (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset; + __ StoreToOffset(kStoreDoubleword, value, obj, offset); + } else { + __ Sll(TMP, index.AsRegister<Register>(), TIMES_8); + __ Addu(TMP, obj, TMP); + __ StoreToOffset(kStoreDoubleword, value, TMP, data_offset); + } + break; + } + + case Primitive::kPrimFloat: { + uint32_t data_offset = mirror::Array::DataOffset(sizeof(float)).Uint32Value(); + FRegister value = locations->InAt(2).AsFpuRegister<FRegister>(); + DCHECK(locations->InAt(2).IsFpuRegister()); + if (index.IsConstant()) { + size_t offset = + (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_4) + data_offset; + __ StoreSToOffset(value, obj, offset); + } else { + __ Sll(TMP, index.AsRegister<Register>(), TIMES_4); + __ Addu(TMP, obj, TMP); + __ StoreSToOffset(value, TMP, data_offset); + } + break; + } + + case Primitive::kPrimDouble: { + uint32_t data_offset = mirror::Array::DataOffset(sizeof(double)).Uint32Value(); + FRegister value = locations->InAt(2).AsFpuRegister<FRegister>(); + DCHECK(locations->InAt(2).IsFpuRegister()); + if (index.IsConstant()) { + size_t offset = + (index.GetConstant()->AsIntConstant()->GetValue() << TIMES_8) + data_offset; + __ StoreDToOffset(value, obj, offset); + } else { + __ Sll(TMP, index.AsRegister<Register>(), TIMES_8); + __ Addu(TMP, obj, TMP); + __ StoreDToOffset(value, TMP, data_offset); + } + break; + } + + case Primitive::kPrimVoid: + LOG(FATAL) << "Unreachable type " << instruction->GetType(); + UNREACHABLE(); + } + + // Ints and objects are handled in the switch. + if (value_type != Primitive::kPrimInt && value_type != Primitive::kPrimNot) { + codegen_->MaybeRecordImplicitNullCheck(instruction); + } +} + +void LocationsBuilderMIPS::VisitBoundsCheck(HBoundsCheck* instruction) { + LocationSummary::CallKind call_kind = instruction->CanThrowIntoCatchBlock() + ? LocationSummary::kCallOnSlowPath + : LocationSummary::kNoCall; + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind); + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetInAt(1, Location::RequiresRegister()); + if (instruction->HasUses()) { + locations->SetOut(Location::SameAsFirstInput()); + } +} + +void InstructionCodeGeneratorMIPS::VisitBoundsCheck(HBoundsCheck* instruction) { + LocationSummary* locations = instruction->GetLocations(); + BoundsCheckSlowPathMIPS* slow_path = + new (GetGraph()->GetArena()) BoundsCheckSlowPathMIPS(instruction); + codegen_->AddSlowPath(slow_path); + + Register index = locations->InAt(0).AsRegister<Register>(); + Register length = locations->InAt(1).AsRegister<Register>(); + + // length is limited by the maximum positive signed 32-bit integer. + // Unsigned comparison of length and index checks for index < 0 + // and for length <= index simultaneously. + __ Bgeu(index, length, slow_path->GetEntryLabel()); +} + +void LocationsBuilderMIPS::VisitCheckCast(HCheckCast* instruction) { + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary( + instruction, + LocationSummary::kCallOnSlowPath); + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetInAt(1, Location::RequiresRegister()); + // Note that TypeCheckSlowPathMIPS uses this register too. + locations->AddTemp(Location::RequiresRegister()); +} + +void InstructionCodeGeneratorMIPS::VisitCheckCast(HCheckCast* instruction) { + LocationSummary* locations = instruction->GetLocations(); + Register obj = locations->InAt(0).AsRegister<Register>(); + Register cls = locations->InAt(1).AsRegister<Register>(); + Register obj_cls = locations->GetTemp(0).AsRegister<Register>(); + + SlowPathCodeMIPS* slow_path = new (GetGraph()->GetArena()) TypeCheckSlowPathMIPS(instruction); + codegen_->AddSlowPath(slow_path); + + // TODO: avoid this check if we know obj is not null. + __ Beqz(obj, slow_path->GetExitLabel()); + // Compare the class of `obj` with `cls`. + __ LoadFromOffset(kLoadWord, obj_cls, obj, mirror::Object::ClassOffset().Int32Value()); + __ Bne(obj_cls, cls, slow_path->GetEntryLabel()); + __ Bind(slow_path->GetExitLabel()); +} + +void LocationsBuilderMIPS::VisitClinitCheck(HClinitCheck* check) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(check, LocationSummary::kCallOnSlowPath); + locations->SetInAt(0, Location::RequiresRegister()); + if (check->HasUses()) { + locations->SetOut(Location::SameAsFirstInput()); + } +} + +void InstructionCodeGeneratorMIPS::VisitClinitCheck(HClinitCheck* check) { + // We assume the class is not null. + SlowPathCodeMIPS* slow_path = new (GetGraph()->GetArena()) LoadClassSlowPathMIPS( + check->GetLoadClass(), + check, + check->GetDexPc(), + true); + codegen_->AddSlowPath(slow_path); + GenerateClassInitializationCheck(slow_path, + check->GetLocations()->InAt(0).AsRegister<Register>()); +} + +void LocationsBuilderMIPS::VisitCompare(HCompare* compare) { + Primitive::Type in_type = compare->InputAt(0)->GetType(); + + LocationSummary::CallKind call_kind = Primitive::IsFloatingPointType(in_type) + ? LocationSummary::kCall + : LocationSummary::kNoCall; + + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(compare, call_kind); + + switch (in_type) { + case Primitive::kPrimLong: + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetInAt(1, Location::RequiresRegister()); + // Output overlaps because it is written before doing the low comparison. + locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap); + break; + + case Primitive::kPrimFloat: + case Primitive::kPrimDouble: { + InvokeRuntimeCallingConvention calling_convention; + locations->SetInAt(0, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(0))); + locations->SetInAt(1, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(1))); + locations->SetOut(calling_convention.GetReturnLocation(Primitive::kPrimInt)); + break; + } + + default: + LOG(FATAL) << "Unexpected type for compare operation " << in_type; + } +} + +void InstructionCodeGeneratorMIPS::VisitCompare(HCompare* instruction) { + LocationSummary* locations = instruction->GetLocations(); + Primitive::Type in_type = instruction->InputAt(0)->GetType(); + + // 0 if: left == right + // 1 if: left > right + // -1 if: left < right + switch (in_type) { + case Primitive::kPrimLong: { + MipsLabel done; + Register res = locations->Out().AsRegister<Register>(); + Register lhs_high = locations->InAt(0).AsRegisterPairHigh<Register>(); + Register lhs_low = locations->InAt(0).AsRegisterPairLow<Register>(); + Register rhs_high = locations->InAt(1).AsRegisterPairHigh<Register>(); + Register rhs_low = locations->InAt(1).AsRegisterPairLow<Register>(); + // TODO: more efficient (direct) comparison with a constant. + __ Slt(TMP, lhs_high, rhs_high); + __ Slt(AT, rhs_high, lhs_high); // Inverted: is actually gt. + __ Subu(res, AT, TMP); // Result -1:1:0 for [ <, >, == ]. + __ Bnez(res, &done); // If we compared ==, check if lower bits are also equal. + __ Sltu(TMP, lhs_low, rhs_low); + __ Sltu(AT, rhs_low, lhs_low); // Inverted: is actually gt. + __ Subu(res, AT, TMP); // Result -1:1:0 for [ <, >, == ]. + __ Bind(&done); + break; + } + + case Primitive::kPrimFloat: + case Primitive::kPrimDouble: { + int32_t entry_point_offset; + bool direct; + if (in_type == Primitive::kPrimFloat) { + if (instruction->IsGtBias()) { + entry_point_offset = QUICK_ENTRY_POINT(pCmpgFloat); + direct = IsDirectEntrypoint(kQuickCmpgFloat); + } else { + entry_point_offset = QUICK_ENTRY_POINT(pCmplFloat); + direct = IsDirectEntrypoint(kQuickCmplFloat); + } + } else { + if (instruction->IsGtBias()) { + entry_point_offset = QUICK_ENTRY_POINT(pCmpgDouble); + direct = IsDirectEntrypoint(kQuickCmpgDouble); + } else { + entry_point_offset = QUICK_ENTRY_POINT(pCmplDouble); + direct = IsDirectEntrypoint(kQuickCmplDouble); + } + } + codegen_->InvokeRuntime(entry_point_offset, + instruction, + instruction->GetDexPc(), + nullptr, + direct); + if (in_type == Primitive::kPrimFloat) { + if (instruction->IsGtBias()) { + CheckEntrypointTypes<kQuickCmpgFloat, int32_t, float, float>(); + } else { + CheckEntrypointTypes<kQuickCmplFloat, int32_t, float, float>(); + } + } else { + if (instruction->IsGtBias()) { + CheckEntrypointTypes<kQuickCmpgDouble, int32_t, double, double>(); + } else { + CheckEntrypointTypes<kQuickCmplDouble, int32_t, double, double>(); + } + } + break; + } + + default: + LOG(FATAL) << "Unimplemented compare type " << in_type; + } +} + +void LocationsBuilderMIPS::VisitCondition(HCondition* instruction) { + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction); + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetInAt(1, Location::RegisterOrConstant(instruction->InputAt(1))); + if (instruction->NeedsMaterialization()) { + locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); + } +} + +void InstructionCodeGeneratorMIPS::VisitCondition(HCondition* instruction) { + if (!instruction->NeedsMaterialization()) { + return; + } + // TODO: generalize to long + DCHECK_NE(instruction->InputAt(0)->GetType(), Primitive::kPrimLong); + + LocationSummary* locations = instruction->GetLocations(); + Register dst = locations->Out().AsRegister<Register>(); + + Register lhs = locations->InAt(0).AsRegister<Register>(); + Location rhs_location = locations->InAt(1); + + Register rhs_reg = ZERO; + int64_t rhs_imm = 0; + bool use_imm = rhs_location.IsConstant(); + if (use_imm) { + rhs_imm = CodeGenerator::GetInt32ValueOf(rhs_location.GetConstant()); + } else { + rhs_reg = rhs_location.AsRegister<Register>(); + } + + IfCondition if_cond = instruction->GetCondition(); + + switch (if_cond) { + case kCondEQ: + case kCondNE: + if (use_imm && IsUint<16>(rhs_imm)) { + __ Xori(dst, lhs, rhs_imm); + } else { + if (use_imm) { + rhs_reg = TMP; + __ LoadConst32(rhs_reg, rhs_imm); + } + __ Xor(dst, lhs, rhs_reg); + } + if (if_cond == kCondEQ) { + __ Sltiu(dst, dst, 1); + } else { + __ Sltu(dst, ZERO, dst); + } + break; + + case kCondLT: + case kCondGE: + if (use_imm && IsInt<16>(rhs_imm)) { + __ Slti(dst, lhs, rhs_imm); + } else { + if (use_imm) { + rhs_reg = TMP; + __ LoadConst32(rhs_reg, rhs_imm); + } + __ Slt(dst, lhs, rhs_reg); + } + if (if_cond == kCondGE) { + // Simulate lhs >= rhs via !(lhs < rhs) since there's + // only the slt instruction but no sge. + __ Xori(dst, dst, 1); + } + break; + + case kCondLE: + case kCondGT: + if (use_imm && IsInt<16>(rhs_imm + 1)) { + // Simulate lhs <= rhs via lhs < rhs + 1. + __ Slti(dst, lhs, rhs_imm + 1); + if (if_cond == kCondGT) { + // Simulate lhs > rhs via !(lhs <= rhs) since there's + // only the slti instruction but no sgti. + __ Xori(dst, dst, 1); + } + } else { + if (use_imm) { + rhs_reg = TMP; + __ LoadConst32(rhs_reg, rhs_imm); + } + __ Slt(dst, rhs_reg, lhs); + if (if_cond == kCondLE) { + // Simulate lhs <= rhs via !(rhs < lhs) since there's + // only the slt instruction but no sle. + __ Xori(dst, dst, 1); + } + } + break; + + case kCondB: + case kCondAE: + // Use sltiu instruction if rhs_imm is in range [0, 32767] or in + // [max_unsigned - 32767 = 0xffff8000, max_unsigned = 0xffffffff]. + if (use_imm && + (IsUint<15>(rhs_imm) || + IsUint<15>(rhs_imm - (MaxInt<uint64_t>(32) - MaxInt<uint64_t>(15))))) { + if (IsUint<15>(rhs_imm)) { + __ Sltiu(dst, lhs, rhs_imm); + } else { + // 16-bit value (in range [0x8000, 0xffff]) passed to sltiu is sign-extended + // and then used as unsigned integer (range [0xffff8000, 0xffffffff]). + __ Sltiu(dst, lhs, rhs_imm - (MaxInt<uint64_t>(32) - MaxInt<uint64_t>(16))); + } + } else { + if (use_imm) { + rhs_reg = TMP; + __ LoadConst32(rhs_reg, rhs_imm); + } + __ Sltu(dst, lhs, rhs_reg); + } + if (if_cond == kCondAE) { + // Simulate lhs >= rhs via !(lhs < rhs) since there's + // only the sltu instruction but no sgeu. + __ Xori(dst, dst, 1); + } + break; + + case kCondBE: + case kCondA: + // Use sltiu instruction if rhs_imm is in range [0, 32766] or in + // [max_unsigned - 32767 - 1 = 0xffff7fff, max_unsigned - 1 = 0xfffffffe]. + // lhs <= rhs is simulated via lhs < rhs + 1. + if (use_imm && (rhs_imm != -1) && + (IsUint<15>(rhs_imm + 1) || + IsUint<15>(rhs_imm + 1 - (MaxInt<uint64_t>(32) - MaxInt<uint64_t>(15))))) { + if (IsUint<15>(rhs_imm + 1)) { + // Simulate lhs <= rhs via lhs < rhs + 1. + __ Sltiu(dst, lhs, rhs_imm + 1); + } else { + // 16-bit value (in range [0x8000, 0xffff]) passed to sltiu is sign-extended + // and then used as unsigned integer (range [0xffff8000, 0xffffffff] where rhs_imm + // is in range [0xffff7fff, 0xfffffffe] since lhs <= rhs is simulated via lhs < rhs + 1). + __ Sltiu(dst, lhs, rhs_imm + 1 - (MaxInt<uint64_t>(32) - MaxInt<uint64_t>(16))); + } + if (if_cond == kCondA) { + // Simulate lhs > rhs via !(lhs <= rhs) since there's + // only the sltiu instruction but no sgtiu. + __ Xori(dst, dst, 1); + } + } else { + if (use_imm) { + rhs_reg = TMP; + __ LoadConst32(rhs_reg, rhs_imm); + } + __ Sltu(dst, rhs_reg, lhs); + if (if_cond == kCondBE) { + // Simulate lhs <= rhs via !(rhs < lhs) since there's + // only the sltu instruction but no sleu. + __ Xori(dst, dst, 1); + } + } + break; + } +} + +void LocationsBuilderMIPS::VisitDiv(HDiv* div) { + Primitive::Type type = div->GetResultType(); + LocationSummary::CallKind call_kind = (type == Primitive::kPrimLong) + ? LocationSummary::kCall + : LocationSummary::kNoCall; + + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(div, call_kind); + + switch (type) { + case Primitive::kPrimInt: + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetInAt(1, Location::RequiresRegister()); + locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); + break; + + case Primitive::kPrimLong: { + InvokeRuntimeCallingConvention calling_convention; + locations->SetInAt(0, Location::RegisterPairLocation( + calling_convention.GetRegisterAt(0), calling_convention.GetRegisterAt(1))); + locations->SetInAt(1, Location::RegisterPairLocation( + calling_convention.GetRegisterAt(2), calling_convention.GetRegisterAt(3))); + locations->SetOut(calling_convention.GetReturnLocation(type)); + break; + } + + case Primitive::kPrimFloat: + case Primitive::kPrimDouble: + locations->SetInAt(0, Location::RequiresFpuRegister()); + locations->SetInAt(1, Location::RequiresFpuRegister()); + locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap); + break; + + default: + LOG(FATAL) << "Unexpected div type " << type; + } +} + +void InstructionCodeGeneratorMIPS::VisitDiv(HDiv* instruction) { + Primitive::Type type = instruction->GetType(); + LocationSummary* locations = instruction->GetLocations(); + bool isR6 = codegen_->GetInstructionSetFeatures().IsR6(); + + switch (type) { + case Primitive::kPrimInt: { + Register dst = locations->Out().AsRegister<Register>(); + Register lhs = locations->InAt(0).AsRegister<Register>(); + Register rhs = locations->InAt(1).AsRegister<Register>(); + if (isR6) { + __ DivR6(dst, lhs, rhs); + } else { + __ DivR2(dst, lhs, rhs); + } + break; + } + case Primitive::kPrimLong: { + codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pLdiv), + instruction, + instruction->GetDexPc(), + nullptr, + IsDirectEntrypoint(kQuickLdiv)); + CheckEntrypointTypes<kQuickLdiv, int64_t, int64_t, int64_t>(); + break; + } + case Primitive::kPrimFloat: + case Primitive::kPrimDouble: { + FRegister dst = locations->Out().AsFpuRegister<FRegister>(); + FRegister lhs = locations->InAt(0).AsFpuRegister<FRegister>(); + FRegister rhs = locations->InAt(1).AsFpuRegister<FRegister>(); + if (type == Primitive::kPrimFloat) { + __ DivS(dst, lhs, rhs); + } else { + __ DivD(dst, lhs, rhs); + } + break; + } + default: + LOG(FATAL) << "Unexpected div type " << type; + } +} + +void LocationsBuilderMIPS::VisitDivZeroCheck(HDivZeroCheck* instruction) { + LocationSummary::CallKind call_kind = instruction->CanThrowIntoCatchBlock() + ? LocationSummary::kCallOnSlowPath + : LocationSummary::kNoCall; + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind); + locations->SetInAt(0, Location::RegisterOrConstant(instruction->InputAt(0))); + if (instruction->HasUses()) { + locations->SetOut(Location::SameAsFirstInput()); + } +} + +void InstructionCodeGeneratorMIPS::VisitDivZeroCheck(HDivZeroCheck* instruction) { + SlowPathCodeMIPS* slow_path = new (GetGraph()->GetArena()) DivZeroCheckSlowPathMIPS(instruction); + codegen_->AddSlowPath(slow_path); + Location value = instruction->GetLocations()->InAt(0); + Primitive::Type type = instruction->GetType(); + + switch (type) { + case Primitive::kPrimByte: + case Primitive::kPrimChar: + case Primitive::kPrimShort: + case Primitive::kPrimInt: { + if (value.IsConstant()) { + if (value.GetConstant()->AsIntConstant()->GetValue() == 0) { + __ B(slow_path->GetEntryLabel()); + } else { + // A division by a non-null constant is valid. We don't need to perform + // any check, so simply fall through. + } + } else { + DCHECK(value.IsRegister()) << value; + __ Beqz(value.AsRegister<Register>(), slow_path->GetEntryLabel()); + } + break; + } + case Primitive::kPrimLong: { + if (value.IsConstant()) { + if (value.GetConstant()->AsLongConstant()->GetValue() == 0) { + __ B(slow_path->GetEntryLabel()); + } else { + // A division by a non-null constant is valid. We don't need to perform + // any check, so simply fall through. + } + } else { + DCHECK(value.IsRegisterPair()) << value; + __ Or(TMP, value.AsRegisterPairHigh<Register>(), value.AsRegisterPairLow<Register>()); + __ Beqz(TMP, slow_path->GetEntryLabel()); + } + break; + } + default: + LOG(FATAL) << "Unexpected type " << type << " for DivZeroCheck."; + } +} + +void LocationsBuilderMIPS::VisitDoubleConstant(HDoubleConstant* constant) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall); + locations->SetOut(Location::ConstantLocation(constant)); +} + +void InstructionCodeGeneratorMIPS::VisitDoubleConstant(HDoubleConstant* cst ATTRIBUTE_UNUSED) { + // Will be generated at use site. +} + +void LocationsBuilderMIPS::VisitExit(HExit* exit) { + exit->SetLocations(nullptr); +} + +void InstructionCodeGeneratorMIPS::VisitExit(HExit* exit ATTRIBUTE_UNUSED) { +} + +void LocationsBuilderMIPS::VisitFloatConstant(HFloatConstant* constant) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall); + locations->SetOut(Location::ConstantLocation(constant)); +} + +void InstructionCodeGeneratorMIPS::VisitFloatConstant(HFloatConstant* constant ATTRIBUTE_UNUSED) { + // Will be generated at use site. +} + +void LocationsBuilderMIPS::VisitGoto(HGoto* got) { + got->SetLocations(nullptr); +} + +void InstructionCodeGeneratorMIPS::HandleGoto(HInstruction* got, HBasicBlock* successor) { + DCHECK(!successor->IsExitBlock()); + HBasicBlock* block = got->GetBlock(); + HInstruction* previous = got->GetPrevious(); + HLoopInformation* info = block->GetLoopInformation(); + + if (info != nullptr && info->IsBackEdge(*block) && info->HasSuspendCheck()) { + codegen_->ClearSpillSlotsFromLoopPhisInStackMap(info->GetSuspendCheck()); + GenerateSuspendCheck(info->GetSuspendCheck(), successor); + return; + } + if (block->IsEntryBlock() && (previous != nullptr) && previous->IsSuspendCheck()) { + GenerateSuspendCheck(previous->AsSuspendCheck(), nullptr); + } + if (!codegen_->GoesToNextBlock(block, successor)) { + __ B(codegen_->GetLabelOf(successor)); + } +} + +void InstructionCodeGeneratorMIPS::VisitGoto(HGoto* got) { + HandleGoto(got, got->GetSuccessor()); +} + +void LocationsBuilderMIPS::VisitTryBoundary(HTryBoundary* try_boundary) { + try_boundary->SetLocations(nullptr); +} + +void InstructionCodeGeneratorMIPS::VisitTryBoundary(HTryBoundary* try_boundary) { + HBasicBlock* successor = try_boundary->GetNormalFlowSuccessor(); + if (!successor->IsExitBlock()) { + HandleGoto(try_boundary, successor); + } +} + +void InstructionCodeGeneratorMIPS::GenerateTestAndBranch(HInstruction* instruction, + MipsLabel* true_target, + MipsLabel* false_target, + MipsLabel* always_true_target) { + HInstruction* cond = instruction->InputAt(0); + HCondition* condition = cond->AsCondition(); + + if (cond->IsIntConstant()) { + int32_t cond_value = cond->AsIntConstant()->GetValue(); + if (cond_value == 1) { + if (always_true_target != nullptr) { + __ B(always_true_target); + } + return; + } else { + DCHECK_EQ(cond_value, 0); + } + } else if (!cond->IsCondition() || condition->NeedsMaterialization()) { + // The condition instruction has been materialized, compare the output to 0. + Location cond_val = instruction->GetLocations()->InAt(0); + DCHECK(cond_val.IsRegister()); + __ Bnez(cond_val.AsRegister<Register>(), true_target); + } else { + // The condition instruction has not been materialized, use its inputs as + // the comparison and its condition as the branch condition. + Register lhs = condition->GetLocations()->InAt(0).AsRegister<Register>(); + Location rhs_location = condition->GetLocations()->InAt(1); + Register rhs_reg = ZERO; + int32_t rhs_imm = 0; + bool use_imm = rhs_location.IsConstant(); + if (use_imm) { + rhs_imm = CodeGenerator::GetInt32ValueOf(rhs_location.GetConstant()); + } else { + rhs_reg = rhs_location.AsRegister<Register>(); + } + + IfCondition if_cond = condition->GetCondition(); + if (use_imm && rhs_imm == 0) { + switch (if_cond) { + case kCondEQ: + __ Beqz(lhs, true_target); + break; + case kCondNE: + __ Bnez(lhs, true_target); + break; + case kCondLT: + __ Bltz(lhs, true_target); + break; + case kCondGE: + __ Bgez(lhs, true_target); + break; + case kCondLE: + __ Blez(lhs, true_target); + break; + case kCondGT: + __ Bgtz(lhs, true_target); + break; + case kCondB: + break; // always false + case kCondBE: + __ Beqz(lhs, true_target); // <= 0 if zero + break; + case kCondA: + __ Bnez(lhs, true_target); // > 0 if non-zero + break; + case kCondAE: + __ B(true_target); // always true + break; + } + } else { + if (use_imm) { + // TODO: more efficient comparison with 16-bit constants without loading them into TMP. + rhs_reg = TMP; + __ LoadConst32(rhs_reg, rhs_imm); + } + switch (if_cond) { + case kCondEQ: + __ Beq(lhs, rhs_reg, true_target); + break; + case kCondNE: + __ Bne(lhs, rhs_reg, true_target); + break; + case kCondLT: + __ Blt(lhs, rhs_reg, true_target); + break; + case kCondGE: + __ Bge(lhs, rhs_reg, true_target); + break; + case kCondLE: + __ Bge(rhs_reg, lhs, true_target); + break; + case kCondGT: + __ Blt(rhs_reg, lhs, true_target); + break; + case kCondB: + __ Bltu(lhs, rhs_reg, true_target); + break; + case kCondAE: + __ Bgeu(lhs, rhs_reg, true_target); + break; + case kCondBE: + __ Bgeu(rhs_reg, lhs, true_target); + break; + case kCondA: + __ Bltu(rhs_reg, lhs, true_target); + break; + } + } + } + if (false_target != nullptr) { + __ B(false_target); + } +} + +void LocationsBuilderMIPS::VisitIf(HIf* if_instr) { + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(if_instr); + HInstruction* cond = if_instr->InputAt(0); + if (!cond->IsCondition() || cond->AsCondition()->NeedsMaterialization()) { + locations->SetInAt(0, Location::RequiresRegister()); + } +} + +void InstructionCodeGeneratorMIPS::VisitIf(HIf* if_instr) { + MipsLabel* true_target = codegen_->GetLabelOf(if_instr->IfTrueSuccessor()); + MipsLabel* false_target = codegen_->GetLabelOf(if_instr->IfFalseSuccessor()); + MipsLabel* always_true_target = true_target; + if (codegen_->GoesToNextBlock(if_instr->GetBlock(), + if_instr->IfTrueSuccessor())) { + always_true_target = nullptr; + } + if (codegen_->GoesToNextBlock(if_instr->GetBlock(), + if_instr->IfFalseSuccessor())) { + false_target = nullptr; + } + GenerateTestAndBranch(if_instr, true_target, false_target, always_true_target); +} + +void LocationsBuilderMIPS::VisitDeoptimize(HDeoptimize* deoptimize) { + LocationSummary* locations = new (GetGraph()->GetArena()) + LocationSummary(deoptimize, LocationSummary::kCallOnSlowPath); + HInstruction* cond = deoptimize->InputAt(0); + if (!cond->IsCondition() || cond->AsCondition()->NeedsMaterialization()) { + locations->SetInAt(0, Location::RequiresRegister()); + } +} + +void InstructionCodeGeneratorMIPS::VisitDeoptimize(HDeoptimize* deoptimize) { + SlowPathCodeMIPS* slow_path = new (GetGraph()->GetArena()) + DeoptimizationSlowPathMIPS(deoptimize); + codegen_->AddSlowPath(slow_path); + MipsLabel* slow_path_entry = slow_path->GetEntryLabel(); + GenerateTestAndBranch(deoptimize, slow_path_entry, nullptr, slow_path_entry); +} + +void LocationsBuilderMIPS::HandleFieldGet(HInstruction* instruction, const FieldInfo& field_info) { + Primitive::Type field_type = field_info.GetFieldType(); + bool is_wide = (field_type == Primitive::kPrimLong) || (field_type == Primitive::kPrimDouble); + bool generate_volatile = field_info.IsVolatile() && is_wide; + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary( + instruction, generate_volatile ? LocationSummary::kCall : LocationSummary::kNoCall); + + locations->SetInAt(0, Location::RequiresRegister()); + if (generate_volatile) { + InvokeRuntimeCallingConvention calling_convention; + // need A0 to hold base + offset + locations->AddTemp(Location::RegisterLocation(calling_convention.GetRegisterAt(0))); + if (field_type == Primitive::kPrimLong) { + locations->SetOut(calling_convention.GetReturnLocation(Primitive::kPrimLong)); + } else { + locations->SetOut(Location::RequiresFpuRegister()); + // Need some temp core regs since FP results are returned in core registers + Location reg = calling_convention.GetReturnLocation(Primitive::kPrimLong); + locations->AddTemp(Location::RegisterLocation(reg.AsRegisterPairLow<Register>())); + locations->AddTemp(Location::RegisterLocation(reg.AsRegisterPairHigh<Register>())); + } + } else { + if (Primitive::IsFloatingPointType(instruction->GetType())) { + locations->SetOut(Location::RequiresFpuRegister()); + } else { + locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); + } + } +} + +void InstructionCodeGeneratorMIPS::HandleFieldGet(HInstruction* instruction, + const FieldInfo& field_info, + uint32_t dex_pc) { + Primitive::Type type = field_info.GetFieldType(); + LocationSummary* locations = instruction->GetLocations(); + Register obj = locations->InAt(0).AsRegister<Register>(); + LoadOperandType load_type = kLoadUnsignedByte; + bool is_volatile = field_info.IsVolatile(); + + switch (type) { + case Primitive::kPrimBoolean: + load_type = kLoadUnsignedByte; + break; + case Primitive::kPrimByte: + load_type = kLoadSignedByte; + break; + case Primitive::kPrimShort: + load_type = kLoadSignedHalfword; + break; + case Primitive::kPrimChar: + load_type = kLoadUnsignedHalfword; + break; + case Primitive::kPrimInt: + case Primitive::kPrimFloat: + case Primitive::kPrimNot: + load_type = kLoadWord; + break; + case Primitive::kPrimLong: + case Primitive::kPrimDouble: + load_type = kLoadDoubleword; + break; + case Primitive::kPrimVoid: + LOG(FATAL) << "Unreachable type " << type; + UNREACHABLE(); + } + + if (is_volatile && load_type == kLoadDoubleword) { + InvokeRuntimeCallingConvention calling_convention; + __ Addiu32(locations->GetTemp(0).AsRegister<Register>(), + obj, field_info.GetFieldOffset().Uint32Value()); + // Do implicit Null check + __ Lw(ZERO, locations->GetTemp(0).AsRegister<Register>(), 0); + codegen_->RecordPcInfo(instruction, instruction->GetDexPc()); + codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pA64Load), + instruction, + dex_pc, + nullptr, + IsDirectEntrypoint(kQuickA64Load)); + CheckEntrypointTypes<kQuickA64Load, int64_t, volatile const int64_t*>(); + if (type == Primitive::kPrimDouble) { + // Need to move to FP regs since FP results are returned in core registers. + __ Mtc1(locations->GetTemp(1).AsRegister<Register>(), + locations->Out().AsFpuRegister<FRegister>()); + __ Mthc1(locations->GetTemp(2).AsRegister<Register>(), + locations->Out().AsFpuRegister<FRegister>()); + } + } else { + if (!Primitive::IsFloatingPointType(type)) { + Register dst; + if (type == Primitive::kPrimLong) { + DCHECK(locations->Out().IsRegisterPair()); + dst = locations->Out().AsRegisterPairLow<Register>(); + } else { + DCHECK(locations->Out().IsRegister()); + dst = locations->Out().AsRegister<Register>(); + } + __ LoadFromOffset(load_type, dst, obj, field_info.GetFieldOffset().Uint32Value()); + } else { + DCHECK(locations->Out().IsFpuRegister()); + FRegister dst = locations->Out().AsFpuRegister<FRegister>(); + if (type == Primitive::kPrimFloat) { + __ LoadSFromOffset(dst, obj, field_info.GetFieldOffset().Uint32Value()); + } else { + __ LoadDFromOffset(dst, obj, field_info.GetFieldOffset().Uint32Value()); + } + } + codegen_->MaybeRecordImplicitNullCheck(instruction); + } + + if (is_volatile) { + GenerateMemoryBarrier(MemBarrierKind::kLoadAny); + } +} + +void LocationsBuilderMIPS::HandleFieldSet(HInstruction* instruction, const FieldInfo& field_info) { + Primitive::Type field_type = field_info.GetFieldType(); + bool is_wide = (field_type == Primitive::kPrimLong) || (field_type == Primitive::kPrimDouble); + bool generate_volatile = field_info.IsVolatile() && is_wide; + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary( + instruction, generate_volatile ? LocationSummary::kCall : LocationSummary::kNoCall); + + locations->SetInAt(0, Location::RequiresRegister()); + if (generate_volatile) { + InvokeRuntimeCallingConvention calling_convention; + // need A0 to hold base + offset + locations->AddTemp(Location::RegisterLocation(calling_convention.GetRegisterAt(0))); + if (field_type == Primitive::kPrimLong) { + locations->SetInAt(1, Location::RegisterPairLocation( + calling_convention.GetRegisterAt(2), calling_convention.GetRegisterAt(3))); + } else { + locations->SetInAt(1, Location::RequiresFpuRegister()); + // Pass FP parameters in core registers. + locations->AddTemp(Location::RegisterLocation(calling_convention.GetRegisterAt(2))); + locations->AddTemp(Location::RegisterLocation(calling_convention.GetRegisterAt(3))); + } + } else { + if (Primitive::IsFloatingPointType(field_type)) { + locations->SetInAt(1, Location::RequiresFpuRegister()); + } else { + locations->SetInAt(1, Location::RequiresRegister()); + } + } +} + +void InstructionCodeGeneratorMIPS::HandleFieldSet(HInstruction* instruction, + const FieldInfo& field_info, + uint32_t dex_pc) { + Primitive::Type type = field_info.GetFieldType(); + LocationSummary* locations = instruction->GetLocations(); + Register obj = locations->InAt(0).AsRegister<Register>(); + StoreOperandType store_type = kStoreByte; + bool is_volatile = field_info.IsVolatile(); + + switch (type) { + case Primitive::kPrimBoolean: + case Primitive::kPrimByte: + store_type = kStoreByte; + break; + case Primitive::kPrimShort: + case Primitive::kPrimChar: + store_type = kStoreHalfword; + break; + case Primitive::kPrimInt: + case Primitive::kPrimFloat: + case Primitive::kPrimNot: + store_type = kStoreWord; + break; + case Primitive::kPrimLong: + case Primitive::kPrimDouble: + store_type = kStoreDoubleword; + break; + case Primitive::kPrimVoid: + LOG(FATAL) << "Unreachable type " << type; + UNREACHABLE(); + } + + if (is_volatile) { + GenerateMemoryBarrier(MemBarrierKind::kAnyStore); + } + + if (is_volatile && store_type == kStoreDoubleword) { + InvokeRuntimeCallingConvention calling_convention; + __ Addiu32(locations->GetTemp(0).AsRegister<Register>(), + obj, field_info.GetFieldOffset().Uint32Value()); + // Do implicit Null check. + __ Lw(ZERO, locations->GetTemp(0).AsRegister<Register>(), 0); + codegen_->RecordPcInfo(instruction, instruction->GetDexPc()); + if (type == Primitive::kPrimDouble) { + // Pass FP parameters in core registers. + __ Mfc1(locations->GetTemp(1).AsRegister<Register>(), + locations->InAt(1).AsFpuRegister<FRegister>()); + __ Mfhc1(locations->GetTemp(2).AsRegister<Register>(), + locations->InAt(1).AsFpuRegister<FRegister>()); + } + codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pA64Store), + instruction, + dex_pc, + nullptr, + IsDirectEntrypoint(kQuickA64Store)); + CheckEntrypointTypes<kQuickA64Store, void, volatile int64_t *, int64_t>(); + } else { + if (!Primitive::IsFloatingPointType(type)) { + Register src; + if (type == Primitive::kPrimLong) { + DCHECK(locations->InAt(1).IsRegisterPair()); + src = locations->InAt(1).AsRegisterPairLow<Register>(); + } else { + DCHECK(locations->InAt(1).IsRegister()); + src = locations->InAt(1).AsRegister<Register>(); + } + __ StoreToOffset(store_type, src, obj, field_info.GetFieldOffset().Uint32Value()); + } else { + DCHECK(locations->InAt(1).IsFpuRegister()); + FRegister src = locations->InAt(1).AsFpuRegister<FRegister>(); + if (type == Primitive::kPrimFloat) { + __ StoreSToOffset(src, obj, field_info.GetFieldOffset().Uint32Value()); + } else { + __ StoreDToOffset(src, obj, field_info.GetFieldOffset().Uint32Value()); + } + } + codegen_->MaybeRecordImplicitNullCheck(instruction); + } + + // TODO: memory barriers? + if (CodeGenerator::StoreNeedsWriteBarrier(type, instruction->InputAt(1))) { + DCHECK(locations->InAt(1).IsRegister()); + Register src = locations->InAt(1).AsRegister<Register>(); + codegen_->MarkGCCard(obj, src); + } + + if (is_volatile) { + GenerateMemoryBarrier(MemBarrierKind::kAnyAny); + } +} + +void LocationsBuilderMIPS::VisitInstanceFieldGet(HInstanceFieldGet* instruction) { + HandleFieldGet(instruction, instruction->GetFieldInfo()); +} + +void InstructionCodeGeneratorMIPS::VisitInstanceFieldGet(HInstanceFieldGet* instruction) { + HandleFieldGet(instruction, instruction->GetFieldInfo(), instruction->GetDexPc()); +} + +void LocationsBuilderMIPS::VisitInstanceFieldSet(HInstanceFieldSet* instruction) { + HandleFieldSet(instruction, instruction->GetFieldInfo()); +} + +void InstructionCodeGeneratorMIPS::VisitInstanceFieldSet(HInstanceFieldSet* instruction) { + HandleFieldSet(instruction, instruction->GetFieldInfo(), instruction->GetDexPc()); +} + +void LocationsBuilderMIPS::VisitInstanceOf(HInstanceOf* instruction) { + LocationSummary::CallKind call_kind = + instruction->IsExactCheck() ? LocationSummary::kNoCall : LocationSummary::kCallOnSlowPath; + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind); + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetInAt(1, Location::RequiresRegister()); + // The output does overlap inputs. + // Note that TypeCheckSlowPathMIPS uses this register too. + locations->SetOut(Location::RequiresRegister(), Location::kOutputOverlap); +} + +void InstructionCodeGeneratorMIPS::VisitInstanceOf(HInstanceOf* instruction) { + LocationSummary* locations = instruction->GetLocations(); + Register obj = locations->InAt(0).AsRegister<Register>(); + Register cls = locations->InAt(1).AsRegister<Register>(); + Register out = locations->Out().AsRegister<Register>(); + + MipsLabel done; + + // Return 0 if `obj` is null. + // TODO: Avoid this check if we know `obj` is not null. + __ Move(out, ZERO); + __ Beqz(obj, &done); + + // Compare the class of `obj` with `cls`. + __ LoadFromOffset(kLoadWord, out, obj, mirror::Object::ClassOffset().Int32Value()); + if (instruction->IsExactCheck()) { + // Classes must be equal for the instanceof to succeed. + __ Xor(out, out, cls); + __ Sltiu(out, out, 1); + } else { + // If the classes are not equal, we go into a slow path. + DCHECK(locations->OnlyCallsOnSlowPath()); + SlowPathCodeMIPS* slow_path = new (GetGraph()->GetArena()) TypeCheckSlowPathMIPS(instruction); + codegen_->AddSlowPath(slow_path); + __ Bne(out, cls, slow_path->GetEntryLabel()); + __ LoadConst32(out, 1); + __ Bind(slow_path->GetExitLabel()); + } + + __ Bind(&done); +} + +void LocationsBuilderMIPS::VisitIntConstant(HIntConstant* constant) { + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(constant); + locations->SetOut(Location::ConstantLocation(constant)); +} + +void InstructionCodeGeneratorMIPS::VisitIntConstant(HIntConstant* constant ATTRIBUTE_UNUSED) { + // Will be generated at use site. +} + +void LocationsBuilderMIPS::VisitNullConstant(HNullConstant* constant) { + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(constant); + locations->SetOut(Location::ConstantLocation(constant)); +} + +void InstructionCodeGeneratorMIPS::VisitNullConstant(HNullConstant* constant ATTRIBUTE_UNUSED) { + // Will be generated at use site. +} + +void LocationsBuilderMIPS::HandleInvoke(HInvoke* invoke) { + InvokeDexCallingConventionVisitorMIPS calling_convention_visitor; + CodeGenerator::CreateCommonInvokeLocationSummary(invoke, &calling_convention_visitor); +} + +void LocationsBuilderMIPS::VisitInvokeInterface(HInvokeInterface* invoke) { + HandleInvoke(invoke); + // The register T0 is required to be used for the hidden argument in + // art_quick_imt_conflict_trampoline, so add the hidden argument. + invoke->GetLocations()->AddTemp(Location::RegisterLocation(T0)); +} + +void InstructionCodeGeneratorMIPS::VisitInvokeInterface(HInvokeInterface* invoke) { + // TODO: b/18116999, our IMTs can miss an IncompatibleClassChangeError. + Register temp = invoke->GetLocations()->GetTemp(0).AsRegister<Register>(); + uint32_t method_offset = mirror::Class::EmbeddedImTableEntryOffset( + invoke->GetImtIndex() % mirror::Class::kImtSize, kMipsPointerSize).Uint32Value(); + Location receiver = invoke->GetLocations()->InAt(0); + uint32_t class_offset = mirror::Object::ClassOffset().Int32Value(); + Offset entry_point = ArtMethod::EntryPointFromQuickCompiledCodeOffset(kMipsWordSize); + + // Set the hidden argument. + __ LoadConst32(invoke->GetLocations()->GetTemp(1).AsRegister<Register>(), + invoke->GetDexMethodIndex()); + + // temp = object->GetClass(); + if (receiver.IsStackSlot()) { + __ LoadFromOffset(kLoadWord, temp, SP, receiver.GetStackIndex()); + __ LoadFromOffset(kLoadWord, temp, temp, class_offset); + } else { + __ LoadFromOffset(kLoadWord, temp, receiver.AsRegister<Register>(), class_offset); + } + codegen_->MaybeRecordImplicitNullCheck(invoke); + // temp = temp->GetImtEntryAt(method_offset); + __ LoadFromOffset(kLoadWord, temp, temp, method_offset); + // T9 = temp->GetEntryPoint(); + __ LoadFromOffset(kLoadWord, T9, temp, entry_point.Int32Value()); + // T9(); + __ Jalr(T9); + __ Nop(); + DCHECK(!codegen_->IsLeafMethod()); + codegen_->RecordPcInfo(invoke, invoke->GetDexPc()); +} + +void LocationsBuilderMIPS::VisitInvokeVirtual(HInvokeVirtual* invoke) { + // TODO: intrinsic function. + HandleInvoke(invoke); +} + +void LocationsBuilderMIPS::VisitInvokeStaticOrDirect(HInvokeStaticOrDirect* invoke) { + // When we do not run baseline, explicit clinit checks triggered by static + // invokes must have been pruned by art::PrepareForRegisterAllocation. + DCHECK(codegen_->IsBaseline() || !invoke->IsStaticWithExplicitClinitCheck()); + + // TODO: intrinsic function. + HandleInvoke(invoke); +} + +static bool TryGenerateIntrinsicCode(HInvoke* invoke, CodeGeneratorMIPS* codegen ATTRIBUTE_UNUSED) { + if (invoke->GetLocations()->Intrinsified()) { + // TODO: intrinsic function. + return true; + } + return false; +} + +HInvokeStaticOrDirect::DispatchInfo CodeGeneratorMIPS::GetSupportedInvokeStaticOrDirectDispatch( + const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, + MethodReference target_method ATTRIBUTE_UNUSED) { + switch (desired_dispatch_info.method_load_kind) { + case HInvokeStaticOrDirect::MethodLoadKind::kDirectAddressWithFixup: + case HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative: + // TODO: Implement these types. For the moment, we fall back to kDexCacheViaMethod. + return HInvokeStaticOrDirect::DispatchInfo { + HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod, + HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod, + 0u, + 0u + }; + default: + break; + } + switch (desired_dispatch_info.code_ptr_location) { + case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup: + case HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative: + // TODO: Implement these types. For the moment, we fall back to kCallArtMethod. + return HInvokeStaticOrDirect::DispatchInfo { + desired_dispatch_info.method_load_kind, + HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod, + desired_dispatch_info.method_load_data, + 0u + }; + default: + return desired_dispatch_info; + } +} + +void CodeGeneratorMIPS::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) { + // All registers are assumed to be correctly set up per the calling convention. + + Location callee_method = temp; // For all kinds except kRecursive, callee will be in temp. + switch (invoke->GetMethodLoadKind()) { + case HInvokeStaticOrDirect::MethodLoadKind::kStringInit: + // temp = thread->string_init_entrypoint + __ LoadFromOffset(kLoadWord, + temp.AsRegister<Register>(), + TR, + invoke->GetStringInitOffset()); + break; + case HInvokeStaticOrDirect::MethodLoadKind::kRecursive: + callee_method = invoke->GetLocations()->InAt(invoke->GetCurrentMethodInputIndex()); + break; + case HInvokeStaticOrDirect::MethodLoadKind::kDirectAddress: + __ LoadConst32(temp.AsRegister<Register>(), invoke->GetMethodAddress()); + break; + case HInvokeStaticOrDirect::MethodLoadKind::kDirectAddressWithFixup: + case HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative: + // TODO: Implement these types. + // Currently filtered out by GetSupportedInvokeStaticOrDirectDispatch(). + LOG(FATAL) << "Unsupported"; + UNREACHABLE(); + case HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod: { + Location current_method = invoke->GetLocations()->InAt(invoke->GetCurrentMethodInputIndex()); + Register reg = temp.AsRegister<Register>(); + Register method_reg; + if (current_method.IsRegister()) { + method_reg = current_method.AsRegister<Register>(); + } else { + // TODO: use the appropriate DCHECK() here if possible. + // DCHECK(invoke->GetLocations()->Intrinsified()); + DCHECK(!current_method.IsValid()); + method_reg = reg; + __ Lw(reg, SP, kCurrentMethodStackOffset); + } + + // temp = temp->dex_cache_resolved_methods_; + __ LoadFromOffset(kLoadWord, + reg, + method_reg, + ArtMethod::DexCacheResolvedMethodsOffset(kMipsPointerSize).Int32Value()); + // temp = temp[index_in_cache] + uint32_t index_in_cache = invoke->GetTargetMethod().dex_method_index; + __ LoadFromOffset(kLoadWord, + reg, + reg, + CodeGenerator::GetCachePointerOffset(index_in_cache)); + break; + } + } + + switch (invoke->GetCodePtrLocation()) { + case HInvokeStaticOrDirect::CodePtrLocation::kCallSelf: + __ Jalr(&frame_entry_label_, T9); + break; + case HInvokeStaticOrDirect::CodePtrLocation::kCallDirect: + // LR = invoke->GetDirectCodePtr(); + __ LoadConst32(T9, invoke->GetDirectCodePtr()); + // LR() + __ Jalr(T9); + __ Nop(); + break; + case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup: + case HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative: + // TODO: Implement these types. + // Currently filtered out by GetSupportedInvokeStaticOrDirectDispatch(). + LOG(FATAL) << "Unsupported"; + UNREACHABLE(); + case HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod: + // T9 = callee_method->entry_point_from_quick_compiled_code_; + __ LoadFromOffset(kLoadWord, + T9, + callee_method.AsRegister<Register>(), + ArtMethod::EntryPointFromQuickCompiledCodeOffset( + kMipsWordSize).Int32Value()); + // T9() + __ Jalr(T9); + __ Nop(); + break; + } + DCHECK(!IsLeafMethod()); +} + +void InstructionCodeGeneratorMIPS::VisitInvokeStaticOrDirect(HInvokeStaticOrDirect* invoke) { + // When we do not run baseline, explicit clinit checks triggered by static + // invokes must have been pruned by art::PrepareForRegisterAllocation. + DCHECK(codegen_->IsBaseline() || !invoke->IsStaticWithExplicitClinitCheck()); + + if (TryGenerateIntrinsicCode(invoke, codegen_)) { + return; + } + + LocationSummary* locations = invoke->GetLocations(); + codegen_->GenerateStaticOrDirectCall(invoke, + locations->HasTemps() + ? locations->GetTemp(0) + : Location::NoLocation()); + codegen_->RecordPcInfo(invoke, invoke->GetDexPc()); +} + +void InstructionCodeGeneratorMIPS::VisitInvokeVirtual(HInvokeVirtual* invoke) { + // TODO: Try to generate intrinsics code. + LocationSummary* locations = invoke->GetLocations(); + Location receiver = locations->InAt(0); + Register temp = invoke->GetLocations()->GetTemp(0).AsRegister<Register>(); + size_t method_offset = mirror::Class::EmbeddedVTableEntryOffset( + invoke->GetVTableIndex(), kMipsPointerSize).SizeValue(); + uint32_t class_offset = mirror::Object::ClassOffset().Int32Value(); + Offset entry_point = ArtMethod::EntryPointFromQuickCompiledCodeOffset(kMipsWordSize); + + // temp = object->GetClass(); + if (receiver.IsStackSlot()) { + __ LoadFromOffset(kLoadWord, temp, SP, receiver.GetStackIndex()); + __ LoadFromOffset(kLoadWord, temp, temp, class_offset); + } else { + DCHECK(receiver.IsRegister()); + __ LoadFromOffset(kLoadWord, temp, receiver.AsRegister<Register>(), class_offset); + } + codegen_->MaybeRecordImplicitNullCheck(invoke); + // temp = temp->GetMethodAt(method_offset); + __ LoadFromOffset(kLoadWord, temp, temp, method_offset); + // T9 = temp->GetEntryPoint(); + __ LoadFromOffset(kLoadWord, T9, temp, entry_point.Int32Value()); + // T9(); + __ Jalr(T9); + __ Nop(); + DCHECK(!codegen_->IsLeafMethod()); + codegen_->RecordPcInfo(invoke, invoke->GetDexPc()); +} + +void LocationsBuilderMIPS::VisitLoadClass(HLoadClass* cls) { + LocationSummary::CallKind call_kind = cls->CanCallRuntime() ? LocationSummary::kCallOnSlowPath + : LocationSummary::kNoCall; + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(cls, call_kind); + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetOut(Location::RequiresRegister()); +} + +void InstructionCodeGeneratorMIPS::VisitLoadClass(HLoadClass* cls) { + LocationSummary* locations = cls->GetLocations(); + Register out = locations->Out().AsRegister<Register>(); + Register current_method = locations->InAt(0).AsRegister<Register>(); + if (cls->IsReferrersClass()) { + DCHECK(!cls->CanCallRuntime()); + DCHECK(!cls->MustGenerateClinitCheck()); + __ LoadFromOffset(kLoadWord, out, current_method, + ArtMethod::DeclaringClassOffset().Int32Value()); + } else { + DCHECK(cls->CanCallRuntime()); + __ LoadFromOffset(kLoadWord, out, current_method, + ArtMethod::DexCacheResolvedTypesOffset(kMipsPointerSize).Int32Value()); + __ LoadFromOffset(kLoadWord, out, out, CodeGenerator::GetCacheOffset(cls->GetTypeIndex())); + SlowPathCodeMIPS* slow_path = new (GetGraph()->GetArena()) LoadClassSlowPathMIPS( + cls, + cls, + cls->GetDexPc(), + cls->MustGenerateClinitCheck()); + codegen_->AddSlowPath(slow_path); + __ Beqz(out, slow_path->GetEntryLabel()); + if (cls->MustGenerateClinitCheck()) { + GenerateClassInitializationCheck(slow_path, out); + } else { + __ Bind(slow_path->GetExitLabel()); + } + } +} + +static int32_t GetExceptionTlsOffset() { + return Thread::ExceptionOffset<kMipsWordSize>().Int32Value(); +} + +void LocationsBuilderMIPS::VisitLoadException(HLoadException* load) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(load, LocationSummary::kNoCall); + locations->SetOut(Location::RequiresRegister()); +} + +void InstructionCodeGeneratorMIPS::VisitLoadException(HLoadException* load) { + Register out = load->GetLocations()->Out().AsRegister<Register>(); + __ LoadFromOffset(kLoadWord, out, TR, GetExceptionTlsOffset()); +} + +void LocationsBuilderMIPS::VisitClearException(HClearException* clear) { + new (GetGraph()->GetArena()) LocationSummary(clear, LocationSummary::kNoCall); +} + +void InstructionCodeGeneratorMIPS::VisitClearException(HClearException* clear ATTRIBUTE_UNUSED) { + __ StoreToOffset(kStoreWord, ZERO, TR, GetExceptionTlsOffset()); +} + +void LocationsBuilderMIPS::VisitLoadLocal(HLoadLocal* load) { + load->SetLocations(nullptr); +} + +void InstructionCodeGeneratorMIPS::VisitLoadLocal(HLoadLocal* load ATTRIBUTE_UNUSED) { + // Nothing to do, this is driven by the code generator. +} + +void LocationsBuilderMIPS::VisitLoadString(HLoadString* load) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(load, LocationSummary::kCallOnSlowPath); + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetOut(Location::RequiresRegister()); +} + +void InstructionCodeGeneratorMIPS::VisitLoadString(HLoadString* load) { + SlowPathCodeMIPS* slow_path = new (GetGraph()->GetArena()) LoadStringSlowPathMIPS(load); + codegen_->AddSlowPath(slow_path); + + LocationSummary* locations = load->GetLocations(); + Register out = locations->Out().AsRegister<Register>(); + Register current_method = locations->InAt(0).AsRegister<Register>(); + __ LoadFromOffset(kLoadWord, out, current_method, ArtMethod::DeclaringClassOffset().Int32Value()); + __ LoadFromOffset(kLoadWord, out, out, mirror::Class::DexCacheStringsOffset().Int32Value()); + __ LoadFromOffset(kLoadWord, out, out, CodeGenerator::GetCacheOffset(load->GetStringIndex())); + __ Beqz(out, slow_path->GetEntryLabel()); + __ Bind(slow_path->GetExitLabel()); +} + +void LocationsBuilderMIPS::VisitLocal(HLocal* local) { + local->SetLocations(nullptr); +} + +void InstructionCodeGeneratorMIPS::VisitLocal(HLocal* local) { + DCHECK_EQ(local->GetBlock(), GetGraph()->GetEntryBlock()); +} + +void LocationsBuilderMIPS::VisitLongConstant(HLongConstant* constant) { + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(constant); + locations->SetOut(Location::ConstantLocation(constant)); +} + +void InstructionCodeGeneratorMIPS::VisitLongConstant(HLongConstant* constant ATTRIBUTE_UNUSED) { + // Will be generated at use site. +} + +void LocationsBuilderMIPS::VisitMonitorOperation(HMonitorOperation* instruction) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCall); + InvokeRuntimeCallingConvention calling_convention; + locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0))); +} + +void InstructionCodeGeneratorMIPS::VisitMonitorOperation(HMonitorOperation* instruction) { + if (instruction->IsEnter()) { + codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pLockObject), + instruction, + instruction->GetDexPc(), + nullptr, + IsDirectEntrypoint(kQuickLockObject)); + CheckEntrypointTypes<kQuickLockObject, void, mirror::Object*>(); + } else { + codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pUnlockObject), + instruction, + instruction->GetDexPc(), + nullptr, + IsDirectEntrypoint(kQuickUnlockObject)); + } + CheckEntrypointTypes<kQuickUnlockObject, void, mirror::Object*>(); +} + +void LocationsBuilderMIPS::VisitMul(HMul* mul) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(mul, LocationSummary::kNoCall); + switch (mul->GetResultType()) { + case Primitive::kPrimInt: + case Primitive::kPrimLong: + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetInAt(1, Location::RequiresRegister()); + locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); + break; + + case Primitive::kPrimFloat: + case Primitive::kPrimDouble: + locations->SetInAt(0, Location::RequiresFpuRegister()); + locations->SetInAt(1, Location::RequiresFpuRegister()); + locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap); + break; + + default: + LOG(FATAL) << "Unexpected mul type " << mul->GetResultType(); + } +} + +void InstructionCodeGeneratorMIPS::VisitMul(HMul* instruction) { + Primitive::Type type = instruction->GetType(); + LocationSummary* locations = instruction->GetLocations(); + bool isR6 = codegen_->GetInstructionSetFeatures().IsR6(); + + switch (type) { + case Primitive::kPrimInt: { + Register dst = locations->Out().AsRegister<Register>(); + Register lhs = locations->InAt(0).AsRegister<Register>(); + Register rhs = locations->InAt(1).AsRegister<Register>(); + + if (isR6) { + __ MulR6(dst, lhs, rhs); + } else { + __ MulR2(dst, lhs, rhs); + } + break; + } + case Primitive::kPrimLong: { + Register dst_high = locations->Out().AsRegisterPairHigh<Register>(); + Register dst_low = locations->Out().AsRegisterPairLow<Register>(); + Register lhs_high = locations->InAt(0).AsRegisterPairHigh<Register>(); + Register lhs_low = locations->InAt(0).AsRegisterPairLow<Register>(); + Register rhs_high = locations->InAt(1).AsRegisterPairHigh<Register>(); + Register rhs_low = locations->InAt(1).AsRegisterPairLow<Register>(); + + // Extra checks to protect caused by the existance of A1_A2. + // The algorithm is wrong if dst_high is either lhs_lo or rhs_lo: + // (e.g. lhs=a0_a1, rhs=a2_a3 and dst=a1_a2). + DCHECK_NE(dst_high, lhs_low); + DCHECK_NE(dst_high, rhs_low); + + // A_B * C_D + // dst_hi: [ low(A*D) + low(B*C) + hi(B*D) ] + // dst_lo: [ low(B*D) ] + // Note: R2 and R6 MUL produce the low 32 bit of the multiplication result. + + if (isR6) { + __ MulR6(TMP, lhs_high, rhs_low); + __ MulR6(dst_high, lhs_low, rhs_high); + __ Addu(dst_high, dst_high, TMP); + __ MuhuR6(TMP, lhs_low, rhs_low); + __ Addu(dst_high, dst_high, TMP); + __ MulR6(dst_low, lhs_low, rhs_low); + } else { + __ MulR2(TMP, lhs_high, rhs_low); + __ MulR2(dst_high, lhs_low, rhs_high); + __ Addu(dst_high, dst_high, TMP); + __ MultuR2(lhs_low, rhs_low); + __ Mfhi(TMP); + __ Addu(dst_high, dst_high, TMP); + __ Mflo(dst_low); + } + break; + } + case Primitive::kPrimFloat: + case Primitive::kPrimDouble: { + FRegister dst = locations->Out().AsFpuRegister<FRegister>(); + FRegister lhs = locations->InAt(0).AsFpuRegister<FRegister>(); + FRegister rhs = locations->InAt(1).AsFpuRegister<FRegister>(); + if (type == Primitive::kPrimFloat) { + __ MulS(dst, lhs, rhs); + } else { + __ MulD(dst, lhs, rhs); + } + break; + } + default: + LOG(FATAL) << "Unexpected mul type " << type; + } +} + +void LocationsBuilderMIPS::VisitNeg(HNeg* neg) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(neg, LocationSummary::kNoCall); + switch (neg->GetResultType()) { + case Primitive::kPrimInt: + case Primitive::kPrimLong: + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); + break; + + case Primitive::kPrimFloat: + case Primitive::kPrimDouble: + locations->SetInAt(0, Location::RequiresFpuRegister()); + locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap); + break; + + default: + LOG(FATAL) << "Unexpected neg type " << neg->GetResultType(); + } +} + +void InstructionCodeGeneratorMIPS::VisitNeg(HNeg* instruction) { + Primitive::Type type = instruction->GetType(); + LocationSummary* locations = instruction->GetLocations(); + + switch (type) { + case Primitive::kPrimInt: { + Register dst = locations->Out().AsRegister<Register>(); + Register src = locations->InAt(0).AsRegister<Register>(); + __ Subu(dst, ZERO, src); + break; + } + case Primitive::kPrimLong: { + Register dst_high = locations->Out().AsRegisterPairHigh<Register>(); + Register dst_low = locations->Out().AsRegisterPairLow<Register>(); + Register src_high = locations->InAt(0).AsRegisterPairHigh<Register>(); + Register src_low = locations->InAt(0).AsRegisterPairLow<Register>(); + __ Subu(dst_low, ZERO, src_low); + __ Sltu(TMP, ZERO, dst_low); + __ Subu(dst_high, ZERO, src_high); + __ Subu(dst_high, dst_high, TMP); + break; + } + case Primitive::kPrimFloat: + case Primitive::kPrimDouble: { + FRegister dst = locations->Out().AsFpuRegister<FRegister>(); + FRegister src = locations->InAt(0).AsFpuRegister<FRegister>(); + if (type == Primitive::kPrimFloat) { + __ NegS(dst, src); + } else { + __ NegD(dst, src); + } + break; + } + default: + LOG(FATAL) << "Unexpected neg type " << type; + } +} + +void LocationsBuilderMIPS::VisitNewArray(HNewArray* instruction) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCall); + InvokeRuntimeCallingConvention calling_convention; + locations->AddTemp(Location::RegisterLocation(calling_convention.GetRegisterAt(0))); + locations->AddTemp(Location::RegisterLocation(calling_convention.GetRegisterAt(2))); + locations->SetOut(calling_convention.GetReturnLocation(Primitive::kPrimNot)); + locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(1))); +} + +void InstructionCodeGeneratorMIPS::VisitNewArray(HNewArray* instruction) { + InvokeRuntimeCallingConvention calling_convention; + Register current_method_register = calling_convention.GetRegisterAt(2); + __ Lw(current_method_register, SP, kCurrentMethodStackOffset); + // Move an uint16_t value to a register. + __ LoadConst32(calling_convention.GetRegisterAt(0), instruction->GetTypeIndex()); + codegen_->InvokeRuntime( + GetThreadOffset<kMipsWordSize>(instruction->GetEntrypoint()).Int32Value(), + instruction, + instruction->GetDexPc(), + nullptr, + IsDirectEntrypoint(kQuickAllocArrayWithAccessCheck)); + CheckEntrypointTypes<kQuickAllocArrayWithAccessCheck, + void*, uint32_t, int32_t, ArtMethod*>(); +} + +void LocationsBuilderMIPS::VisitNewInstance(HNewInstance* instruction) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCall); + InvokeRuntimeCallingConvention calling_convention; + locations->AddTemp(Location::RegisterLocation(calling_convention.GetRegisterAt(0))); + locations->AddTemp(Location::RegisterLocation(calling_convention.GetRegisterAt(1))); + locations->SetOut(calling_convention.GetReturnLocation(Primitive::kPrimNot)); +} + +void InstructionCodeGeneratorMIPS::VisitNewInstance(HNewInstance* instruction) { + InvokeRuntimeCallingConvention calling_convention; + Register current_method_register = calling_convention.GetRegisterAt(1); + __ Lw(current_method_register, SP, kCurrentMethodStackOffset); + // Move an uint16_t value to a register. + __ LoadConst32(calling_convention.GetRegisterAt(0), instruction->GetTypeIndex()); + codegen_->InvokeRuntime( + GetThreadOffset<kMipsWordSize>(instruction->GetEntrypoint()).Int32Value(), + instruction, + instruction->GetDexPc(), + nullptr, + IsDirectEntrypoint(kQuickAllocObjectWithAccessCheck)); + CheckEntrypointTypes<kQuickAllocObjectWithAccessCheck, void*, uint32_t, ArtMethod*>(); +} + +void LocationsBuilderMIPS::VisitNot(HNot* instruction) { + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction); + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); +} + +void InstructionCodeGeneratorMIPS::VisitNot(HNot* instruction) { + Primitive::Type type = instruction->GetType(); + LocationSummary* locations = instruction->GetLocations(); + + switch (type) { + case Primitive::kPrimInt: { + Register dst = locations->Out().AsRegister<Register>(); + Register src = locations->InAt(0).AsRegister<Register>(); + __ Nor(dst, src, ZERO); + break; + } + + case Primitive::kPrimLong: { + Register dst_high = locations->Out().AsRegisterPairHigh<Register>(); + Register dst_low = locations->Out().AsRegisterPairLow<Register>(); + Register src_high = locations->InAt(0).AsRegisterPairHigh<Register>(); + Register src_low = locations->InAt(0).AsRegisterPairLow<Register>(); + __ Nor(dst_high, src_high, ZERO); + __ Nor(dst_low, src_low, ZERO); + break; + } + + default: + LOG(FATAL) << "Unexpected type for not operation " << instruction->GetResultType(); + } +} + +void LocationsBuilderMIPS::VisitBooleanNot(HBooleanNot* instruction) { + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction); + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); +} + +void InstructionCodeGeneratorMIPS::VisitBooleanNot(HBooleanNot* instruction) { + LocationSummary* locations = instruction->GetLocations(); + __ Xori(locations->Out().AsRegister<Register>(), + locations->InAt(0).AsRegister<Register>(), + 1); +} + +void LocationsBuilderMIPS::VisitNullCheck(HNullCheck* instruction) { + LocationSummary::CallKind call_kind = instruction->CanThrowIntoCatchBlock() + ? LocationSummary::kCallOnSlowPath + : LocationSummary::kNoCall; + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction, call_kind); + locations->SetInAt(0, Location::RequiresRegister()); + if (instruction->HasUses()) { + locations->SetOut(Location::SameAsFirstInput()); + } +} + +void InstructionCodeGeneratorMIPS::GenerateImplicitNullCheck(HNullCheck* instruction) { + if (codegen_->CanMoveNullCheckToUser(instruction)) { + return; + } + Location obj = instruction->GetLocations()->InAt(0); + + __ Lw(ZERO, obj.AsRegister<Register>(), 0); + codegen_->RecordPcInfo(instruction, instruction->GetDexPc()); +} + +void InstructionCodeGeneratorMIPS::GenerateExplicitNullCheck(HNullCheck* instruction) { + SlowPathCodeMIPS* slow_path = new (GetGraph()->GetArena()) NullCheckSlowPathMIPS(instruction); + codegen_->AddSlowPath(slow_path); + + Location obj = instruction->GetLocations()->InAt(0); + + __ Beqz(obj.AsRegister<Register>(), slow_path->GetEntryLabel()); +} + +void InstructionCodeGeneratorMIPS::VisitNullCheck(HNullCheck* instruction) { + if (codegen_->IsImplicitNullCheckAllowed(instruction)) { + GenerateImplicitNullCheck(instruction); + } else { + GenerateExplicitNullCheck(instruction); + } +} + +void LocationsBuilderMIPS::VisitOr(HOr* instruction) { + HandleBinaryOp(instruction); +} + +void InstructionCodeGeneratorMIPS::VisitOr(HOr* instruction) { + HandleBinaryOp(instruction); +} + +void LocationsBuilderMIPS::VisitParallelMove(HParallelMove* instruction ATTRIBUTE_UNUSED) { + LOG(FATAL) << "Unreachable"; +} + +void InstructionCodeGeneratorMIPS::VisitParallelMove(HParallelMove* instruction) { + codegen_->GetMoveResolver()->EmitNativeCode(instruction); +} + +void LocationsBuilderMIPS::VisitParameterValue(HParameterValue* instruction) { + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction); + Location location = parameter_visitor_.GetNextLocation(instruction->GetType()); + if (location.IsStackSlot()) { + location = Location::StackSlot(location.GetStackIndex() + codegen_->GetFrameSize()); + } else if (location.IsDoubleStackSlot()) { + location = Location::DoubleStackSlot(location.GetStackIndex() + codegen_->GetFrameSize()); + } + locations->SetOut(location); +} + +void InstructionCodeGeneratorMIPS::VisitParameterValue(HParameterValue* instruction + ATTRIBUTE_UNUSED) { + // Nothing to do, the parameter is already at its location. +} + +void LocationsBuilderMIPS::VisitCurrentMethod(HCurrentMethod* instruction) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall); + locations->SetOut(Location::RegisterLocation(kMethodRegisterArgument)); +} + +void InstructionCodeGeneratorMIPS::VisitCurrentMethod(HCurrentMethod* instruction + ATTRIBUTE_UNUSED) { + // Nothing to do, the method is already at its location. +} + +void LocationsBuilderMIPS::VisitPhi(HPhi* instruction) { + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(instruction); + for (size_t i = 0, e = instruction->InputCount(); i < e; ++i) { + locations->SetInAt(i, Location::Any()); + } + locations->SetOut(Location::Any()); +} + +void InstructionCodeGeneratorMIPS::VisitPhi(HPhi* instruction ATTRIBUTE_UNUSED) { + LOG(FATAL) << "Unreachable"; +} + +void LocationsBuilderMIPS::VisitRem(HRem* rem) { + Primitive::Type type = rem->GetResultType(); + LocationSummary::CallKind call_kind = + (type == Primitive::kPrimInt) ? LocationSummary::kNoCall : LocationSummary::kCall; + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(rem, call_kind); + + switch (type) { + case Primitive::kPrimInt: + locations->SetInAt(0, Location::RequiresRegister()); + locations->SetInAt(1, Location::RequiresRegister()); + locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); + break; + + case Primitive::kPrimLong: { + InvokeRuntimeCallingConvention calling_convention; + locations->SetInAt(0, Location::RegisterPairLocation( + calling_convention.GetRegisterAt(0), calling_convention.GetRegisterAt(1))); + locations->SetInAt(1, Location::RegisterPairLocation( + calling_convention.GetRegisterAt(2), calling_convention.GetRegisterAt(3))); + locations->SetOut(calling_convention.GetReturnLocation(type)); + break; + } + + case Primitive::kPrimFloat: + case Primitive::kPrimDouble: { + InvokeRuntimeCallingConvention calling_convention; + locations->SetInAt(0, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(0))); + locations->SetInAt(1, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(1))); + locations->SetOut(calling_convention.GetReturnLocation(type)); + break; + } + + default: + LOG(FATAL) << "Unexpected rem type " << type; + } +} + +void InstructionCodeGeneratorMIPS::VisitRem(HRem* instruction) { + Primitive::Type type = instruction->GetType(); + LocationSummary* locations = instruction->GetLocations(); + bool isR6 = codegen_->GetInstructionSetFeatures().IsR6(); + + switch (type) { + case Primitive::kPrimInt: { + Register dst = locations->Out().AsRegister<Register>(); + Register lhs = locations->InAt(0).AsRegister<Register>(); + Register rhs = locations->InAt(1).AsRegister<Register>(); + if (isR6) { + __ ModR6(dst, lhs, rhs); + } else { + __ ModR2(dst, lhs, rhs); + } + break; + } + case Primitive::kPrimLong: { + codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pLmod), + instruction, + instruction->GetDexPc(), + nullptr, + IsDirectEntrypoint(kQuickLmod)); + CheckEntrypointTypes<kQuickLmod, int64_t, int64_t, int64_t>(); + break; + } + case Primitive::kPrimFloat: { + codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pFmodf), + instruction, instruction->GetDexPc(), + nullptr, + IsDirectEntrypoint(kQuickFmodf)); + CheckEntrypointTypes<kQuickL2f, float, int64_t>(); + break; + } + case Primitive::kPrimDouble: { + codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pFmod), + instruction, instruction->GetDexPc(), + nullptr, + IsDirectEntrypoint(kQuickFmod)); + CheckEntrypointTypes<kQuickL2d, double, int64_t>(); + break; + } + default: + LOG(FATAL) << "Unexpected rem type " << type; + } +} + +void LocationsBuilderMIPS::VisitMemoryBarrier(HMemoryBarrier* memory_barrier) { + memory_barrier->SetLocations(nullptr); +} + +void InstructionCodeGeneratorMIPS::VisitMemoryBarrier(HMemoryBarrier* memory_barrier) { + GenerateMemoryBarrier(memory_barrier->GetBarrierKind()); +} + +void LocationsBuilderMIPS::VisitReturn(HReturn* ret) { + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(ret); + Primitive::Type return_type = ret->InputAt(0)->GetType(); + locations->SetInAt(0, MipsReturnLocation(return_type)); +} + +void InstructionCodeGeneratorMIPS::VisitReturn(HReturn* ret ATTRIBUTE_UNUSED) { + codegen_->GenerateFrameExit(); +} + +void LocationsBuilderMIPS::VisitReturnVoid(HReturnVoid* ret) { + ret->SetLocations(nullptr); +} + +void InstructionCodeGeneratorMIPS::VisitReturnVoid(HReturnVoid* ret ATTRIBUTE_UNUSED) { + codegen_->GenerateFrameExit(); +} + +void LocationsBuilderMIPS::VisitShl(HShl* shl) { + HandleShift(shl); +} + +void InstructionCodeGeneratorMIPS::VisitShl(HShl* shl) { + HandleShift(shl); +} + +void LocationsBuilderMIPS::VisitShr(HShr* shr) { + HandleShift(shr); +} + +void InstructionCodeGeneratorMIPS::VisitShr(HShr* shr) { + HandleShift(shr); +} + +void LocationsBuilderMIPS::VisitStoreLocal(HStoreLocal* store) { + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(store); + Primitive::Type field_type = store->InputAt(1)->GetType(); + switch (field_type) { + case Primitive::kPrimNot: + case Primitive::kPrimBoolean: + case Primitive::kPrimByte: + case Primitive::kPrimChar: + case Primitive::kPrimShort: + case Primitive::kPrimInt: + case Primitive::kPrimFloat: + locations->SetInAt(1, Location::StackSlot(codegen_->GetStackSlot(store->GetLocal()))); + break; + + case Primitive::kPrimLong: + case Primitive::kPrimDouble: + locations->SetInAt(1, Location::DoubleStackSlot(codegen_->GetStackSlot(store->GetLocal()))); + break; + + default: + LOG(FATAL) << "Unimplemented local type " << field_type; + } +} + +void InstructionCodeGeneratorMIPS::VisitStoreLocal(HStoreLocal* store ATTRIBUTE_UNUSED) { +} + +void LocationsBuilderMIPS::VisitSub(HSub* instruction) { + HandleBinaryOp(instruction); +} + +void InstructionCodeGeneratorMIPS::VisitSub(HSub* instruction) { + HandleBinaryOp(instruction); +} + +void LocationsBuilderMIPS::VisitStaticFieldGet(HStaticFieldGet* instruction) { + HandleFieldGet(instruction, instruction->GetFieldInfo()); +} + +void InstructionCodeGeneratorMIPS::VisitStaticFieldGet(HStaticFieldGet* instruction) { + HandleFieldGet(instruction, instruction->GetFieldInfo(), instruction->GetDexPc()); +} + +void LocationsBuilderMIPS::VisitStaticFieldSet(HStaticFieldSet* instruction) { + HandleFieldSet(instruction, instruction->GetFieldInfo()); +} + +void InstructionCodeGeneratorMIPS::VisitStaticFieldSet(HStaticFieldSet* instruction) { + HandleFieldSet(instruction, instruction->GetFieldInfo(), instruction->GetDexPc()); +} + +void LocationsBuilderMIPS::VisitUnresolvedInstanceFieldGet( + HUnresolvedInstanceFieldGet* instruction) { + FieldAccessCallingConventionMIPS calling_convention; + codegen_->CreateUnresolvedFieldLocationSummary(instruction, + instruction->GetFieldType(), + calling_convention); +} + +void InstructionCodeGeneratorMIPS::VisitUnresolvedInstanceFieldGet( + HUnresolvedInstanceFieldGet* instruction) { + FieldAccessCallingConventionMIPS calling_convention; + codegen_->GenerateUnresolvedFieldAccess(instruction, + instruction->GetFieldType(), + instruction->GetFieldIndex(), + instruction->GetDexPc(), + calling_convention); +} + +void LocationsBuilderMIPS::VisitUnresolvedInstanceFieldSet( + HUnresolvedInstanceFieldSet* instruction) { + FieldAccessCallingConventionMIPS calling_convention; + codegen_->CreateUnresolvedFieldLocationSummary(instruction, + instruction->GetFieldType(), + calling_convention); +} + +void InstructionCodeGeneratorMIPS::VisitUnresolvedInstanceFieldSet( + HUnresolvedInstanceFieldSet* instruction) { + FieldAccessCallingConventionMIPS calling_convention; + codegen_->GenerateUnresolvedFieldAccess(instruction, + instruction->GetFieldType(), + instruction->GetFieldIndex(), + instruction->GetDexPc(), + calling_convention); +} + +void LocationsBuilderMIPS::VisitUnresolvedStaticFieldGet( + HUnresolvedStaticFieldGet* instruction) { + FieldAccessCallingConventionMIPS calling_convention; + codegen_->CreateUnresolvedFieldLocationSummary(instruction, + instruction->GetFieldType(), + calling_convention); +} + +void InstructionCodeGeneratorMIPS::VisitUnresolvedStaticFieldGet( + HUnresolvedStaticFieldGet* instruction) { + FieldAccessCallingConventionMIPS calling_convention; + codegen_->GenerateUnresolvedFieldAccess(instruction, + instruction->GetFieldType(), + instruction->GetFieldIndex(), + instruction->GetDexPc(), + calling_convention); +} + +void LocationsBuilderMIPS::VisitUnresolvedStaticFieldSet( + HUnresolvedStaticFieldSet* instruction) { + FieldAccessCallingConventionMIPS calling_convention; + codegen_->CreateUnresolvedFieldLocationSummary(instruction, + instruction->GetFieldType(), + calling_convention); +} + +void InstructionCodeGeneratorMIPS::VisitUnresolvedStaticFieldSet( + HUnresolvedStaticFieldSet* instruction) { + FieldAccessCallingConventionMIPS calling_convention; + codegen_->GenerateUnresolvedFieldAccess(instruction, + instruction->GetFieldType(), + instruction->GetFieldIndex(), + instruction->GetDexPc(), + calling_convention); +} + +void LocationsBuilderMIPS::VisitSuspendCheck(HSuspendCheck* instruction) { + new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCallOnSlowPath); +} + +void InstructionCodeGeneratorMIPS::VisitSuspendCheck(HSuspendCheck* instruction) { + HBasicBlock* block = instruction->GetBlock(); + if (block->GetLoopInformation() != nullptr) { + DCHECK(block->GetLoopInformation()->GetSuspendCheck() == instruction); + // The back edge will generate the suspend check. + return; + } + if (block->IsEntryBlock() && instruction->GetNext()->IsGoto()) { + // The goto will generate the suspend check. + return; + } + GenerateSuspendCheck(instruction, nullptr); +} + +void LocationsBuilderMIPS::VisitTemporary(HTemporary* temp) { + temp->SetLocations(nullptr); +} + +void InstructionCodeGeneratorMIPS::VisitTemporary(HTemporary* temp ATTRIBUTE_UNUSED) { + // Nothing to do, this is driven by the code generator. +} + +void LocationsBuilderMIPS::VisitThrow(HThrow* instruction) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kCall); + InvokeRuntimeCallingConvention calling_convention; + locations->SetInAt(0, Location::RegisterLocation(calling_convention.GetRegisterAt(0))); +} + +void InstructionCodeGeneratorMIPS::VisitThrow(HThrow* instruction) { + codegen_->InvokeRuntime(QUICK_ENTRY_POINT(pDeliverException), + instruction, + instruction->GetDexPc(), + nullptr, + IsDirectEntrypoint(kQuickDeliverException)); + CheckEntrypointTypes<kQuickDeliverException, void, mirror::Object*>(); +} + +void LocationsBuilderMIPS::VisitTypeConversion(HTypeConversion* conversion) { + Primitive::Type input_type = conversion->GetInputType(); + Primitive::Type result_type = conversion->GetResultType(); + DCHECK_NE(input_type, result_type); + + if ((input_type == Primitive::kPrimNot) || (input_type == Primitive::kPrimVoid) || + (result_type == Primitive::kPrimNot) || (result_type == Primitive::kPrimVoid)) { + LOG(FATAL) << "Unexpected type conversion from " << input_type << " to " << result_type; + } + + LocationSummary::CallKind call_kind = LocationSummary::kNoCall; + if ((Primitive::IsFloatingPointType(result_type) && input_type == Primitive::kPrimLong) || + (Primitive::IsIntegralType(result_type) && Primitive::IsFloatingPointType(input_type))) { + call_kind = LocationSummary::kCall; + } + + LocationSummary* locations = new (GetGraph()->GetArena()) LocationSummary(conversion, call_kind); + + if (call_kind == LocationSummary::kNoCall) { + if (Primitive::IsFloatingPointType(input_type)) { + locations->SetInAt(0, Location::RequiresFpuRegister()); + } else { + locations->SetInAt(0, Location::RequiresRegister()); + } + + if (Primitive::IsFloatingPointType(result_type)) { + locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap); + } else { + locations->SetOut(Location::RequiresRegister(), Location::kNoOutputOverlap); + } + } else { + InvokeRuntimeCallingConvention calling_convention; + + if (Primitive::IsFloatingPointType(input_type)) { + locations->SetInAt(0, Location::FpuRegisterLocation(calling_convention.GetFpuRegisterAt(0))); + } else { + DCHECK_EQ(input_type, Primitive::kPrimLong); + locations->SetInAt(0, Location::RegisterPairLocation( + calling_convention.GetRegisterAt(0), calling_convention.GetRegisterAt(1))); + } + + locations->SetOut(calling_convention.GetReturnLocation(result_type)); + } +} + +void InstructionCodeGeneratorMIPS::VisitTypeConversion(HTypeConversion* conversion) { + LocationSummary* locations = conversion->GetLocations(); + Primitive::Type result_type = conversion->GetResultType(); + Primitive::Type input_type = conversion->GetInputType(); + bool has_sign_extension = codegen_->GetInstructionSetFeatures().IsMipsIsaRevGreaterThanEqual2(); + + DCHECK_NE(input_type, result_type); + + if (result_type == Primitive::kPrimLong && Primitive::IsIntegralType(input_type)) { + Register dst_high = locations->Out().AsRegisterPairHigh<Register>(); + Register dst_low = locations->Out().AsRegisterPairLow<Register>(); + Register src = locations->InAt(0).AsRegister<Register>(); + + __ Move(dst_low, src); + __ Sra(dst_high, src, 31); + } else if (Primitive::IsIntegralType(result_type) && Primitive::IsIntegralType(input_type)) { + Register dst = locations->Out().AsRegister<Register>(); + Register src = (input_type == Primitive::kPrimLong) + ? locations->InAt(0).AsRegisterPairLow<Register>() + : locations->InAt(0).AsRegister<Register>(); + + switch (result_type) { + case Primitive::kPrimChar: + __ Andi(dst, src, 0xFFFF); + break; + case Primitive::kPrimByte: + if (has_sign_extension) { + __ Seb(dst, src); + } else { + __ Sll(dst, src, 24); + __ Sra(dst, dst, 24); + } + break; + case Primitive::kPrimShort: + if (has_sign_extension) { + __ Seh(dst, src); + } else { + __ Sll(dst, src, 16); + __ Sra(dst, dst, 16); + } + break; + case Primitive::kPrimInt: + __ Move(dst, src); + break; + + default: + LOG(FATAL) << "Unexpected type conversion from " << input_type + << " to " << result_type; + } + } else if (Primitive::IsFloatingPointType(result_type) && Primitive::IsIntegralType(input_type)) { + if (input_type != Primitive::kPrimLong) { + Register src = locations->InAt(0).AsRegister<Register>(); + FRegister dst = locations->Out().AsFpuRegister<FRegister>(); + __ Mtc1(src, FTMP); + if (result_type == Primitive::kPrimFloat) { + __ Cvtsw(dst, FTMP); + } else { + __ Cvtdw(dst, FTMP); + } + } else { + int32_t entry_offset = (result_type == Primitive::kPrimFloat) ? QUICK_ENTRY_POINT(pL2f) + : QUICK_ENTRY_POINT(pL2d); + bool direct = (result_type == Primitive::kPrimFloat) ? IsDirectEntrypoint(kQuickL2f) + : IsDirectEntrypoint(kQuickL2d); + codegen_->InvokeRuntime(entry_offset, + conversion, + conversion->GetDexPc(), + nullptr, + direct); + if (result_type == Primitive::kPrimFloat) { + CheckEntrypointTypes<kQuickL2f, float, int64_t>(); + } else { + CheckEntrypointTypes<kQuickL2d, double, int64_t>(); + } + } + } else if (Primitive::IsIntegralType(result_type) && Primitive::IsFloatingPointType(input_type)) { + CHECK(result_type == Primitive::kPrimInt || result_type == Primitive::kPrimLong); + int32_t entry_offset; + bool direct; + if (result_type != Primitive::kPrimLong) { + entry_offset = (input_type == Primitive::kPrimFloat) ? QUICK_ENTRY_POINT(pF2iz) + : QUICK_ENTRY_POINT(pD2iz); + direct = (result_type == Primitive::kPrimFloat) ? IsDirectEntrypoint(kQuickF2iz) + : IsDirectEntrypoint(kQuickD2iz); + } else { + entry_offset = (input_type == Primitive::kPrimFloat) ? QUICK_ENTRY_POINT(pF2l) + : QUICK_ENTRY_POINT(pD2l); + direct = (result_type == Primitive::kPrimFloat) ? IsDirectEntrypoint(kQuickF2l) + : IsDirectEntrypoint(kQuickD2l); + } + codegen_->InvokeRuntime(entry_offset, + conversion, + conversion->GetDexPc(), + nullptr, + direct); + if (result_type != Primitive::kPrimLong) { + if (input_type == Primitive::kPrimFloat) { + CheckEntrypointTypes<kQuickF2iz, int32_t, float>(); + } else { + CheckEntrypointTypes<kQuickD2iz, int32_t, double>(); + } + } else { + if (input_type == Primitive::kPrimFloat) { + CheckEntrypointTypes<kQuickF2l, int64_t, float>(); + } else { + CheckEntrypointTypes<kQuickD2l, int64_t, double>(); + } + } + } else if (Primitive::IsFloatingPointType(result_type) && + Primitive::IsFloatingPointType(input_type)) { + FRegister dst = locations->Out().AsFpuRegister<FRegister>(); + FRegister src = locations->InAt(0).AsFpuRegister<FRegister>(); + if (result_type == Primitive::kPrimFloat) { + __ Cvtsd(dst, src); + } else { + __ Cvtds(dst, src); + } + } else { + LOG(FATAL) << "Unexpected or unimplemented type conversion from " << input_type + << " to " << result_type; + } +} + +void LocationsBuilderMIPS::VisitUShr(HUShr* ushr) { + HandleShift(ushr); +} + +void InstructionCodeGeneratorMIPS::VisitUShr(HUShr* ushr) { + HandleShift(ushr); +} + +void LocationsBuilderMIPS::VisitXor(HXor* instruction) { + HandleBinaryOp(instruction); +} + +void InstructionCodeGeneratorMIPS::VisitXor(HXor* instruction) { + HandleBinaryOp(instruction); +} + +void LocationsBuilderMIPS::VisitBoundType(HBoundType* instruction ATTRIBUTE_UNUSED) { + // Nothing to do, this should be removed during prepare for register allocator. + LOG(FATAL) << "Unreachable"; +} + +void InstructionCodeGeneratorMIPS::VisitBoundType(HBoundType* instruction ATTRIBUTE_UNUSED) { + // Nothing to do, this should be removed during prepare for register allocator. + LOG(FATAL) << "Unreachable"; +} + +void LocationsBuilderMIPS::VisitEqual(HEqual* comp) { + VisitCondition(comp); +} + +void InstructionCodeGeneratorMIPS::VisitEqual(HEqual* comp) { + VisitCondition(comp); +} + +void LocationsBuilderMIPS::VisitNotEqual(HNotEqual* comp) { + VisitCondition(comp); +} + +void InstructionCodeGeneratorMIPS::VisitNotEqual(HNotEqual* comp) { + VisitCondition(comp); +} + +void LocationsBuilderMIPS::VisitLessThan(HLessThan* comp) { + VisitCondition(comp); +} + +void InstructionCodeGeneratorMIPS::VisitLessThan(HLessThan* comp) { + VisitCondition(comp); +} + +void LocationsBuilderMIPS::VisitLessThanOrEqual(HLessThanOrEqual* comp) { + VisitCondition(comp); +} + +void InstructionCodeGeneratorMIPS::VisitLessThanOrEqual(HLessThanOrEqual* comp) { + VisitCondition(comp); +} + +void LocationsBuilderMIPS::VisitGreaterThan(HGreaterThan* comp) { + VisitCondition(comp); +} + +void InstructionCodeGeneratorMIPS::VisitGreaterThan(HGreaterThan* comp) { + VisitCondition(comp); +} + +void LocationsBuilderMIPS::VisitGreaterThanOrEqual(HGreaterThanOrEqual* comp) { + VisitCondition(comp); +} + +void InstructionCodeGeneratorMIPS::VisitGreaterThanOrEqual(HGreaterThanOrEqual* comp) { + VisitCondition(comp); +} + +void LocationsBuilderMIPS::VisitBelow(HBelow* comp) { + VisitCondition(comp); +} + +void InstructionCodeGeneratorMIPS::VisitBelow(HBelow* comp) { + VisitCondition(comp); +} + +void LocationsBuilderMIPS::VisitBelowOrEqual(HBelowOrEqual* comp) { + VisitCondition(comp); +} + +void InstructionCodeGeneratorMIPS::VisitBelowOrEqual(HBelowOrEqual* comp) { + VisitCondition(comp); +} + +void LocationsBuilderMIPS::VisitAbove(HAbove* comp) { + VisitCondition(comp); +} + +void InstructionCodeGeneratorMIPS::VisitAbove(HAbove* comp) { + VisitCondition(comp); +} + +void LocationsBuilderMIPS::VisitAboveOrEqual(HAboveOrEqual* comp) { + VisitCondition(comp); +} + +void InstructionCodeGeneratorMIPS::VisitAboveOrEqual(HAboveOrEqual* comp) { + VisitCondition(comp); +} + +void LocationsBuilderMIPS::VisitFakeString(HFakeString* instruction) { + DCHECK(codegen_->IsBaseline()); + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(instruction, LocationSummary::kNoCall); + locations->SetOut(Location::ConstantLocation(GetGraph()->GetNullConstant())); +} + +void InstructionCodeGeneratorMIPS::VisitFakeString(HFakeString* instruction ATTRIBUTE_UNUSED) { + DCHECK(codegen_->IsBaseline()); + // Will be generated at use site. +} + +void LocationsBuilderMIPS::VisitPackedSwitch(HPackedSwitch* switch_instr) { + LocationSummary* locations = + new (GetGraph()->GetArena()) LocationSummary(switch_instr, LocationSummary::kNoCall); + locations->SetInAt(0, Location::RequiresRegister()); +} + +void InstructionCodeGeneratorMIPS::VisitPackedSwitch(HPackedSwitch* switch_instr) { + int32_t lower_bound = switch_instr->GetStartValue(); + int32_t num_entries = switch_instr->GetNumEntries(); + LocationSummary* locations = switch_instr->GetLocations(); + Register value_reg = locations->InAt(0).AsRegister<Register>(); + HBasicBlock* default_block = switch_instr->GetDefaultBlock(); + + // Create a set of compare/jumps. + const ArenaVector<HBasicBlock*>& successors = switch_instr->GetBlock()->GetSuccessors(); + for (int32_t i = 0; i < num_entries; ++i) { + int32_t case_value = lower_bound + i; + MipsLabel* successor_label = codegen_->GetLabelOf(successors[i]); + if (case_value == 0) { + __ Beqz(value_reg, successor_label); + } else { + __ LoadConst32(TMP, case_value); + __ Beq(value_reg, TMP, successor_label); + } + } + + // Insert the default branch for every other value. + if (!codegen_->GoesToNextBlock(switch_instr->GetBlock(), default_block)) { + __ B(codegen_->GetLabelOf(default_block)); + } +} + +void LocationsBuilderMIPS::VisitInvokeUnresolved(HInvokeUnresolved* invoke) { + // The trampoline uses the same calling convention as dex calling conventions, + // except instead of loading arg0/r0 with the target Method*, arg0/r0 will contain + // the method_idx. + HandleInvoke(invoke); +} + +void InstructionCodeGeneratorMIPS::VisitInvokeUnresolved(HInvokeUnresolved* invoke) { + codegen_->GenerateInvokeUnresolvedRuntimeCall(invoke); +} + +#undef __ +#undef QUICK_ENTRY_POINT + +} // namespace mips +} // namespace art diff --git a/compiler/optimizing/code_generator_mips.h b/compiler/optimizing/code_generator_mips.h new file mode 100644 index 0000000000..059131dcfc --- /dev/null +++ b/compiler/optimizing/code_generator_mips.h @@ -0,0 +1,368 @@ +/* + * Copyright (C) 2015 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ART_COMPILER_OPTIMIZING_CODE_GENERATOR_MIPS_H_ +#define ART_COMPILER_OPTIMIZING_CODE_GENERATOR_MIPS_H_ + +#include "code_generator.h" +#include "dex/compiler_enums.h" +#include "driver/compiler_options.h" +#include "nodes.h" +#include "parallel_move_resolver.h" +#include "utils/mips/assembler_mips.h" + +namespace art { +namespace mips { + +// InvokeDexCallingConvention registers + +static constexpr Register kParameterCoreRegisters[] = + { A1, A2, A3 }; +static constexpr size_t kParameterCoreRegistersLength = arraysize(kParameterCoreRegisters); + +static constexpr FRegister kParameterFpuRegisters[] = + { F12, F14 }; +static constexpr size_t kParameterFpuRegistersLength = arraysize(kParameterFpuRegisters); + + +// InvokeRuntimeCallingConvention registers + +static constexpr Register kRuntimeParameterCoreRegisters[] = + { A0, A1, A2, A3 }; +static constexpr size_t kRuntimeParameterCoreRegistersLength = + arraysize(kRuntimeParameterCoreRegisters); + +static constexpr FRegister kRuntimeParameterFpuRegisters[] = + { F12, F14}; +static constexpr size_t kRuntimeParameterFpuRegistersLength = + arraysize(kRuntimeParameterFpuRegisters); + + +static constexpr Register kCoreCalleeSaves[] = + { S0, S1, S2, S3, S4, S5, S6, S7, FP, RA }; +static constexpr FRegister kFpuCalleeSaves[] = + { F20, F22, F24, F26, F28, F30 }; + + +class CodeGeneratorMIPS; + +class InvokeDexCallingConvention : public CallingConvention<Register, FRegister> { + public: + InvokeDexCallingConvention() + : CallingConvention(kParameterCoreRegisters, + kParameterCoreRegistersLength, + kParameterFpuRegisters, + kParameterFpuRegistersLength, + kMipsPointerSize) {} + + private: + DISALLOW_COPY_AND_ASSIGN(InvokeDexCallingConvention); +}; + +class InvokeDexCallingConventionVisitorMIPS : public InvokeDexCallingConventionVisitor { + public: + InvokeDexCallingConventionVisitorMIPS() {} + virtual ~InvokeDexCallingConventionVisitorMIPS() {} + + Location GetNextLocation(Primitive::Type type) OVERRIDE; + Location GetReturnLocation(Primitive::Type type) const OVERRIDE; + Location GetMethodLocation() const OVERRIDE; + + private: + InvokeDexCallingConvention calling_convention; + + DISALLOW_COPY_AND_ASSIGN(InvokeDexCallingConventionVisitorMIPS); +}; + +class InvokeRuntimeCallingConvention : public CallingConvention<Register, FRegister> { + public: + InvokeRuntimeCallingConvention() + : CallingConvention(kRuntimeParameterCoreRegisters, + kRuntimeParameterCoreRegistersLength, + kRuntimeParameterFpuRegisters, + kRuntimeParameterFpuRegistersLength, + kMipsPointerSize) {} + + Location GetReturnLocation(Primitive::Type return_type); + + private: + DISALLOW_COPY_AND_ASSIGN(InvokeRuntimeCallingConvention); +}; + +class FieldAccessCallingConventionMIPS : public FieldAccessCallingConvention { + public: + FieldAccessCallingConventionMIPS() {} + + Location GetObjectLocation() const OVERRIDE { + return Location::RegisterLocation(A1); + } + Location GetFieldIndexLocation() const OVERRIDE { + return Location::RegisterLocation(A0); + } + Location GetReturnLocation(Primitive::Type type) const OVERRIDE { + return Primitive::Is64BitType(type) + ? Location::RegisterPairLocation(V0, V1) + : Location::RegisterLocation(V0); + } + Location GetSetValueLocation(Primitive::Type type, bool is_instance) const OVERRIDE { + return Primitive::Is64BitType(type) + ? Location::RegisterPairLocation(A2, A3) + : (is_instance ? Location::RegisterLocation(A2) : Location::RegisterLocation(A1)); + } + Location GetFpuLocation(Primitive::Type type ATTRIBUTE_UNUSED) const OVERRIDE { + return Location::FpuRegisterLocation(F0); + } + + private: + DISALLOW_COPY_AND_ASSIGN(FieldAccessCallingConventionMIPS); +}; + +class ParallelMoveResolverMIPS : public ParallelMoveResolverWithSwap { + public: + ParallelMoveResolverMIPS(ArenaAllocator* allocator, CodeGeneratorMIPS* codegen) + : ParallelMoveResolverWithSwap(allocator), codegen_(codegen) {} + + void EmitMove(size_t index) OVERRIDE; + void EmitSwap(size_t index) OVERRIDE; + void SpillScratch(int reg) OVERRIDE; + void RestoreScratch(int reg) OVERRIDE; + + void Exchange(int index1, int index2, bool double_slot); + + MipsAssembler* GetAssembler() const; + + private: + CodeGeneratorMIPS* const codegen_; + + DISALLOW_COPY_AND_ASSIGN(ParallelMoveResolverMIPS); +}; + +class SlowPathCodeMIPS : public SlowPathCode { + public: + SlowPathCodeMIPS() : entry_label_(), exit_label_() {} + + MipsLabel* GetEntryLabel() { return &entry_label_; } + MipsLabel* GetExitLabel() { return &exit_label_; } + + private: + MipsLabel entry_label_; + MipsLabel exit_label_; + + DISALLOW_COPY_AND_ASSIGN(SlowPathCodeMIPS); +}; + +class LocationsBuilderMIPS : public HGraphVisitor { + public: + LocationsBuilderMIPS(HGraph* graph, CodeGeneratorMIPS* codegen) + : HGraphVisitor(graph), codegen_(codegen) {} + +#define DECLARE_VISIT_INSTRUCTION(name, super) \ + void Visit##name(H##name* instr) OVERRIDE; + + FOR_EACH_CONCRETE_INSTRUCTION_COMMON(DECLARE_VISIT_INSTRUCTION) + FOR_EACH_CONCRETE_INSTRUCTION_MIPS(DECLARE_VISIT_INSTRUCTION) + +#undef DECLARE_VISIT_INSTRUCTION + + void VisitInstruction(HInstruction* instruction) OVERRIDE { + LOG(FATAL) << "Unreachable instruction " << instruction->DebugName() + << " (id " << instruction->GetId() << ")"; + } + + private: + void HandleInvoke(HInvoke* invoke); + void HandleBinaryOp(HBinaryOperation* operation); + void HandleShift(HBinaryOperation* operation); + void HandleFieldSet(HInstruction* instruction, const FieldInfo& field_info); + void HandleFieldGet(HInstruction* instruction, const FieldInfo& field_info); + + InvokeDexCallingConventionVisitorMIPS parameter_visitor_; + + CodeGeneratorMIPS* const codegen_; + + DISALLOW_COPY_AND_ASSIGN(LocationsBuilderMIPS); +}; + +class InstructionCodeGeneratorMIPS : public HGraphVisitor { + public: + InstructionCodeGeneratorMIPS(HGraph* graph, CodeGeneratorMIPS* codegen); + +#define DECLARE_VISIT_INSTRUCTION(name, super) \ + void Visit##name(H##name* instr) OVERRIDE; + + FOR_EACH_CONCRETE_INSTRUCTION_COMMON(DECLARE_VISIT_INSTRUCTION) + FOR_EACH_CONCRETE_INSTRUCTION_MIPS(DECLARE_VISIT_INSTRUCTION) + +#undef DECLARE_VISIT_INSTRUCTION + + void VisitInstruction(HInstruction* instruction) OVERRIDE { + LOG(FATAL) << "Unreachable instruction " << instruction->DebugName() + << " (id " << instruction->GetId() << ")"; + } + + MipsAssembler* GetAssembler() const { return assembler_; } + + private: + void GenerateClassInitializationCheck(SlowPathCodeMIPS* slow_path, Register class_reg); + void GenerateMemoryBarrier(MemBarrierKind kind); + void GenerateSuspendCheck(HSuspendCheck* check, HBasicBlock* successor); + void HandleBinaryOp(HBinaryOperation* operation); + void HandleShift(HBinaryOperation* operation); + void HandleFieldSet(HInstruction* instruction, const FieldInfo& field_info, uint32_t dex_pc); + void HandleFieldGet(HInstruction* instruction, const FieldInfo& field_info, uint32_t dex_pc); + void GenerateImplicitNullCheck(HNullCheck* instruction); + void GenerateExplicitNullCheck(HNullCheck* instruction); + void GenerateTestAndBranch(HInstruction* instruction, + MipsLabel* true_target, + MipsLabel* false_target, + MipsLabel* always_true_target); + void HandleGoto(HInstruction* got, HBasicBlock* successor); + + MipsAssembler* const assembler_; + CodeGeneratorMIPS* const codegen_; + + DISALLOW_COPY_AND_ASSIGN(InstructionCodeGeneratorMIPS); +}; + +class CodeGeneratorMIPS : public CodeGenerator { + public: + CodeGeneratorMIPS(HGraph* graph, + const MipsInstructionSetFeatures& isa_features, + const CompilerOptions& compiler_options, + OptimizingCompilerStats* stats = nullptr); + virtual ~CodeGeneratorMIPS() {} + + void GenerateFrameEntry() OVERRIDE; + void GenerateFrameExit() OVERRIDE; + + void Bind(HBasicBlock* block) OVERRIDE; + + void Move(HInstruction* instruction, Location location, HInstruction* move_for) OVERRIDE; + void Move32(Location destination, Location source); + void Move64(Location destination, Location source); + void MoveConstant(Location location, HConstant* c); + + size_t GetWordSize() const OVERRIDE { return kMipsWordSize; } + + size_t GetFloatingPointSpillSlotSize() const OVERRIDE { return kMipsDoublewordSize; } + + uintptr_t GetAddressOf(HBasicBlock* block) const OVERRIDE { + return assembler_.GetLabelLocation(GetLabelOf(block)); + } + + HGraphVisitor* GetLocationBuilder() OVERRIDE { return &location_builder_; } + HGraphVisitor* GetInstructionVisitor() OVERRIDE { return &instruction_visitor_; } + MipsAssembler* GetAssembler() OVERRIDE { return &assembler_; } + const MipsAssembler& GetAssembler() const OVERRIDE { return assembler_; } + + void MarkGCCard(Register object, Register value); + + // Register allocation. + + void SetupBlockedRegisters(bool is_baseline) const OVERRIDE; + // AllocateFreeRegister() is only used when allocating registers locally + // during CompileBaseline(). + Location AllocateFreeRegister(Primitive::Type type) const OVERRIDE; + + Location GetStackLocation(HLoadLocal* load) const OVERRIDE; + + size_t SaveCoreRegister(size_t stack_index, uint32_t reg_id); + size_t RestoreCoreRegister(size_t stack_index, uint32_t reg_id); + size_t SaveFloatingPointRegister(size_t stack_index, uint32_t reg_id); + size_t RestoreFloatingPointRegister(size_t stack_index, uint32_t reg_id); + + void DumpCoreRegister(std::ostream& stream, int reg) const OVERRIDE; + void DumpFloatingPointRegister(std::ostream& stream, int reg) const OVERRIDE; + + // Blocks all register pairs made out of blocked core registers. + void UpdateBlockedPairRegisters() const; + + InstructionSet GetInstructionSet() const OVERRIDE { return InstructionSet::kMips; } + + const MipsInstructionSetFeatures& GetInstructionSetFeatures() const { + return isa_features_; + } + + MipsLabel* GetLabelOf(HBasicBlock* block) const { + return CommonGetLabelOf<MipsLabel>(block_labels_, block); + } + + void Initialize() OVERRIDE { + block_labels_ = CommonInitializeLabels<MipsLabel>(); + } + + void Finalize(CodeAllocator* allocator) OVERRIDE; + + // Code generation helpers. + + void MoveLocation(Location dst, Location src, Primitive::Type dst_type) OVERRIDE; + + void MoveConstant(Location destination, int32_t value); + + void AddLocationAsTemp(Location location, LocationSummary* locations) OVERRIDE; + + // Generate code to invoke a runtime entry point. + void InvokeRuntime(QuickEntrypointEnum entrypoint, + HInstruction* instruction, + uint32_t dex_pc, + SlowPathCode* slow_path) OVERRIDE; + + void InvokeRuntime(int32_t offset, + HInstruction* instruction, + uint32_t dex_pc, + SlowPathCode* slow_path, + bool is_direct_entrypoint); + + ParallelMoveResolver* GetMoveResolver() OVERRIDE { return &move_resolver_; } + + bool NeedsTwoRegisters(Primitive::Type type) const { + return type == Primitive::kPrimLong; + } + + // Check if the desired_dispatch_info is supported. If it is, return it, + // otherwise return a fall-back info that should be used instead. + HInvokeStaticOrDirect::DispatchInfo GetSupportedInvokeStaticOrDirectDispatch( + const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, + MethodReference target_method) OVERRIDE; + + void GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp); + void GenerateVirtualCall(HInvokeVirtual* invoke ATTRIBUTE_UNUSED, + Location temp ATTRIBUTE_UNUSED) OVERRIDE { + UNIMPLEMENTED(FATAL) << "Not implemented on MIPS"; + } + + void MoveFromReturnRegister(Location trg ATTRIBUTE_UNUSED, + Primitive::Type type ATTRIBUTE_UNUSED) OVERRIDE { + UNIMPLEMENTED(FATAL) << "Not implemented on MIPS"; + } + + private: + // Labels for each block that will be compiled. + MipsLabel* block_labels_; + MipsLabel frame_entry_label_; + LocationsBuilderMIPS location_builder_; + InstructionCodeGeneratorMIPS instruction_visitor_; + ParallelMoveResolverMIPS move_resolver_; + MipsAssembler assembler_; + const MipsInstructionSetFeatures& isa_features_; + + DISALLOW_COPY_AND_ASSIGN(CodeGeneratorMIPS); +}; + +} // namespace mips +} // namespace art + +#endif // ART_COMPILER_OPTIMIZING_CODE_GENERATOR_MIPS_H_ diff --git a/compiler/optimizing/code_generator_mips64.cc b/compiler/optimizing/code_generator_mips64.cc index f561c97eb0..55efd5f9de 100644 --- a/compiler/optimizing/code_generator_mips64.cc +++ b/compiler/optimizing/code_generator_mips64.cc @@ -342,8 +342,7 @@ class TypeCheckSlowPathMIPS64 : public SlowPathCodeMIPS64 { void EmitNativeCode(CodeGenerator* codegen) OVERRIDE { LocationSummary* locations = instruction_->GetLocations(); - Location object_class = instruction_->IsCheckCast() ? locations->GetTemp(0) - : locations->Out(); + Location object_class = instruction_->IsCheckCast() ? locations->GetTemp(0) : locations->Out(); uint32_t dex_pc = instruction_->GetDexPc(); DCHECK(instruction_->IsCheckCast() || !locations->GetLiveRegisters()->ContainsCoreRegister(locations->Out().reg())); @@ -2529,6 +2528,37 @@ static bool TryGenerateIntrinsicCode(HInvoke* invoke, CodeGeneratorMIPS64* codeg return false; } +HInvokeStaticOrDirect::DispatchInfo CodeGeneratorMIPS64::GetSupportedInvokeStaticOrDirectDispatch( + const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, + MethodReference target_method ATTRIBUTE_UNUSED) { + switch (desired_dispatch_info.method_load_kind) { + case HInvokeStaticOrDirect::MethodLoadKind::kDirectAddressWithFixup: + case HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative: + // TODO: Implement these types. For the moment, we fall back to kDexCacheViaMethod. + return HInvokeStaticOrDirect::DispatchInfo { + HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod, + HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod, + 0u, + 0u + }; + default: + break; + } + switch (desired_dispatch_info.code_ptr_location) { + case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup: + case HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative: + // TODO: Implement these types. For the moment, we fall back to kCallArtMethod. + return HInvokeStaticOrDirect::DispatchInfo { + desired_dispatch_info.method_load_kind, + HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod, + desired_dispatch_info.method_load_data, + 0u + }; + default: + return desired_dispatch_info; + } +} + void CodeGeneratorMIPS64::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) { // All registers are assumed to be correctly set up per the calling convention. @@ -2548,13 +2578,11 @@ void CodeGeneratorMIPS64::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invo __ LoadConst64(temp.AsRegister<GpuRegister>(), invoke->GetMethodAddress()); break; case HInvokeStaticOrDirect::MethodLoadKind::kDirectAddressWithFixup: - // TODO: Implement this type. (Needs literal support.) At the moment, the - // CompilerDriver will not direct the backend to use this type for MIPS. - LOG(FATAL) << "Unsupported!"; - UNREACHABLE(); case HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative: - // TODO: Implement this type. For the moment, we fall back to kDexCacheViaMethod. - FALLTHROUGH_INTENDED; + // TODO: Implement these types. + // Currently filtered out by GetSupportedInvokeStaticOrDirectDispatch(). + LOG(FATAL) << "Unsupported"; + UNREACHABLE(); case HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod: { Location current_method = invoke->GetLocations()->InAt(invoke->GetCurrentMethodInputIndex()); GpuRegister reg = temp.AsRegister<GpuRegister>(); @@ -2594,12 +2622,12 @@ void CodeGeneratorMIPS64::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invo // LR() __ Jalr(T9); break; - case HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative: - // TODO: Implement kCallPCRelative. For the moment, we fall back to kMethodCode. - FALLTHROUGH_INTENDED; case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup: - // TODO: Implement kDirectCodeFixup. For the moment, we fall back to kMethodCode. - FALLTHROUGH_INTENDED; + case HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative: + // TODO: Implement these types. + // Currently filtered out by GetSupportedInvokeStaticOrDirectDispatch(). + LOG(FATAL) << "Unsupported"; + UNREACHABLE(); case HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod: // T9 = callee_method->entry_point_from_quick_compiled_code_; __ LoadFromOffset(kLoadDoubleword, diff --git a/compiler/optimizing/code_generator_mips64.h b/compiler/optimizing/code_generator_mips64.h index 7799437235..9bbd02759a 100644 --- a/compiler/optimizing/code_generator_mips64.h +++ b/compiler/optimizing/code_generator_mips64.h @@ -217,9 +217,6 @@ class InstructionCodeGeneratorMIPS64 : public HGraphVisitor { Mips64Assembler* GetAssembler() const { return assembler_; } private: - // Generate code for the given suspend check. If not null, `successor` - // is the block to branch to if the suspend check is not needed, and after - // the suspend call. void GenerateClassInitializationCheck(SlowPathCodeMIPS64* slow_path, GpuRegister class_reg); void GenerateMemoryBarrier(MemBarrierKind kind); void GenerateSuspendCheck(HSuspendCheck* check, HBasicBlock* successor); @@ -329,6 +326,12 @@ class CodeGeneratorMIPS64 : public CodeGenerator { bool NeedsTwoRegisters(Primitive::Type type ATTRIBUTE_UNUSED) const { return false; } + // Check if the desired_dispatch_info is supported. If it is, return it, + // otherwise return a fall-back info that should be used instead. + HInvokeStaticOrDirect::DispatchInfo GetSupportedInvokeStaticOrDirectDispatch( + const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, + MethodReference target_method) OVERRIDE; + void GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) OVERRIDE; void GenerateVirtualCall(HInvokeVirtual* invoke ATTRIBUTE_UNUSED, Location temp ATTRIBUTE_UNUSED) OVERRIDE { diff --git a/compiler/optimizing/code_generator_x86.cc b/compiler/optimizing/code_generator_x86.cc index 963eec2529..0df7e3b30a 100644 --- a/compiler/optimizing/code_generator_x86.cc +++ b/compiler/optimizing/code_generator_x86.cc @@ -3757,6 +3757,34 @@ void InstructionCodeGeneratorX86::GenerateMemoryBarrier(MemBarrierKind kind) { } } +HInvokeStaticOrDirect::DispatchInfo CodeGeneratorX86::GetSupportedInvokeStaticOrDirectDispatch( + const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, + MethodReference target_method ATTRIBUTE_UNUSED) { + if (desired_dispatch_info.method_load_kind == + HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative) { + // TODO: Implement this type. For the moment, we fall back to kDexCacheViaMethod. + return HInvokeStaticOrDirect::DispatchInfo { + HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod, + HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod, + 0u, + 0u + }; + } + switch (desired_dispatch_info.code_ptr_location) { + case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup: + case HInvokeStaticOrDirect::CodePtrLocation::kCallDirect: + // For direct code, we actually prefer to call via the code pointer from ArtMethod*. + // (Though the direct CALL ptr16:32 is available for consideration). + return HInvokeStaticOrDirect::DispatchInfo { + desired_dispatch_info.method_load_kind, + HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod, + desired_dispatch_info.method_load_data, + 0u + }; + default: + return desired_dispatch_info; + } +} void CodeGeneratorX86::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) { Location callee_method = temp; // For all kinds except kRecursive, callee will be in temp. @@ -3777,8 +3805,10 @@ void CodeGeneratorX86::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, __ Bind(&method_patches_.back().label); // Bind the label at the end of the "movl" insn. break; case HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative: - // TODO: Implement this type. For the moment, we fall back to kDexCacheViaMethod. - FALLTHROUGH_INTENDED; + // TODO: Implement this type. + // Currently filtered out by GetSupportedInvokeStaticOrDirectDispatch(). + LOG(FATAL) << "Unsupported"; + UNREACHABLE(); case HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod: { Location current_method = invoke->GetLocations()->InAt(invoke->GetCurrentMethodInputIndex()); Register method_reg; @@ -3814,9 +3844,9 @@ void CodeGeneratorX86::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, } case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup: case HInvokeStaticOrDirect::CodePtrLocation::kCallDirect: - // For direct code, we actually prefer to call via the code pointer from ArtMethod*. - // (Though the direct CALL ptr16:32 is available for consideration). - FALLTHROUGH_INTENDED; + // Filtered out by GetSupportedInvokeStaticOrDirectDispatch(). + LOG(FATAL) << "Unsupported"; + UNREACHABLE(); case HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod: // (callee_method + offset_of_quick_compiled_code)() __ call(Address(callee_method.AsRegister<Register>(), diff --git a/compiler/optimizing/code_generator_x86.h b/compiler/optimizing/code_generator_x86.h index fdfc5ab69b..ac3d06c23d 100644 --- a/compiler/optimizing/code_generator_x86.h +++ b/compiler/optimizing/code_generator_x86.h @@ -333,6 +333,12 @@ class CodeGeneratorX86 : public CodeGenerator { // Helper method to move a 64bits value between two locations. void Move64(Location destination, Location source); + // Check if the desired_dispatch_info is supported. If it is, return it, + // otherwise return a fall-back info that should be used instead. + HInvokeStaticOrDirect::DispatchInfo GetSupportedInvokeStaticOrDirectDispatch( + const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, + MethodReference target_method) OVERRIDE; + // Generate a call to a static or direct method. void GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) OVERRIDE; // Generate a call to a virtual method. diff --git a/compiler/optimizing/code_generator_x86_64.cc b/compiler/optimizing/code_generator_x86_64.cc index ed2e4ca87c..5218d70995 100644 --- a/compiler/optimizing/code_generator_x86_64.cc +++ b/compiler/optimizing/code_generator_x86_64.cc @@ -473,6 +473,24 @@ inline Condition X86_64FPCondition(IfCondition cond) { UNREACHABLE(); } +HInvokeStaticOrDirect::DispatchInfo CodeGeneratorX86_64::GetSupportedInvokeStaticOrDirectDispatch( + const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, + MethodReference target_method ATTRIBUTE_UNUSED) { + switch (desired_dispatch_info.code_ptr_location) { + case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup: + case HInvokeStaticOrDirect::CodePtrLocation::kCallDirect: + // For direct code, we actually prefer to call via the code pointer from ArtMethod*. + return HInvokeStaticOrDirect::DispatchInfo { + desired_dispatch_info.method_load_kind, + HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod, + desired_dispatch_info.method_load_data, + 0u + }; + default: + return desired_dispatch_info; + } +} + void CodeGeneratorX86_64::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) { // All registers are assumed to be correctly set up. @@ -539,8 +557,9 @@ void CodeGeneratorX86_64::GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invo } case HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup: case HInvokeStaticOrDirect::CodePtrLocation::kCallDirect: - // For direct code, we actually prefer to call via the code pointer from ArtMethod*. - FALLTHROUGH_INTENDED; + // Filtered out by GetSupportedInvokeStaticOrDirectDispatch(). + LOG(FATAL) << "Unsupported"; + UNREACHABLE(); case HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod: // (callee_method + offset_of_quick_compiled_code)() __ call(Address(callee_method.AsRegister<CpuRegister>(), diff --git a/compiler/optimizing/code_generator_x86_64.h b/compiler/optimizing/code_generator_x86_64.h index dc86a48ce7..fc485f5bb6 100644 --- a/compiler/optimizing/code_generator_x86_64.h +++ b/compiler/optimizing/code_generator_x86_64.h @@ -335,6 +335,12 @@ class CodeGeneratorX86_64 : public CodeGenerator { return false; } + // Check if the desired_dispatch_info is supported. If it is, return it, + // otherwise return a fall-back info that should be used instead. + HInvokeStaticOrDirect::DispatchInfo GetSupportedInvokeStaticOrDirectDispatch( + const HInvokeStaticOrDirect::DispatchInfo& desired_dispatch_info, + MethodReference target_method) OVERRIDE; + void GenerateStaticOrDirectCall(HInvokeStaticOrDirect* invoke, Location temp) OVERRIDE; void GenerateVirtualCall(HInvokeVirtual* invoke, Location temp) OVERRIDE; diff --git a/compiler/optimizing/codegen_test.cc b/compiler/optimizing/codegen_test.cc index fe5af2fc5e..57de41f557 100644 --- a/compiler/optimizing/codegen_test.cc +++ b/compiler/optimizing/codegen_test.cc @@ -20,6 +20,8 @@ #include "arch/arm/instruction_set_features_arm.h" #include "arch/arm/registers_arm.h" #include "arch/arm64/instruction_set_features_arm64.h" +#include "arch/mips/instruction_set_features_mips.h" +#include "arch/mips/registers_mips.h" #include "arch/mips64/instruction_set_features_mips64.h" #include "arch/mips64/registers_mips64.h" #include "arch/x86/instruction_set_features_x86.h" @@ -29,6 +31,7 @@ #include "builder.h" #include "code_generator_arm.h" #include "code_generator_arm64.h" +#include "code_generator_mips.h" #include "code_generator_mips64.h" #include "code_generator_x86.h" #include "code_generator_x86_64.h" @@ -43,6 +46,7 @@ #include "ssa_liveness_analysis.h" #include "utils.h" #include "utils/arm/managed_register_arm.h" +#include "utils/mips/managed_register_mips.h" #include "utils/mips64/managed_register_mips64.h" #include "utils/x86/managed_register_x86.h" @@ -177,6 +181,14 @@ static void RunCodeBaseline(HGraph* graph, bool has_result, Expected expected) { Run(allocator, codegenARM64, has_result, expected); } + std::unique_ptr<const MipsInstructionSetFeatures> features_mips( + MipsInstructionSetFeatures::FromCppDefines()); + mips::CodeGeneratorMIPS codegenMIPS(graph, *features_mips.get(), compiler_options); + codegenMIPS.CompileBaseline(&allocator, true); + if (kRuntimeISA == kMips) { + Run(allocator, codegenMIPS, has_result, expected); + } + std::unique_ptr<const Mips64InstructionSetFeatures> features_mips64( Mips64InstructionSetFeatures::FromCppDefines()); mips64::CodeGeneratorMIPS64 codegenMIPS64(graph, *features_mips64.get(), compiler_options); @@ -234,6 +246,11 @@ static void RunCodeOptimized(HGraph* graph, X86_64InstructionSetFeatures::FromCppDefines()); x86_64::CodeGeneratorX86_64 codegenX86_64(graph, *features_x86_64.get(), compiler_options); RunCodeOptimized(&codegenX86_64, graph, hook_before_codegen, has_result, expected); + } else if (kRuntimeISA == kMips) { + std::unique_ptr<const MipsInstructionSetFeatures> features_mips( + MipsInstructionSetFeatures::FromCppDefines()); + mips::CodeGeneratorMIPS codegenMIPS(graph, *features_mips.get(), compiler_options); + RunCodeOptimized(&codegenMIPS, graph, hook_before_codegen, has_result, expected); } else if (kRuntimeISA == kMips64) { std::unique_ptr<const Mips64InstructionSetFeatures> features_mips64( Mips64InstructionSetFeatures::FromCppDefines()); diff --git a/compiler/optimizing/common_arm64.h b/compiler/optimizing/common_arm64.h index 4abe5e953c..e1a8c9cc0f 100644 --- a/compiler/optimizing/common_arm64.h +++ b/compiler/optimizing/common_arm64.h @@ -203,19 +203,23 @@ static bool CanEncodeConstantAsImmediate(HConstant* constant, HInstruction* inst int64_t value = CodeGenerator::GetInt64ValueOf(constant); - if (instr->IsAdd() || instr->IsSub() || instr->IsCondition() || - instr->IsCompare() || instr->IsBoundsCheck()) { - // Uses aliases of ADD/SUB instructions. - // If `value` does not fit but `-value` does, VIXL will automatically use - // the 'opposite' instruction. - return vixl::Assembler::IsImmAddSub(value) || vixl::Assembler::IsImmAddSub(-value); - } else if (instr->IsAnd() || instr->IsOr() || instr->IsXor()) { + if (instr->IsAnd() || instr->IsOr() || instr->IsXor()) { // Uses logical operations. return vixl::Assembler::IsImmLogical(value, vixl::kXRegSize); - } else { - DCHECK(instr->IsNeg()); + } else if (instr->IsNeg()) { // Uses mov -immediate. return vixl::Assembler::IsImmMovn(value, vixl::kXRegSize); + } else { + DCHECK(instr->IsAdd() || + instr->IsArm64IntermediateAddress() || + instr->IsBoundsCheck() || + instr->IsCompare() || + instr->IsCondition() || + instr->IsSub()); + // Uses aliases of ADD/SUB instructions. + // If `value` does not fit but `-value` does, VIXL will automatically use + // the 'opposite' instruction. + return vixl::Assembler::IsImmAddSub(value) || vixl::Assembler::IsImmAddSub(-value); } } diff --git a/compiler/optimizing/constant_folding_test.cc b/compiler/optimizing/constant_folding_test.cc index b2e222f1a9..2feb75cc9f 100644 --- a/compiler/optimizing/constant_folding_test.cc +++ b/compiler/optimizing/constant_folding_test.cc @@ -569,7 +569,7 @@ TEST(ConstantFolding, IntConstantFoldingAndJumps) { Instruction::ADD_INT_LIT16 | 1 << 8 | 0 << 12, 5, Instruction::GOTO | 4 << 8, Instruction::ADD_INT_LIT16 | 0 << 8 | 2 << 12, 4, - static_cast<uint16_t>(Instruction::GOTO | -5 << 8), + static_cast<uint16_t>(Instruction::GOTO | 0xFFFFFFFB << 8), Instruction::ADD_INT_LIT16 | 2 << 8 | 1 << 12, 8, Instruction::RETURN | 2 << 8); diff --git a/compiler/optimizing/dead_code_elimination_test.cc b/compiler/optimizing/dead_code_elimination_test.cc index cf0a4acd4a..2c6a1ef63d 100644 --- a/compiler/optimizing/dead_code_elimination_test.cc +++ b/compiler/optimizing/dead_code_elimination_test.cc @@ -140,7 +140,7 @@ TEST(DeadCodeElimination, AdditionsAndInconditionalJumps) { Instruction::ADD_INT_LIT16 | 1 << 8 | 0 << 12, 3, Instruction::GOTO | 4 << 8, Instruction::ADD_INT_LIT16 | 0 << 8 | 2 << 12, 2, - static_cast<uint16_t>(Instruction::GOTO | -5 << 8), + static_cast<uint16_t>(Instruction::GOTO | 0xFFFFFFFB << 8), Instruction::ADD_INT_LIT16 | 2 << 8 | 1 << 12, 4, Instruction::RETURN_VOID); diff --git a/compiler/optimizing/gvn.cc b/compiler/optimizing/gvn.cc index 0a1758a936..c36de84064 100644 --- a/compiler/optimizing/gvn.cc +++ b/compiler/optimizing/gvn.cc @@ -16,11 +16,11 @@ #include "gvn.h" +#include "base/arena_bit_vector.h" #include "base/arena_containers.h" #include "base/bit_vector-inl.h" #include "side_effects_analysis.h" #include "utils.h" -#include "utils/arena_bit_vector.h" namespace art { diff --git a/compiler/optimizing/gvn_test.cc b/compiler/optimizing/gvn_test.cc index aa375f697b..de60cf21aa 100644 --- a/compiler/optimizing/gvn_test.cc +++ b/compiler/optimizing/gvn_test.cc @@ -49,6 +49,7 @@ TEST(GVNTest, LocalFieldElimination) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -57,6 +58,7 @@ TEST(GVNTest, LocalFieldElimination) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -66,6 +68,7 @@ TEST(GVNTest, LocalFieldElimination) { MemberOffset(43), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -77,6 +80,7 @@ TEST(GVNTest, LocalFieldElimination) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -85,6 +89,7 @@ TEST(GVNTest, LocalFieldElimination) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -128,6 +133,7 @@ TEST(GVNTest, GlobalFieldElimination) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -150,6 +156,7 @@ TEST(GVNTest, GlobalFieldElimination) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -159,6 +166,7 @@ TEST(GVNTest, GlobalFieldElimination) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -168,6 +176,7 @@ TEST(GVNTest, GlobalFieldElimination) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -208,6 +217,7 @@ TEST(GVNTest, LoopFieldElimination) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -230,6 +240,7 @@ TEST(GVNTest, LoopFieldElimination) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -244,6 +255,7 @@ TEST(GVNTest, LoopFieldElimination) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -253,6 +265,7 @@ TEST(GVNTest, LoopFieldElimination) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -264,6 +277,7 @@ TEST(GVNTest, LoopFieldElimination) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -364,6 +378,7 @@ TEST(GVNTest, LoopSideEffects) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0)); @@ -388,6 +403,7 @@ TEST(GVNTest, LoopSideEffects) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0), @@ -413,6 +429,7 @@ TEST(GVNTest, LoopSideEffects) { MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0), diff --git a/compiler/optimizing/inliner.cc b/compiler/optimizing/inliner.cc index f3b5f08c7e..0aaa6b3f2c 100644 --- a/compiler/optimizing/inliner.cc +++ b/compiler/optimizing/inliner.cc @@ -32,6 +32,7 @@ #include "optimizing_compiler.h" #include "reference_type_propagation.h" #include "register_allocator.h" +#include "sharpening.h" #include "ssa_phi_elimination.h" #include "scoped_thread_state_change.h" #include "thread.h" @@ -396,12 +397,14 @@ bool HInliner::TryBuildAndInline(ArtMethod* resolved_method, HDeadCodeElimination dce(callee_graph, stats_); HConstantFolding fold(callee_graph); ReferenceTypePropagation type_propagation(callee_graph, handles_); + HSharpening sharpening(callee_graph, codegen_, dex_compilation_unit, compiler_driver_); InstructionSimplifier simplify(callee_graph, stats_); IntrinsicsRecognizer intrinsics(callee_graph, compiler_driver_); HOptimization* optimizations[] = { &intrinsics, &type_propagation, + &sharpening, &simplify, &dce, &fold, @@ -415,6 +418,7 @@ bool HInliner::TryBuildAndInline(ArtMethod* resolved_method, size_t number_of_instructions_budget = kMaximumNumberOfHInstructions; if (depth_ + 1 < compiler_driver_->GetCompilerOptions().GetInlineDepthLimit()) { HInliner inliner(callee_graph, + codegen_, outer_compilation_unit_, dex_compilation_unit, compiler_driver_, @@ -484,7 +488,7 @@ bool HInliner::TryBuildAndInline(ArtMethod* resolved_method, return false; } - if (!same_dex_file && current->NeedsDexCache()) { + if (!same_dex_file && current->NeedsDexCacheOfDeclaringClass()) { VLOG(compiler) << "Method " << PrettyMethod(method_index, callee_dex_file) << " could not be inlined because " << current->DebugName() << " it is in a different dex file and requires access to the dex cache"; @@ -495,6 +499,9 @@ bool HInliner::TryBuildAndInline(ArtMethod* resolved_method, number_of_inlined_instructions_ += number_of_instructions; HInstruction* return_replacement = callee_graph->InlineInto(graph_, invoke_instruction); + if (return_replacement != nullptr) { + DCHECK_EQ(graph_, return_replacement->GetBlock()->GetGraph()); + } // When merging the graph we might create a new NullConstant in the caller graph which does // not have the chance to be typed. We assign the correct type here so that we can keep the diff --git a/compiler/optimizing/inliner.h b/compiler/optimizing/inliner.h index bce5915219..0f6a9453be 100644 --- a/compiler/optimizing/inliner.h +++ b/compiler/optimizing/inliner.h @@ -22,6 +22,7 @@ namespace art { +class CodeGenerator; class CompilerDriver; class DexCompilationUnit; class HGraph; @@ -31,6 +32,7 @@ class OptimizingCompilerStats; class HInliner : public HOptimization { public: HInliner(HGraph* outer_graph, + CodeGenerator* codegen, const DexCompilationUnit& outer_compilation_unit, const DexCompilationUnit& caller_compilation_unit, CompilerDriver* compiler_driver, @@ -40,6 +42,7 @@ class HInliner : public HOptimization { : HOptimization(outer_graph, kInlinerPassName, stats), outer_compilation_unit_(outer_compilation_unit), caller_compilation_unit_(caller_compilation_unit), + codegen_(codegen), compiler_driver_(compiler_driver), depth_(depth), number_of_inlined_instructions_(0), @@ -57,6 +60,7 @@ class HInliner : public HOptimization { const DexCompilationUnit& outer_compilation_unit_; const DexCompilationUnit& caller_compilation_unit_; + CodeGenerator* const codegen_; CompilerDriver* const compiler_driver_; const size_t depth_; size_t number_of_inlined_instructions_; diff --git a/compiler/optimizing/instruction_simplifier.cc b/compiler/optimizing/instruction_simplifier.cc index 7814eb9c11..b97dc1a511 100644 --- a/compiler/optimizing/instruction_simplifier.cc +++ b/compiler/optimizing/instruction_simplifier.cc @@ -625,9 +625,9 @@ void InstructionSimplifierVisitor::VisitCondition(HCondition* condition) { // Try to fold an HCompare into this HCondition. // This simplification is currently supported on x86, x86_64, ARM and ARM64. - // TODO: Implement it for MIPS64. + // TODO: Implement it for MIPS and MIPS64. InstructionSet instruction_set = GetGraph()->GetInstructionSet(); - if (instruction_set == kMips64) { + if (instruction_set == kMips || instruction_set == kMips64) { return; } diff --git a/compiler/optimizing/instruction_simplifier_arm64.cc b/compiler/optimizing/instruction_simplifier_arm64.cc index 4b2d36f443..eb79f469eb 100644 --- a/compiler/optimizing/instruction_simplifier_arm64.cc +++ b/compiler/optimizing/instruction_simplifier_arm64.cc @@ -16,8 +16,65 @@ #include "instruction_simplifier_arm64.h" +#include "mirror/array-inl.h" + namespace art { namespace arm64 { +void InstructionSimplifierArm64Visitor::TryExtractArrayAccessAddress(HInstruction* access, + HInstruction* array, + HInstruction* index, + int access_size) { + if (index->IsConstant() || + (index->IsBoundsCheck() && index->AsBoundsCheck()->GetIndex()->IsConstant())) { + // When the index is a constant all the addressing can be fitted in the + // memory access instruction, so do not split the access. + return; + } + if (access->IsArraySet() && + access->AsArraySet()->GetValue()->GetType() == Primitive::kPrimNot) { + // The access may require a runtime call or the original array pointer. + return; + } + + // Proceed to extract the base address computation. + ArenaAllocator* arena = GetGraph()->GetArena(); + + HIntConstant* offset = + GetGraph()->GetIntConstant(mirror::Array::DataOffset(access_size).Uint32Value()); + HArm64IntermediateAddress* address = + new (arena) HArm64IntermediateAddress(array, offset, kNoDexPc); + access->GetBlock()->InsertInstructionBefore(address, access); + access->ReplaceInput(address, 0); + // Both instructions must depend on GC to prevent any instruction that can + // trigger GC to be inserted between the two. + access->AddSideEffects(SideEffects::DependsOnGC()); + DCHECK(address->GetSideEffects().Includes(SideEffects::DependsOnGC())); + DCHECK(access->GetSideEffects().Includes(SideEffects::DependsOnGC())); + // TODO: Code generation for HArrayGet and HArraySet will check whether the input address + // is an HArm64IntermediateAddress and generate appropriate code. + // We would like to replace the `HArrayGet` and `HArraySet` with custom instructions (maybe + // `HArm64Load` and `HArm64Store`). We defer these changes because these new instructions would + // not bring any advantages yet. + // Also see the comments in + // `InstructionCodeGeneratorARM64::VisitArrayGet()` and + // `InstructionCodeGeneratorARM64::VisitArraySet()`. + RecordSimplification(); +} + +void InstructionSimplifierArm64Visitor::VisitArrayGet(HArrayGet* instruction) { + TryExtractArrayAccessAddress(instruction, + instruction->GetArray(), + instruction->GetIndex(), + Primitive::ComponentSize(instruction->GetType())); +} + +void InstructionSimplifierArm64Visitor::VisitArraySet(HArraySet* instruction) { + TryExtractArrayAccessAddress(instruction, + instruction->GetArray(), + instruction->GetIndex(), + Primitive::ComponentSize(instruction->GetComponentType())); +} + } // namespace arm64 } // namespace art diff --git a/compiler/optimizing/instruction_simplifier_arm64.h b/compiler/optimizing/instruction_simplifier_arm64.h index d7f4eaee80..4b697dba0e 100644 --- a/compiler/optimizing/instruction_simplifier_arm64.h +++ b/compiler/optimizing/instruction_simplifier_arm64.h @@ -35,6 +35,14 @@ class InstructionSimplifierArm64Visitor : public HGraphVisitor { } } + void TryExtractArrayAccessAddress(HInstruction* access, + HInstruction* array, + HInstruction* index, + int access_size); + + void VisitArrayGet(HArrayGet* instruction) OVERRIDE; + void VisitArraySet(HArraySet* instruction) OVERRIDE; + OptimizingCompilerStats* stats_; }; diff --git a/compiler/optimizing/intrinsics_arm.cc b/compiler/optimizing/intrinsics_arm.cc index 58e479afc7..0a5acc3e64 100644 --- a/compiler/optimizing/intrinsics_arm.cc +++ b/compiler/optimizing/intrinsics_arm.cc @@ -961,6 +961,14 @@ void IntrinsicLocationsBuilderARM::VisitUnsafeCASInt(HInvoke* invoke) { CreateIntIntIntIntIntToIntPlusTemps(arena_, invoke); } void IntrinsicLocationsBuilderARM::VisitUnsafeCASObject(HInvoke* invoke) { + // The UnsafeCASObject intrinsic does not always work when heap + // poisoning is enabled (it breaks run-test 004-UnsafeTest); turn it + // off temporarily as a quick fix. + // TODO(rpl): Fix it and turn it back on. + if (kPoisonHeapReferences) { + return; + } + CreateIntIntIntIntIntToIntPlusTemps(arena_, invoke); } void IntrinsicCodeGeneratorARM::VisitUnsafeCASInt(HInvoke* invoke) { diff --git a/compiler/optimizing/intrinsics_arm64.cc b/compiler/optimizing/intrinsics_arm64.cc index 4da94ee9b3..059abf090d 100644 --- a/compiler/optimizing/intrinsics_arm64.cc +++ b/compiler/optimizing/intrinsics_arm64.cc @@ -1087,6 +1087,14 @@ void IntrinsicLocationsBuilderARM64::VisitUnsafeCASLong(HInvoke* invoke) { CreateIntIntIntIntIntToInt(arena_, invoke); } void IntrinsicLocationsBuilderARM64::VisitUnsafeCASObject(HInvoke* invoke) { + // The UnsafeCASObject intrinsic does not always work when heap + // poisoning is enabled (it breaks run-test 004-UnsafeTest); turn it + // off temporarily as a quick fix. + // TODO(rpl): Fix it and turn it back on. + if (kPoisonHeapReferences) { + return; + } + CreateIntIntIntIntIntToInt(arena_, invoke); } diff --git a/compiler/optimizing/intrinsics_mips64.cc b/compiler/optimizing/intrinsics_mips64.cc index 56c4177b29..0ab0b80396 100644 --- a/compiler/optimizing/intrinsics_mips64.cc +++ b/compiler/optimizing/intrinsics_mips64.cc @@ -272,7 +272,9 @@ void IntrinsicCodeGeneratorMIPS64::VisitShortReverseBytes(HInvoke* invoke) { GenReverseBytes(invoke->GetLocations(), Primitive::kPrimShort, GetAssembler()); } -static void GenNumberOfLeadingZeroes(LocationSummary* locations, bool is64bit, Mips64Assembler* assembler) { +static void GenNumberOfLeadingZeroes(LocationSummary* locations, + bool is64bit, + Mips64Assembler* assembler) { GpuRegister in = locations->InAt(0).AsRegister<GpuRegister>(); GpuRegister out = locations->Out().AsRegister<GpuRegister>(); @@ -301,7 +303,9 @@ void IntrinsicCodeGeneratorMIPS64::VisitLongNumberOfLeadingZeros(HInvoke* invoke GenNumberOfLeadingZeroes(invoke->GetLocations(), true, GetAssembler()); } -static void GenNumberOfTrailingZeroes(LocationSummary* locations, bool is64bit, Mips64Assembler* assembler) { +static void GenNumberOfTrailingZeroes(LocationSummary* locations, + bool is64bit, + Mips64Assembler* assembler) { Location in = locations->InAt(0); Location out = locations->Out(); @@ -383,7 +387,7 @@ void IntrinsicCodeGeneratorMIPS64::VisitIntegerRotateRight(HInvoke* invoke) { GenRotateRight(invoke, Primitive::kPrimInt, GetAssembler()); } -// int java.lang.Long.rotateRight(long i, int distance) +// long java.lang.Long.rotateRight(long i, int distance) void IntrinsicLocationsBuilderMIPS64::VisitLongRotateRight(HInvoke* invoke) { LocationSummary* locations = new (arena_) LocationSummary(invoke, LocationSummary::kNoCall, @@ -446,7 +450,7 @@ void IntrinsicCodeGeneratorMIPS64::VisitIntegerRotateLeft(HInvoke* invoke) { GenRotateLeft(invoke, Primitive::kPrimInt, GetAssembler()); } -// int java.lang.Long.rotateLeft(long i, int distance) +// long java.lang.Long.rotateLeft(long i, int distance) void IntrinsicLocationsBuilderMIPS64::VisitLongRotateLeft(HInvoke* invoke) { LocationSummary* locations = new (arena_) LocationSummary(invoke, LocationSummary::kNoCall, @@ -754,17 +758,19 @@ void IntrinsicCodeGeneratorMIPS64::VisitMathSqrt(HInvoke* invoke) { __ SqrtD(out, in); } -static void CreateFPToFP(ArenaAllocator* arena, HInvoke* invoke) { +static void CreateFPToFP(ArenaAllocator* arena, + HInvoke* invoke, + Location::OutputOverlap overlaps = Location::kOutputOverlap) { LocationSummary* locations = new (arena) LocationSummary(invoke, LocationSummary::kNoCall, kIntrinsified); locations->SetInAt(0, Location::RequiresFpuRegister()); - locations->SetOut(Location::RequiresFpuRegister(), Location::kNoOutputOverlap); + locations->SetOut(Location::RequiresFpuRegister(), overlaps); } // double java.lang.Math.rint(double) void IntrinsicLocationsBuilderMIPS64::VisitMathRint(HInvoke* invoke) { - CreateFPToFP(arena_, invoke); + CreateFPToFP(arena_, invoke, Location::kNoOutputOverlap); } void IntrinsicCodeGeneratorMIPS64::VisitMathRint(HInvoke* invoke) { @@ -788,15 +794,22 @@ const constexpr uint16_t kFPLeaveUnchanged = kPositiveZero | kQuietNaN | kSignalingNaN; -void IntrinsicCodeGeneratorMIPS64::VisitMathFloor(HInvoke* invoke) { - LocationSummary* locations = invoke->GetLocations(); - Mips64Assembler* assembler = GetAssembler(); +enum FloatRoundingMode { + kFloor, + kCeil, +}; + +static void GenRoundingMode(LocationSummary* locations, + FloatRoundingMode mode, + Mips64Assembler* assembler) { FpuRegister in = locations->InAt(0).AsFpuRegister<FpuRegister>(); FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>(); + DCHECK_NE(in, out); + Label done; - // double floor(double in) { + // double floor/ceil(double in) { // if in.isNaN || in.isInfinite || in.isZero { // return in; // } @@ -806,19 +819,23 @@ void IntrinsicCodeGeneratorMIPS64::VisitMathFloor(HInvoke* invoke) { __ MovD(out, in); __ Bnezc(AT, &done); - // Long outLong = floor(in); + // Long outLong = floor/ceil(in); // if outLong == Long.MAX_VALUE { - // // floor() has almost certainly returned a value which - // // can't be successfully represented as a signed 64-bit - // // number. Java expects that the input value will be - // // returned in these cases. - // // There is also a small probability that floor(in) - // // correctly truncates the input value to Long.MAX_VALUE. In - // // that case, this exception handling code still does the - // // correct thing. + // // floor()/ceil() has almost certainly returned a value + // // which can't be successfully represented as a signed + // // 64-bit number. Java expects that the input value will + // // be returned in these cases. + // // There is also a small probability that floor(in)/ceil(in) + // // correctly truncates/rounds up the input value to + // // Long.MAX_VALUE. In that case, this exception handling + // // code still does the correct thing. // return in; // } - __ FloorLD(out, in); + if (mode == kFloor) { + __ FloorLD(out, in); + } else if (mode == kCeil) { + __ CeilLD(out, in); + } __ Dmfc1(AT, out); __ MovD(out, in); __ LoadConst64(TMP, kPrimLongMax); @@ -832,53 +849,17 @@ void IntrinsicCodeGeneratorMIPS64::VisitMathFloor(HInvoke* invoke) { // } } +void IntrinsicCodeGeneratorMIPS64::VisitMathFloor(HInvoke* invoke) { + GenRoundingMode(invoke->GetLocations(), kFloor, GetAssembler()); +} + // double java.lang.Math.ceil(double) void IntrinsicLocationsBuilderMIPS64::VisitMathCeil(HInvoke* invoke) { CreateFPToFP(arena_, invoke); } void IntrinsicCodeGeneratorMIPS64::VisitMathCeil(HInvoke* invoke) { - LocationSummary* locations = invoke->GetLocations(); - Mips64Assembler* assembler = GetAssembler(); - FpuRegister in = locations->InAt(0).AsFpuRegister<FpuRegister>(); - FpuRegister out = locations->Out().AsFpuRegister<FpuRegister>(); - - Label done; - - // double ceil(double in) { - // if in.isNaN || in.isInfinite || in.isZero { - // return in; - // } - __ ClassD(out, in); - __ Dmfc1(AT, out); - __ Andi(AT, AT, kFPLeaveUnchanged); // +0.0 | +Inf | -0.0 | -Inf | qNaN | sNaN - __ MovD(out, in); - __ Bnezc(AT, &done); - - // Long outLong = ceil(in); - // if outLong == Long.MAX_VALUE { - // // ceil() has almost certainly returned a value which - // // can't be successfully represented as a signed 64-bit - // // number. Java expects that the input value will be - // // returned in these cases. - // // There is also a small probability that ceil(in) - // // correctly rounds up the input value to Long.MAX_VALUE. In - // // that case, this exception handling code still does the - // // correct thing. - // return in; - // } - __ CeilLD(out, in); - __ Dmfc1(AT, out); - __ MovD(out, in); - __ LoadConst64(TMP, kPrimLongMax); - __ Beqc(AT, TMP, &done); - - // double out = outLong; - // return out; - __ Dmtc1(AT, out); - __ Cvtdl(out, out); - __ Bind(&done); - // } + GenRoundingMode(invoke->GetLocations(), kCeil, GetAssembler()); } // byte libcore.io.Memory.peekByte(long address) diff --git a/compiler/optimizing/intrinsics_x86.cc b/compiler/optimizing/intrinsics_x86.cc index e83aebb5be..040bf6a45e 100644 --- a/compiler/optimizing/intrinsics_x86.cc +++ b/compiler/optimizing/intrinsics_x86.cc @@ -45,7 +45,7 @@ IntrinsicLocationsBuilderX86::IntrinsicLocationsBuilderX86(CodeGeneratorX86* cod X86Assembler* IntrinsicCodeGeneratorX86::GetAssembler() { - return reinterpret_cast<X86Assembler*>(codegen_->GetAssembler()); + return down_cast<X86Assembler*>(codegen_->GetAssembler()); } ArenaAllocator* IntrinsicCodeGeneratorX86::GetAllocator() { @@ -1728,7 +1728,7 @@ static void GenUnsafePut(LocationSummary* locations, Primitive::Type type, bool is_volatile, CodeGeneratorX86* codegen) { - X86Assembler* assembler = reinterpret_cast<X86Assembler*>(codegen->GetAssembler()); + X86Assembler* assembler = down_cast<X86Assembler*>(codegen->GetAssembler()); Register base = locations->InAt(1).AsRegister<Register>(); Register offset = locations->InAt(2).AsRegisterPairLow<Register>(); Location value_loc = locations->InAt(3); @@ -1822,7 +1822,7 @@ static void CreateIntIntIntIntIntToInt(ArenaAllocator* arena, Primitive::Type ty locations->SetOut(Location::RegisterLocation(EAX)); if (type == Primitive::kPrimNot) { // Need temp registers for card-marking. - locations->AddTemp(Location::RequiresRegister()); + locations->AddTemp(Location::RequiresRegister()); // Possibly used for reference poisoning too. // Need a byte register for marking. locations->AddTemp(Location::RegisterLocation(ECX)); } @@ -1841,8 +1841,7 @@ void IntrinsicLocationsBuilderX86::VisitUnsafeCASObject(HInvoke* invoke) { } static void GenCAS(Primitive::Type type, HInvoke* invoke, CodeGeneratorX86* codegen) { - X86Assembler* assembler = - reinterpret_cast<X86Assembler*>(codegen->GetAssembler()); + X86Assembler* assembler = down_cast<X86Assembler*>(codegen->GetAssembler()); LocationSummary* locations = invoke->GetLocations(); Register base = locations->InAt(1).AsRegister<Register>(); @@ -1850,47 +1849,92 @@ static void GenCAS(Primitive::Type type, HInvoke* invoke, CodeGeneratorX86* code Location out = locations->Out(); DCHECK_EQ(out.AsRegister<Register>(), EAX); - if (type == Primitive::kPrimLong) { - DCHECK_EQ(locations->InAt(3).AsRegisterPairLow<Register>(), EAX); - DCHECK_EQ(locations->InAt(3).AsRegisterPairHigh<Register>(), EDX); - DCHECK_EQ(locations->InAt(4).AsRegisterPairLow<Register>(), EBX); - DCHECK_EQ(locations->InAt(4).AsRegisterPairHigh<Register>(), ECX); - __ LockCmpxchg8b(Address(base, offset, TIMES_1, 0)); - } else { - // Integer or object. + if (type == Primitive::kPrimNot) { Register expected = locations->InAt(3).AsRegister<Register>(); + // Ensure `expected` is in EAX (required by the CMPXCHG instruction). DCHECK_EQ(expected, EAX); Register value = locations->InAt(4).AsRegister<Register>(); - if (type == Primitive::kPrimNot) { - // Mark card for object assuming new value is stored. - bool value_can_be_null = true; // TODO: Worth finding out this information? - codegen->MarkGCCard(locations->GetTemp(0).AsRegister<Register>(), - locations->GetTemp(1).AsRegister<Register>(), - base, - value, - value_can_be_null); - - if (kPoisonHeapReferences) { - __ PoisonHeapReference(expected); - __ PoisonHeapReference(value); + + // Mark card for object assuming new value is stored. + bool value_can_be_null = true; // TODO: Worth finding out this information? + codegen->MarkGCCard(locations->GetTemp(0).AsRegister<Register>(), + locations->GetTemp(1).AsRegister<Register>(), + base, + value, + value_can_be_null); + + bool base_equals_value = (base == value); + if (kPoisonHeapReferences) { + if (base_equals_value) { + // If `base` and `value` are the same register location, move + // `value` to a temporary register. This way, poisoning + // `value` won't invalidate `base`. + value = locations->GetTemp(0).AsRegister<Register>(); + __ movl(value, base); } + + // Check that the register allocator did not assign the location + // of `expected` (EAX) to `value` nor to `base`, so that heap + // poisoning (when enabled) works as intended below. + // - If `value` were equal to `expected`, both references would + // be poisoned twice, meaning they would not be poisoned at + // all, as heap poisoning uses address negation. + // - If `base` were equal to `expected`, poisoning `expected` + // would invalidate `base`. + DCHECK_NE(value, expected); + DCHECK_NE(base, expected); + + __ PoisonHeapReference(expected); + __ PoisonHeapReference(value); } __ LockCmpxchgl(Address(base, offset, TIMES_1, 0), value); - } - // locked cmpxchg has full barrier semantics, and we don't need scheduling - // barriers at this time. + // locked cmpxchg has full barrier semantics, and we don't need + // scheduling barriers at this time. - // Convert ZF into the boolean result. - __ setb(kZero, out.AsRegister<Register>()); - __ movzxb(out.AsRegister<Register>(), out.AsRegister<ByteRegister>()); + // Convert ZF into the boolean result. + __ setb(kZero, out.AsRegister<Register>()); + __ movzxb(out.AsRegister<Register>(), out.AsRegister<ByteRegister>()); - if (kPoisonHeapReferences && type == Primitive::kPrimNot) { - Register value = locations->InAt(4).AsRegister<Register>(); - __ UnpoisonHeapReference(value); - // Do not unpoison the reference contained in register `expected`, - // as it is the same as register `out`. + if (kPoisonHeapReferences) { + if (base_equals_value) { + // `value` has been moved to a temporary register, no need to + // unpoison it. + } else { + // Ensure `value` is different from `out`, so that unpoisoning + // the former does not invalidate the latter. + DCHECK_NE(value, out.AsRegister<Register>()); + __ UnpoisonHeapReference(value); + } + // Do not unpoison the reference contained in register + // `expected`, as it is the same as register `out` (EAX). + } + } else { + if (type == Primitive::kPrimInt) { + // Ensure the expected value is in EAX (required by the CMPXCHG + // instruction). + DCHECK_EQ(locations->InAt(3).AsRegister<Register>(), EAX); + __ LockCmpxchgl(Address(base, offset, TIMES_1, 0), + locations->InAt(4).AsRegister<Register>()); + } else if (type == Primitive::kPrimLong) { + // Ensure the expected value is in EAX:EDX and that the new + // value is in EBX:ECX (required by the CMPXCHG8B instruction). + DCHECK_EQ(locations->InAt(3).AsRegisterPairLow<Register>(), EAX); + DCHECK_EQ(locations->InAt(3).AsRegisterPairHigh<Register>(), EDX); + DCHECK_EQ(locations->InAt(4).AsRegisterPairLow<Register>(), EBX); + DCHECK_EQ(locations->InAt(4).AsRegisterPairHigh<Register>(), ECX); + __ LockCmpxchg8b(Address(base, offset, TIMES_1, 0)); + } else { + LOG(FATAL) << "Unexpected CAS type " << type; + } + + // locked cmpxchg has full barrier semantics, and we don't need + // scheduling barriers at this time. + + // Convert ZF into the boolean result. + __ setb(kZero, out.AsRegister<Register>()); + __ movzxb(out.AsRegister<Register>(), out.AsRegister<ByteRegister>()); } } @@ -1928,8 +1972,7 @@ static void SwapBits(Register reg, Register temp, int32_t shift, int32_t mask, } void IntrinsicCodeGeneratorX86::VisitIntegerReverse(HInvoke* invoke) { - X86Assembler* assembler = - reinterpret_cast<X86Assembler*>(codegen_->GetAssembler()); + X86Assembler* assembler = down_cast<X86Assembler*>(codegen_->GetAssembler()); LocationSummary* locations = invoke->GetLocations(); Register reg = locations->InAt(0).AsRegister<Register>(); @@ -1960,8 +2003,7 @@ void IntrinsicLocationsBuilderX86::VisitLongReverse(HInvoke* invoke) { } void IntrinsicCodeGeneratorX86::VisitLongReverse(HInvoke* invoke) { - X86Assembler* assembler = - reinterpret_cast<X86Assembler*>(codegen_->GetAssembler()); + X86Assembler* assembler = down_cast<X86Assembler*>(codegen_->GetAssembler()); LocationSummary* locations = invoke->GetLocations(); Register reg_low = locations->InAt(0).AsRegisterPairLow<Register>(); diff --git a/compiler/optimizing/intrinsics_x86_64.cc b/compiler/optimizing/intrinsics_x86_64.cc index e0d88a91d3..14c65c9aaf 100644 --- a/compiler/optimizing/intrinsics_x86_64.cc +++ b/compiler/optimizing/intrinsics_x86_64.cc @@ -41,7 +41,7 @@ IntrinsicLocationsBuilderX86_64::IntrinsicLocationsBuilderX86_64(CodeGeneratorX8 X86_64Assembler* IntrinsicCodeGeneratorX86_64::GetAssembler() { - return reinterpret_cast<X86_64Assembler*>(codegen_->GetAssembler()); + return down_cast<X86_64Assembler*>(codegen_->GetAssembler()); } ArenaAllocator* IntrinsicCodeGeneratorX86_64::GetAllocator() { @@ -1822,7 +1822,7 @@ void IntrinsicLocationsBuilderX86_64::VisitUnsafePutLongVolatile(HInvoke* invoke // memory model. static void GenUnsafePut(LocationSummary* locations, Primitive::Type type, bool is_volatile, CodeGeneratorX86_64* codegen) { - X86_64Assembler* assembler = reinterpret_cast<X86_64Assembler*>(codegen->GetAssembler()); + X86_64Assembler* assembler = down_cast<X86_64Assembler*>(codegen->GetAssembler()); CpuRegister base = locations->InAt(1).AsRegister<CpuRegister>(); CpuRegister offset = locations->InAt(2).AsRegister<CpuRegister>(); CpuRegister value = locations->InAt(3).AsRegister<CpuRegister>(); @@ -1895,7 +1895,7 @@ static void CreateIntIntIntIntIntToInt(ArenaAllocator* arena, Primitive::Type ty locations->SetOut(Location::RequiresRegister()); if (type == Primitive::kPrimNot) { // Need temp registers for card-marking. - locations->AddTemp(Location::RequiresRegister()); + locations->AddTemp(Location::RequiresRegister()); // Possibly used for reference poisoning too. locations->AddTemp(Location::RequiresRegister()); } } @@ -1913,49 +1913,91 @@ void IntrinsicLocationsBuilderX86_64::VisitUnsafeCASObject(HInvoke* invoke) { } static void GenCAS(Primitive::Type type, HInvoke* invoke, CodeGeneratorX86_64* codegen) { - X86_64Assembler* assembler = - reinterpret_cast<X86_64Assembler*>(codegen->GetAssembler()); + X86_64Assembler* assembler = down_cast<X86_64Assembler*>(codegen->GetAssembler()); LocationSummary* locations = invoke->GetLocations(); CpuRegister base = locations->InAt(1).AsRegister<CpuRegister>(); CpuRegister offset = locations->InAt(2).AsRegister<CpuRegister>(); CpuRegister expected = locations->InAt(3).AsRegister<CpuRegister>(); + // Ensure `expected` is in RAX (required by the CMPXCHG instruction). DCHECK_EQ(expected.AsRegister(), RAX); CpuRegister value = locations->InAt(4).AsRegister<CpuRegister>(); CpuRegister out = locations->Out().AsRegister<CpuRegister>(); - if (type == Primitive::kPrimLong) { - __ LockCmpxchgq(Address(base, offset, TIMES_1, 0), value); - } else { - // Integer or object. - if (type == Primitive::kPrimNot) { - // Mark card for object assuming new value is stored. - bool value_can_be_null = true; // TODO: Worth finding out this information? - codegen->MarkGCCard(locations->GetTemp(0).AsRegister<CpuRegister>(), - locations->GetTemp(1).AsRegister<CpuRegister>(), - base, - value, - value_can_be_null); - - if (kPoisonHeapReferences) { - __ PoisonHeapReference(expected); - __ PoisonHeapReference(value); + if (type == Primitive::kPrimNot) { + // Mark card for object assuming new value is stored. + bool value_can_be_null = true; // TODO: Worth finding out this information? + codegen->MarkGCCard(locations->GetTemp(0).AsRegister<CpuRegister>(), + locations->GetTemp(1).AsRegister<CpuRegister>(), + base, + value, + value_can_be_null); + + bool base_equals_value = (base.AsRegister() == value.AsRegister()); + Register value_reg = value.AsRegister(); + if (kPoisonHeapReferences) { + if (base_equals_value) { + // If `base` and `value` are the same register location, move + // `value_reg` to a temporary register. This way, poisoning + // `value_reg` won't invalidate `base`. + value_reg = locations->GetTemp(0).AsRegister<CpuRegister>().AsRegister(); + __ movl(CpuRegister(value_reg), base); } + + // Check that the register allocator did not assign the location + // of `expected` (RAX) to `value` nor to `base`, so that heap + // poisoning (when enabled) works as intended below. + // - If `value` were equal to `expected`, both references would + // be poisoned twice, meaning they would not be poisoned at + // all, as heap poisoning uses address negation. + // - If `base` were equal to `expected`, poisoning `expected` + // would invalidate `base`. + DCHECK_NE(value_reg, expected.AsRegister()); + DCHECK_NE(base.AsRegister(), expected.AsRegister()); + + __ PoisonHeapReference(expected); + __ PoisonHeapReference(CpuRegister(value_reg)); } - __ LockCmpxchgl(Address(base, offset, TIMES_1, 0), value); - } + __ LockCmpxchgl(Address(base, offset, TIMES_1, 0), CpuRegister(value_reg)); + + // locked cmpxchg has full barrier semantics, and we don't need + // scheduling barriers at this time. - // locked cmpxchg has full barrier semantics, and we don't need scheduling - // barriers at this time. + // Convert ZF into the boolean result. + __ setcc(kZero, out); + __ movzxb(out, out); + + if (kPoisonHeapReferences) { + if (base_equals_value) { + // `value_reg` has been moved to a temporary register, no need + // to unpoison it. + } else { + // Ensure `value` is different from `out`, so that unpoisoning + // the former does not invalidate the latter. + DCHECK_NE(value_reg, out.AsRegister()); + __ UnpoisonHeapReference(CpuRegister(value_reg)); + } + // Ensure `expected` is different from `out`, so that unpoisoning + // the former does not invalidate the latter. + DCHECK_NE(expected.AsRegister(), out.AsRegister()); + __ UnpoisonHeapReference(expected); + } + } else { + if (type == Primitive::kPrimInt) { + __ LockCmpxchgl(Address(base, offset, TIMES_1, 0), value); + } else if (type == Primitive::kPrimLong) { + __ LockCmpxchgq(Address(base, offset, TIMES_1, 0), value); + } else { + LOG(FATAL) << "Unexpected CAS type " << type; + } - // Convert ZF into the boolean result. - __ setcc(kZero, out); - __ movzxb(out, out); + // locked cmpxchg has full barrier semantics, and we don't need + // scheduling barriers at this time. - if (kPoisonHeapReferences && type == Primitive::kPrimNot) { - __ UnpoisonHeapReference(value); - __ UnpoisonHeapReference(expected); + // Convert ZF into the boolean result. + __ setcc(kZero, out); + __ movzxb(out, out); } } @@ -1993,8 +2035,7 @@ static void SwapBits(CpuRegister reg, CpuRegister temp, int32_t shift, int32_t m } void IntrinsicCodeGeneratorX86_64::VisitIntegerReverse(HInvoke* invoke) { - X86_64Assembler* assembler = - reinterpret_cast<X86_64Assembler*>(codegen_->GetAssembler()); + X86_64Assembler* assembler = down_cast<X86_64Assembler*>(codegen_->GetAssembler()); LocationSummary* locations = invoke->GetLocations(); CpuRegister reg = locations->InAt(0).AsRegister<CpuRegister>(); @@ -2038,8 +2079,7 @@ static void SwapBits64(CpuRegister reg, CpuRegister temp, CpuRegister temp_mask, } void IntrinsicCodeGeneratorX86_64::VisitLongReverse(HInvoke* invoke) { - X86_64Assembler* assembler = - reinterpret_cast<X86_64Assembler*>(codegen_->GetAssembler()); + X86_64Assembler* assembler = down_cast<X86_64Assembler*>(codegen_->GetAssembler()); LocationSummary* locations = invoke->GetLocations(); CpuRegister reg = locations->InAt(0).AsRegister<CpuRegister>(); diff --git a/compiler/optimizing/licm_test.cc b/compiler/optimizing/licm_test.cc index a036bd5aa9..47457dec7d 100644 --- a/compiler/optimizing/licm_test.cc +++ b/compiler/optimizing/licm_test.cc @@ -104,13 +104,19 @@ TEST_F(LICMTest, FieldHoisting) { // Populate the loop with instructions: set/get field with different types. NullHandle<mirror::DexCache> dex_cache; - HInstruction* get_field = new (&allocator_) HInstanceFieldGet( - parameter_, Primitive::kPrimLong, MemberOffset(10), - false, kUnknownFieldIndex, graph_->GetDexFile(), dex_cache, 0); + HInstruction* get_field = new (&allocator_) HInstanceFieldGet(parameter_, + Primitive::kPrimLong, + MemberOffset(10), + false, + kUnknownFieldIndex, + kUnknownClassDefIndex, + graph_->GetDexFile(), + dex_cache, + 0); loop_body_->InsertInstructionBefore(get_field, loop_body_->GetLastInstruction()); HInstruction* set_field = new (&allocator_) HInstanceFieldSet( parameter_, constant_, Primitive::kPrimInt, MemberOffset(20), - false, kUnknownFieldIndex, graph_->GetDexFile(), dex_cache, 0); + false, kUnknownFieldIndex, kUnknownClassDefIndex, graph_->GetDexFile(), dex_cache, 0); loop_body_->InsertInstructionBefore(set_field, loop_body_->GetLastInstruction()); EXPECT_EQ(get_field->GetBlock(), loop_body_); @@ -125,13 +131,26 @@ TEST_F(LICMTest, NoFieldHoisting) { // Populate the loop with instructions: set/get field with same types. NullHandle<mirror::DexCache> dex_cache; - HInstruction* get_field = new (&allocator_) HInstanceFieldGet( - parameter_, Primitive::kPrimLong, MemberOffset(10), - false, kUnknownFieldIndex, graph_->GetDexFile(), dex_cache, 0); + HInstruction* get_field = new (&allocator_) HInstanceFieldGet(parameter_, + Primitive::kPrimLong, + MemberOffset(10), + false, + kUnknownFieldIndex, + kUnknownClassDefIndex, + graph_->GetDexFile(), + dex_cache, + 0); loop_body_->InsertInstructionBefore(get_field, loop_body_->GetLastInstruction()); - HInstruction* set_field = new (&allocator_) HInstanceFieldSet( - parameter_, get_field, Primitive::kPrimLong, MemberOffset(10), - false, kUnknownFieldIndex, graph_->GetDexFile(), dex_cache, 0); + HInstruction* set_field = new (&allocator_) HInstanceFieldSet(parameter_, + get_field, + Primitive::kPrimLong, + MemberOffset(10), + false, + kUnknownFieldIndex, + kUnknownClassDefIndex, + graph_->GetDexFile(), + dex_cache, + 0); loop_body_->InsertInstructionBefore(set_field, loop_body_->GetLastInstruction()); EXPECT_EQ(get_field->GetBlock(), loop_body_); diff --git a/compiler/optimizing/load_store_elimination.cc b/compiler/optimizing/load_store_elimination.cc new file mode 100644 index 0000000000..90f28e511e --- /dev/null +++ b/compiler/optimizing/load_store_elimination.cc @@ -0,0 +1,913 @@ +/* + * Copyright (C) 2015 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "load_store_elimination.h" +#include "side_effects_analysis.h" + +#include <iostream> + +namespace art { + +class ReferenceInfo; + +// A cap for the number of heap locations to prevent pathological time/space consumption. +// The number of heap locations for most of the methods stays below this threshold. +constexpr size_t kMaxNumberOfHeapLocations = 32; + +// A ReferenceInfo contains additional info about a reference such as +// whether it's a singleton, returned, etc. +class ReferenceInfo : public ArenaObject<kArenaAllocMisc> { + public: + ReferenceInfo(HInstruction* reference, size_t pos) : reference_(reference), position_(pos) { + is_singleton_ = true; + is_singleton_and_not_returned_ = true; + if (!reference_->IsNewInstance() && !reference_->IsNewArray()) { + // For references not allocated in the method, don't assume anything. + is_singleton_ = false; + is_singleton_and_not_returned_ = false; + return; + } + + // Visit all uses to determine if this reference can spread into the heap, + // a method call, etc. + for (HUseIterator<HInstruction*> use_it(reference_->GetUses()); + !use_it.Done(); + use_it.Advance()) { + HInstruction* use = use_it.Current()->GetUser(); + DCHECK(!use->IsNullCheck()) << "NullCheck should have been eliminated"; + if (use->IsBoundType()) { + // BoundType shouldn't normally be necessary for a NewInstance. + // Just be conservative for the uncommon cases. + is_singleton_ = false; + is_singleton_and_not_returned_ = false; + return; + } + if (use->IsPhi() || use->IsInvoke() || + (use->IsInstanceFieldSet() && (reference_ == use->InputAt(1))) || + (use->IsUnresolvedInstanceFieldSet() && (reference_ == use->InputAt(1))) || + (use->IsStaticFieldSet() && (reference_ == use->InputAt(1))) || + (use->IsUnresolvedStaticFieldSet() && (reference_ == use->InputAt(1))) || + (use->IsArraySet() && (reference_ == use->InputAt(2)))) { + // reference_ is merged to a phi, passed to a callee, or stored to heap. + // reference_ isn't the only name that can refer to its value anymore. + is_singleton_ = false; + is_singleton_and_not_returned_ = false; + return; + } + if (use->IsReturn()) { + is_singleton_and_not_returned_ = false; + } + } + } + + HInstruction* GetReference() const { + return reference_; + } + + size_t GetPosition() const { + return position_; + } + + // Returns true if reference_ is the only name that can refer to its value during + // the lifetime of the method. So it's guaranteed to not have any alias in + // the method (including its callees). + bool IsSingleton() const { + return is_singleton_; + } + + // Returns true if reference_ is a singleton and not returned to the caller. + // The allocation and stores into reference_ may be eliminated for such cases. + bool IsSingletonAndNotReturned() const { + return is_singleton_and_not_returned_; + } + + private: + HInstruction* const reference_; + const size_t position_; // position in HeapLocationCollector's ref_info_array_. + bool is_singleton_; // can only be referred to by a single name in the method. + bool is_singleton_and_not_returned_; // reference_ is singleton and not returned to caller. + + DISALLOW_COPY_AND_ASSIGN(ReferenceInfo); +}; + +// A heap location is a reference-offset/index pair that a value can be loaded from +// or stored to. +class HeapLocation : public ArenaObject<kArenaAllocMisc> { + public: + static constexpr size_t kInvalidFieldOffset = -1; + + // TODO: more fine-grained array types. + static constexpr int16_t kDeclaringClassDefIndexForArrays = -1; + + HeapLocation(ReferenceInfo* ref_info, + size_t offset, + HInstruction* index, + int16_t declaring_class_def_index) + : ref_info_(ref_info), + offset_(offset), + index_(index), + declaring_class_def_index_(declaring_class_def_index), + may_become_unknown_(true) { + DCHECK(ref_info != nullptr); + DCHECK((offset == kInvalidFieldOffset && index != nullptr) || + (offset != kInvalidFieldOffset && index == nullptr)); + + if (ref_info->IsSingletonAndNotReturned()) { + // We try to track stores to singletons that aren't returned to eliminate the stores + // since values in singleton's fields cannot be killed due to aliasing. Those values + // can still be killed due to merging values since we don't build phi for merging heap + // values. SetMayBecomeUnknown(true) may be called later once such merge becomes possible. + may_become_unknown_ = false; + } + } + + ReferenceInfo* GetReferenceInfo() const { return ref_info_; } + size_t GetOffset() const { return offset_; } + HInstruction* GetIndex() const { return index_; } + + // Returns the definition of declaring class' dex index. + // It's kDeclaringClassDefIndexForArrays for an array element. + int16_t GetDeclaringClassDefIndex() const { + return declaring_class_def_index_; + } + + bool IsArrayElement() const { + return index_ != nullptr; + } + + // Returns true if this heap location's value may become unknown after it's + // set to a value, due to merge of values, or killed due to aliasing. + bool MayBecomeUnknown() const { + return may_become_unknown_; + } + void SetMayBecomeUnknown(bool val) { + may_become_unknown_ = val; + } + + private: + ReferenceInfo* const ref_info_; // reference for instance/static field or array access. + const size_t offset_; // offset of static/instance field. + HInstruction* const index_; // index of an array element. + const int16_t declaring_class_def_index_; // declaring class's def's dex index. + bool may_become_unknown_; // value may become kUnknownHeapValue. + + DISALLOW_COPY_AND_ASSIGN(HeapLocation); +}; + +static HInstruction* HuntForOriginalReference(HInstruction* ref) { + DCHECK(ref != nullptr); + while (ref->IsNullCheck() || ref->IsBoundType()) { + ref = ref->InputAt(0); + } + return ref; +} + +// A HeapLocationCollector collects all relevant heap locations and keeps +// an aliasing matrix for all locations. +class HeapLocationCollector : public HGraphVisitor { + public: + static constexpr size_t kHeapLocationNotFound = -1; + // Start with a single uint32_t word. That's enough bits for pair-wise + // aliasing matrix of 8 heap locations. + static constexpr uint32_t kInitialAliasingMatrixBitVectorSize = 32; + + explicit HeapLocationCollector(HGraph* graph) + : HGraphVisitor(graph), + ref_info_array_(graph->GetArena()->Adapter(kArenaAllocLSE)), + heap_locations_(graph->GetArena()->Adapter(kArenaAllocLSE)), + aliasing_matrix_(graph->GetArena(), kInitialAliasingMatrixBitVectorSize, true), + has_heap_stores_(false), + has_volatile_(false), + has_monitor_operations_(false), + may_deoptimize_(false) {} + + size_t GetNumberOfHeapLocations() const { + return heap_locations_.size(); + } + + HeapLocation* GetHeapLocation(size_t index) const { + return heap_locations_[index]; + } + + ReferenceInfo* FindReferenceInfoOf(HInstruction* ref) const { + for (size_t i = 0; i < ref_info_array_.size(); i++) { + ReferenceInfo* ref_info = ref_info_array_[i]; + if (ref_info->GetReference() == ref) { + DCHECK_EQ(i, ref_info->GetPosition()); + return ref_info; + } + } + return nullptr; + } + + bool HasHeapStores() const { + return has_heap_stores_; + } + + bool HasVolatile() const { + return has_volatile_; + } + + bool HasMonitorOps() const { + return has_monitor_operations_; + } + + // Returns whether this method may be deoptimized. + // Currently we don't have meta data support for deoptimizing + // a method that eliminates allocations/stores. + bool MayDeoptimize() const { + return may_deoptimize_; + } + + // Find and return the heap location index in heap_locations_. + size_t FindHeapLocationIndex(ReferenceInfo* ref_info, + size_t offset, + HInstruction* index, + int16_t declaring_class_def_index) const { + for (size_t i = 0; i < heap_locations_.size(); i++) { + HeapLocation* loc = heap_locations_[i]; + if (loc->GetReferenceInfo() == ref_info && + loc->GetOffset() == offset && + loc->GetIndex() == index && + loc->GetDeclaringClassDefIndex() == declaring_class_def_index) { + return i; + } + } + return kHeapLocationNotFound; + } + + // Returns true if heap_locations_[index1] and heap_locations_[index2] may alias. + bool MayAlias(size_t index1, size_t index2) const { + if (index1 < index2) { + return aliasing_matrix_.IsBitSet(AliasingMatrixPosition(index1, index2)); + } else if (index1 > index2) { + return aliasing_matrix_.IsBitSet(AliasingMatrixPosition(index2, index1)); + } else { + DCHECK(false) << "index1 and index2 are expected to be different"; + return true; + } + } + + void BuildAliasingMatrix() { + const size_t number_of_locations = heap_locations_.size(); + if (number_of_locations == 0) { + return; + } + size_t pos = 0; + // Compute aliasing info between every pair of different heap locations. + // Save the result in a matrix represented as a BitVector. + for (size_t i = 0; i < number_of_locations - 1; i++) { + for (size_t j = i + 1; j < number_of_locations; j++) { + if (ComputeMayAlias(i, j)) { + aliasing_matrix_.SetBit(CheckedAliasingMatrixPosition(i, j, pos)); + } + pos++; + } + } + } + + private: + // An allocation cannot alias with a name which already exists at the point + // of the allocation, such as a parameter or a load happening before the allocation. + bool MayAliasWithPreexistenceChecking(ReferenceInfo* ref_info1, ReferenceInfo* ref_info2) const { + if (ref_info1->GetReference()->IsNewInstance() || ref_info1->GetReference()->IsNewArray()) { + // Any reference that can alias with the allocation must appear after it in the block/in + // the block's successors. In reverse post order, those instructions will be visited after + // the allocation. + return ref_info2->GetPosition() >= ref_info1->GetPosition(); + } + return true; + } + + bool CanReferencesAlias(ReferenceInfo* ref_info1, ReferenceInfo* ref_info2) const { + if (ref_info1 == ref_info2) { + return true; + } else if (ref_info1->IsSingleton()) { + return false; + } else if (ref_info2->IsSingleton()) { + return false; + } else if (!MayAliasWithPreexistenceChecking(ref_info1, ref_info2) || + !MayAliasWithPreexistenceChecking(ref_info2, ref_info1)) { + return false; + } + return true; + } + + // `index1` and `index2` are indices in the array of collected heap locations. + // Returns the position in the bit vector that tracks whether the two heap + // locations may alias. + size_t AliasingMatrixPosition(size_t index1, size_t index2) const { + DCHECK(index2 > index1); + const size_t number_of_locations = heap_locations_.size(); + // It's (num_of_locations - 1) + ... + (num_of_locations - index1) + (index2 - index1 - 1). + return (number_of_locations * index1 - (1 + index1) * index1 / 2 + (index2 - index1 - 1)); + } + + // An additional position is passed in to make sure the calculated position is correct. + size_t CheckedAliasingMatrixPosition(size_t index1, size_t index2, size_t position) { + size_t calculated_position = AliasingMatrixPosition(index1, index2); + DCHECK_EQ(calculated_position, position); + return calculated_position; + } + + // Compute if two locations may alias to each other. + bool ComputeMayAlias(size_t index1, size_t index2) const { + HeapLocation* loc1 = heap_locations_[index1]; + HeapLocation* loc2 = heap_locations_[index2]; + if (loc1->GetOffset() != loc2->GetOffset()) { + // Either two different instance fields, or one is an instance + // field and the other is an array element. + return false; + } + if (loc1->GetDeclaringClassDefIndex() != loc2->GetDeclaringClassDefIndex()) { + // Different types. + return false; + } + if (!CanReferencesAlias(loc1->GetReferenceInfo(), loc2->GetReferenceInfo())) { + return false; + } + if (loc1->IsArrayElement() && loc2->IsArrayElement()) { + HInstruction* array_index1 = loc1->GetIndex(); + HInstruction* array_index2 = loc2->GetIndex(); + DCHECK(array_index1 != nullptr); + DCHECK(array_index2 != nullptr); + if (array_index1->IsIntConstant() && + array_index2->IsIntConstant() && + array_index1->AsIntConstant()->GetValue() != array_index2->AsIntConstant()->GetValue()) { + // Different constant indices do not alias. + return false; + } + } + return true; + } + + ReferenceInfo* GetOrCreateReferenceInfo(HInstruction* ref) { + ReferenceInfo* ref_info = FindReferenceInfoOf(ref); + if (ref_info == nullptr) { + size_t pos = ref_info_array_.size(); + ref_info = new (GetGraph()->GetArena()) ReferenceInfo(ref, pos); + ref_info_array_.push_back(ref_info); + } + return ref_info; + } + + HeapLocation* GetOrCreateHeapLocation(HInstruction* ref, + size_t offset, + HInstruction* index, + int16_t declaring_class_def_index) { + HInstruction* original_ref = HuntForOriginalReference(ref); + ReferenceInfo* ref_info = GetOrCreateReferenceInfo(original_ref); + size_t heap_location_idx = FindHeapLocationIndex( + ref_info, offset, index, declaring_class_def_index); + if (heap_location_idx == kHeapLocationNotFound) { + HeapLocation* heap_loc = new (GetGraph()->GetArena()) + HeapLocation(ref_info, offset, index, declaring_class_def_index); + heap_locations_.push_back(heap_loc); + return heap_loc; + } + return heap_locations_[heap_location_idx]; + } + + void VisitFieldAccess(HInstruction* field_access, + HInstruction* ref, + const FieldInfo& field_info, + bool is_store) { + if (field_info.IsVolatile()) { + has_volatile_ = true; + } + const uint16_t declaring_class_def_index = field_info.GetDeclaringClassDefIndex(); + const size_t offset = field_info.GetFieldOffset().SizeValue(); + HeapLocation* location = GetOrCreateHeapLocation(ref, offset, nullptr, declaring_class_def_index); + // A store of a value may be eliminated if all future loads for that value can be eliminated. + // For a value that's stored into a singleton field, the value will not be killed due + // to aliasing. However if the value is set in a block that doesn't post dominate the definition, + // the value may be killed due to merging later. Before we have post dominating info, we check + // if the store is in the same block as the definition just to be conservative. + if (is_store && + location->GetReferenceInfo()->IsSingletonAndNotReturned() && + field_access->GetBlock() != ref->GetBlock()) { + location->SetMayBecomeUnknown(true); + } + } + + void VisitArrayAccess(HInstruction* array, HInstruction* index) { + GetOrCreateHeapLocation(array, HeapLocation::kInvalidFieldOffset, + index, HeapLocation::kDeclaringClassDefIndexForArrays); + } + + void VisitInstanceFieldGet(HInstanceFieldGet* instruction) OVERRIDE { + VisitFieldAccess(instruction, instruction->InputAt(0), instruction->GetFieldInfo(), false); + } + + void VisitInstanceFieldSet(HInstanceFieldSet* instruction) OVERRIDE { + VisitFieldAccess(instruction, instruction->InputAt(0), instruction->GetFieldInfo(), true); + has_heap_stores_ = true; + } + + void VisitStaticFieldGet(HStaticFieldGet* instruction) OVERRIDE { + VisitFieldAccess(instruction, instruction->InputAt(0), instruction->GetFieldInfo(), false); + } + + void VisitStaticFieldSet(HStaticFieldSet* instruction) OVERRIDE { + VisitFieldAccess(instruction, instruction->InputAt(0), instruction->GetFieldInfo(), true); + has_heap_stores_ = true; + } + + // We intentionally don't collect HUnresolvedInstanceField/HUnresolvedStaticField accesses + // since we cannot accurately track the fields. + + void VisitArrayGet(HArrayGet* instruction) OVERRIDE { + VisitArrayAccess(instruction->InputAt(0), instruction->InputAt(1)); + } + + void VisitArraySet(HArraySet* instruction) OVERRIDE { + VisitArrayAccess(instruction->InputAt(0), instruction->InputAt(1)); + has_heap_stores_ = true; + } + + void VisitNewInstance(HNewInstance* new_instance) OVERRIDE { + // Any references appearing in the ref_info_array_ so far cannot alias with new_instance. + GetOrCreateReferenceInfo(new_instance); + } + + void VisitDeoptimize(HDeoptimize* instruction ATTRIBUTE_UNUSED) OVERRIDE { + may_deoptimize_ = true; + } + + void VisitMonitorOperation(HMonitorOperation* monitor ATTRIBUTE_UNUSED) OVERRIDE { + has_monitor_operations_ = true; + } + + ArenaVector<ReferenceInfo*> ref_info_array_; // All references used for heap accesses. + ArenaVector<HeapLocation*> heap_locations_; // All heap locations. + ArenaBitVector aliasing_matrix_; // aliasing info between each pair of locations. + bool has_heap_stores_; // If there is no heap stores, LSE acts as GVN with better + // alias analysis and won't be as effective. + bool has_volatile_; // If there are volatile field accesses. + bool has_monitor_operations_; // If there are monitor operations. + bool may_deoptimize_; + + DISALLOW_COPY_AND_ASSIGN(HeapLocationCollector); +}; + +// An unknown heap value. Loads with such a value in the heap location cannot be eliminated. +static HInstruction* const kUnknownHeapValue = + reinterpret_cast<HInstruction*>(static_cast<uintptr_t>(-1)); +// Default heap value after an allocation. +static HInstruction* const kDefaultHeapValue = + reinterpret_cast<HInstruction*>(static_cast<uintptr_t>(-2)); + +class LSEVisitor : public HGraphVisitor { + public: + LSEVisitor(HGraph* graph, + const HeapLocationCollector& heap_locations_collector, + const SideEffectsAnalysis& side_effects) + : HGraphVisitor(graph), + heap_location_collector_(heap_locations_collector), + side_effects_(side_effects), + heap_values_for_(graph->GetBlocks().size(), + ArenaVector<HInstruction*>(heap_locations_collector. + GetNumberOfHeapLocations(), + kUnknownHeapValue, + graph->GetArena()->Adapter(kArenaAllocLSE)), + graph->GetArena()->Adapter(kArenaAllocLSE)), + removed_instructions_(graph->GetArena()->Adapter(kArenaAllocLSE)), + substitute_instructions_(graph->GetArena()->Adapter(kArenaAllocLSE)), + singleton_new_instances_(graph->GetArena()->Adapter(kArenaAllocLSE)) { + } + + void VisitBasicBlock(HBasicBlock* block) OVERRIDE { + int block_id = block->GetBlockId(); + ArenaVector<HInstruction*>& heap_values = heap_values_for_[block_id]; + // TODO: try to reuse the heap_values array from one predecessor if possible. + if (block->IsLoopHeader()) { + // We do a single pass in reverse post order. For loops, use the side effects as a hint + // to see if the heap values should be killed. + if (side_effects_.GetLoopEffects(block).DoesAnyWrite()) { + // Leave all values as kUnknownHeapValue. + } else { + // Inherit the values from pre-header. + HBasicBlock* pre_header = block->GetLoopInformation()->GetPreHeader(); + ArenaVector<HInstruction*>& pre_header_heap_values = + heap_values_for_[pre_header->GetBlockId()]; + for (size_t i = 0; i < heap_values.size(); i++) { + heap_values[i] = pre_header_heap_values[i]; + } + } + } else { + MergePredecessorValues(block); + } + HGraphVisitor::VisitBasicBlock(block); + } + + // Remove recorded instructions that should be eliminated. + void RemoveInstructions() { + size_t size = removed_instructions_.size(); + DCHECK_EQ(size, substitute_instructions_.size()); + for (size_t i = 0; i < size; i++) { + HInstruction* instruction = removed_instructions_[i]; + DCHECK(instruction != nullptr); + HInstruction* substitute = substitute_instructions_[i]; + if (substitute != nullptr) { + // Keep tracing substitute till one that's not removed. + HInstruction* sub_sub = FindSubstitute(substitute); + while (sub_sub != substitute) { + substitute = sub_sub; + sub_sub = FindSubstitute(substitute); + } + instruction->ReplaceWith(substitute); + } + instruction->GetBlock()->RemoveInstruction(instruction); + } + // TODO: remove unnecessary allocations. + // Eliminate instructions in singleton_new_instances_ that: + // - don't have uses, + // - don't have finalizers, + // - are instantiable and accessible, + // - have no/separate clinit check. + } + + private: + void MergePredecessorValues(HBasicBlock* block) { + const ArenaVector<HBasicBlock*>& predecessors = block->GetPredecessors(); + if (predecessors.size() == 0) { + return; + } + ArenaVector<HInstruction*>& heap_values = heap_values_for_[block->GetBlockId()]; + for (size_t i = 0; i < heap_values.size(); i++) { + HInstruction* value = heap_values_for_[predecessors[0]->GetBlockId()][i]; + if (value != kUnknownHeapValue) { + for (size_t j = 1; j < predecessors.size(); j++) { + if (heap_values_for_[predecessors[j]->GetBlockId()][i] != value) { + value = kUnknownHeapValue; + break; + } + } + } + heap_values[i] = value; + } + } + + // `instruction` is being removed. Try to see if the null check on it + // can be removed. This can happen if the same value is set in two branches + // but not in dominators. Such as: + // int[] a = foo(); + // if () { + // a[0] = 2; + // } else { + // a[0] = 2; + // } + // // a[0] can now be replaced with constant 2, and the null check on it can be removed. + void TryRemovingNullCheck(HInstruction* instruction) { + HInstruction* prev = instruction->GetPrevious(); + if ((prev != nullptr) && prev->IsNullCheck() && (prev == instruction->InputAt(0))) { + // Previous instruction is a null check for this instruction. Remove the null check. + prev->ReplaceWith(prev->InputAt(0)); + prev->GetBlock()->RemoveInstruction(prev); + } + } + + HInstruction* GetDefaultValue(Primitive::Type type) { + switch (type) { + case Primitive::kPrimNot: + return GetGraph()->GetNullConstant(); + case Primitive::kPrimBoolean: + case Primitive::kPrimByte: + case Primitive::kPrimChar: + case Primitive::kPrimShort: + case Primitive::kPrimInt: + return GetGraph()->GetIntConstant(0); + case Primitive::kPrimLong: + return GetGraph()->GetLongConstant(0); + case Primitive::kPrimFloat: + return GetGraph()->GetFloatConstant(0); + case Primitive::kPrimDouble: + return GetGraph()->GetDoubleConstant(0); + default: + UNREACHABLE(); + } + } + + void VisitGetLocation(HInstruction* instruction, + HInstruction* ref, + size_t offset, + HInstruction* index, + int16_t declaring_class_def_index) { + HInstruction* original_ref = HuntForOriginalReference(ref); + ReferenceInfo* ref_info = heap_location_collector_.FindReferenceInfoOf(original_ref); + size_t idx = heap_location_collector_.FindHeapLocationIndex( + ref_info, offset, index, declaring_class_def_index); + DCHECK_NE(idx, HeapLocationCollector::kHeapLocationNotFound); + ArenaVector<HInstruction*>& heap_values = + heap_values_for_[instruction->GetBlock()->GetBlockId()]; + HInstruction* heap_value = heap_values[idx]; + if (heap_value == kDefaultHeapValue) { + HInstruction* constant = GetDefaultValue(instruction->GetType()); + removed_instructions_.push_back(instruction); + substitute_instructions_.push_back(constant); + heap_values[idx] = constant; + return; + } + if ((heap_value != kUnknownHeapValue) && + // Keep the load due to possible I/F, J/D array aliasing. + // See b/22538329 for details. + (heap_value->GetType() == instruction->GetType())) { + removed_instructions_.push_back(instruction); + substitute_instructions_.push_back(heap_value); + TryRemovingNullCheck(instruction); + return; + } + + if (heap_value == kUnknownHeapValue) { + // Put the load as the value into the HeapLocation. + // This acts like GVN but with better aliasing analysis. + heap_values[idx] = instruction; + } + } + + bool Equal(HInstruction* heap_value, HInstruction* value) { + if (heap_value == value) { + return true; + } + if (heap_value == kDefaultHeapValue && GetDefaultValue(value->GetType()) == value) { + return true; + } + return false; + } + + void VisitSetLocation(HInstruction* instruction, + HInstruction* ref, + size_t offset, + HInstruction* index, + int16_t declaring_class_def_index, + HInstruction* value) { + HInstruction* original_ref = HuntForOriginalReference(ref); + ReferenceInfo* ref_info = heap_location_collector_.FindReferenceInfoOf(original_ref); + size_t idx = heap_location_collector_.FindHeapLocationIndex( + ref_info, offset, index, declaring_class_def_index); + DCHECK_NE(idx, HeapLocationCollector::kHeapLocationNotFound); + ArenaVector<HInstruction*>& heap_values = + heap_values_for_[instruction->GetBlock()->GetBlockId()]; + HInstruction* heap_value = heap_values[idx]; + bool redundant_store = false; + if (Equal(heap_value, value)) { + // Store into the heap location with the same value. + redundant_store = true; + } else if (index != nullptr) { + // For array element, don't eliminate stores since it can be easily aliased + // with non-constant index. + } else if (!heap_location_collector_.MayDeoptimize() && + ref_info->IsSingletonAndNotReturned() && + !heap_location_collector_.GetHeapLocation(idx)->MayBecomeUnknown()) { + // Store into a field of a singleton that's not returned. And that value cannot be + // killed due to merge. It's redundant since future loads will get the value + // set by this instruction. + Primitive::Type type = Primitive::kPrimVoid; + if (instruction->IsInstanceFieldSet()) { + type = instruction->AsInstanceFieldSet()->GetFieldInfo().GetFieldType(); + } else if (instruction->IsStaticFieldSet()) { + type = instruction->AsStaticFieldSet()->GetFieldInfo().GetFieldType(); + } else { + DCHECK(false) << "Must be an instance/static field set instruction."; + } + if (value->GetType() != type) { + // I/F, J/D aliasing should not happen for fields. + DCHECK(Primitive::IsIntegralType(value->GetType())); + DCHECK(!Primitive::Is64BitType(value->GetType())); + DCHECK(Primitive::IsIntegralType(type)); + DCHECK(!Primitive::Is64BitType(type)); + // Keep the store since the corresponding load isn't eliminated due to different types. + // TODO: handle the different int types so that we can eliminate this store. + redundant_store = false; + } else { + redundant_store = true; + } + // TODO: eliminate the store if the singleton object is not finalizable. + redundant_store = false; + } + if (redundant_store) { + removed_instructions_.push_back(instruction); + substitute_instructions_.push_back(nullptr); + TryRemovingNullCheck(instruction); + } + + heap_values[idx] = value; + // This store may kill values in other heap locations due to aliasing. + for (size_t i = 0; i < heap_values.size(); i++) { + if (heap_values[i] == value) { + // Same value should be kept even if aliasing happens. + continue; + } + if (heap_values[i] == kUnknownHeapValue) { + // Value is already unknown, no need for aliasing check. + continue; + } + if (heap_location_collector_.MayAlias(i, idx)) { + // Kill heap locations that may alias. + heap_values[i] = kUnknownHeapValue; + } + } + } + + void VisitInstanceFieldGet(HInstanceFieldGet* instruction) OVERRIDE { + HInstruction* obj = instruction->InputAt(0); + size_t offset = instruction->GetFieldInfo().GetFieldOffset().SizeValue(); + int16_t declaring_class_def_index = instruction->GetFieldInfo().GetDeclaringClassDefIndex(); + VisitGetLocation(instruction, obj, offset, nullptr, declaring_class_def_index); + } + + void VisitInstanceFieldSet(HInstanceFieldSet* instruction) OVERRIDE { + HInstruction* obj = instruction->InputAt(0); + size_t offset = instruction->GetFieldInfo().GetFieldOffset().SizeValue(); + int16_t declaring_class_def_index = instruction->GetFieldInfo().GetDeclaringClassDefIndex(); + HInstruction* value = instruction->InputAt(1); + VisitSetLocation(instruction, obj, offset, nullptr, declaring_class_def_index, value); + } + + void VisitStaticFieldGet(HStaticFieldGet* instruction) OVERRIDE { + HInstruction* cls = instruction->InputAt(0); + size_t offset = instruction->GetFieldInfo().GetFieldOffset().SizeValue(); + int16_t declaring_class_def_index = instruction->GetFieldInfo().GetDeclaringClassDefIndex(); + VisitGetLocation(instruction, cls, offset, nullptr, declaring_class_def_index); + } + + void VisitStaticFieldSet(HStaticFieldSet* instruction) OVERRIDE { + HInstruction* cls = instruction->InputAt(0); + size_t offset = instruction->GetFieldInfo().GetFieldOffset().SizeValue(); + int16_t declaring_class_def_index = instruction->GetFieldInfo().GetDeclaringClassDefIndex(); + HInstruction* value = instruction->InputAt(1); + VisitSetLocation(instruction, cls, offset, nullptr, declaring_class_def_index, value); + } + + void VisitArrayGet(HArrayGet* instruction) OVERRIDE { + HInstruction* array = instruction->InputAt(0); + HInstruction* index = instruction->InputAt(1); + VisitGetLocation(instruction, + array, + HeapLocation::kInvalidFieldOffset, + index, + HeapLocation::kDeclaringClassDefIndexForArrays); + } + + void VisitArraySet(HArraySet* instruction) OVERRIDE { + HInstruction* array = instruction->InputAt(0); + HInstruction* index = instruction->InputAt(1); + HInstruction* value = instruction->InputAt(2); + VisitSetLocation(instruction, + array, + HeapLocation::kInvalidFieldOffset, + index, + HeapLocation::kDeclaringClassDefIndexForArrays, + value); + } + + void HandleInvoke(HInstruction* invoke) { + ArenaVector<HInstruction*>& heap_values = + heap_values_for_[invoke->GetBlock()->GetBlockId()]; + for (size_t i = 0; i < heap_values.size(); i++) { + ReferenceInfo* ref_info = heap_location_collector_.GetHeapLocation(i)->GetReferenceInfo(); + if (ref_info->IsSingleton()) { + // Singleton references cannot be seen by the callee. + } else { + heap_values[i] = kUnknownHeapValue; + } + } + } + + void VisitInvokeStaticOrDirect(HInvokeStaticOrDirect* invoke) OVERRIDE { + HandleInvoke(invoke); + } + + void VisitInvokeVirtual(HInvokeVirtual* invoke) OVERRIDE { + HandleInvoke(invoke); + } + + void VisitInvokeInterface(HInvokeInterface* invoke) OVERRIDE { + HandleInvoke(invoke); + } + + void VisitInvokeUnresolved(HInvokeUnresolved* invoke) OVERRIDE { + HandleInvoke(invoke); + } + + void VisitClinitCheck(HClinitCheck* clinit) OVERRIDE { + HandleInvoke(clinit); + } + + void VisitUnresolvedInstanceFieldGet(HUnresolvedInstanceFieldGet* instruction) OVERRIDE { + // Conservatively treat it as an invocation. + HandleInvoke(instruction); + } + + void VisitUnresolvedInstanceFieldSet(HUnresolvedInstanceFieldSet* instruction) OVERRIDE { + // Conservatively treat it as an invocation. + HandleInvoke(instruction); + } + + void VisitUnresolvedStaticFieldGet(HUnresolvedStaticFieldGet* instruction) OVERRIDE { + // Conservatively treat it as an invocation. + HandleInvoke(instruction); + } + + void VisitUnresolvedStaticFieldSet(HUnresolvedStaticFieldSet* instruction) OVERRIDE { + // Conservatively treat it as an invocation. + HandleInvoke(instruction); + } + + void VisitNewInstance(HNewInstance* new_instance) OVERRIDE { + ReferenceInfo* ref_info = heap_location_collector_.FindReferenceInfoOf(new_instance); + if (ref_info == nullptr) { + // new_instance isn't used for field accesses. No need to process it. + return; + } + if (!heap_location_collector_.MayDeoptimize() && + ref_info->IsSingletonAndNotReturned()) { + // The allocation might be eliminated. + singleton_new_instances_.push_back(new_instance); + } + ArenaVector<HInstruction*>& heap_values = + heap_values_for_[new_instance->GetBlock()->GetBlockId()]; + for (size_t i = 0; i < heap_values.size(); i++) { + HInstruction* ref = + heap_location_collector_.GetHeapLocation(i)->GetReferenceInfo()->GetReference(); + size_t offset = heap_location_collector_.GetHeapLocation(i)->GetOffset(); + if (ref == new_instance && offset >= mirror::kObjectHeaderSize) { + // Instance fields except the header fields are set to default heap values. + heap_values[i] = kDefaultHeapValue; + } + } + } + + // Find an instruction's substitute if it should be removed. + // Return the same instruction if it should not be removed. + HInstruction* FindSubstitute(HInstruction* instruction) { + size_t size = removed_instructions_.size(); + for (size_t i = 0; i < size; i++) { + if (removed_instructions_[i] == instruction) { + return substitute_instructions_[i]; + } + } + return instruction; + } + + const HeapLocationCollector& heap_location_collector_; + const SideEffectsAnalysis& side_effects_; + + // One array of heap values for each block. + ArenaVector<ArenaVector<HInstruction*>> heap_values_for_; + + // We record the instructions that should be eliminated but may be + // used by heap locations. They'll be removed in the end. + ArenaVector<HInstruction*> removed_instructions_; + ArenaVector<HInstruction*> substitute_instructions_; + ArenaVector<HInstruction*> singleton_new_instances_; + + DISALLOW_COPY_AND_ASSIGN(LSEVisitor); +}; + +void LoadStoreElimination::Run() { + if (graph_->IsDebuggable()) { + // Debugger may set heap values or trigger deoptimization of callers. + // Skip this optimization. + return; + } + HeapLocationCollector heap_location_collector(graph_); + for (HReversePostOrderIterator it(*graph_); !it.Done(); it.Advance()) { + heap_location_collector.VisitBasicBlock(it.Current()); + } + if (heap_location_collector.GetNumberOfHeapLocations() > kMaxNumberOfHeapLocations) { + // Bail out if there are too many heap locations to deal with. + return; + } + if (!heap_location_collector.HasHeapStores()) { + // Without heap stores, this pass would act mostly as GVN on heap accesses. + return; + } + if (heap_location_collector.HasVolatile() || heap_location_collector.HasMonitorOps()) { + // Don't do load/store elimination if the method has volatile field accesses or + // monitor operations, for now. + // TODO: do it right. + return; + } + heap_location_collector.BuildAliasingMatrix(); + LSEVisitor lse_visitor(graph_, heap_location_collector, side_effects_); + for (HReversePostOrderIterator it(*graph_); !it.Done(); it.Advance()) { + lse_visitor.VisitBasicBlock(it.Current()); + } + lse_visitor.RemoveInstructions(); +} + +} // namespace art diff --git a/compiler/optimizing/load_store_elimination.h b/compiler/optimizing/load_store_elimination.h new file mode 100644 index 0000000000..1d9e5c8da6 --- /dev/null +++ b/compiler/optimizing/load_store_elimination.h @@ -0,0 +1,44 @@ +/* + * Copyright (C) 2015 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ART_COMPILER_OPTIMIZING_LOAD_STORE_ELIMINATION_H_ +#define ART_COMPILER_OPTIMIZING_LOAD_STORE_ELIMINATION_H_ + +#include "optimization.h" + +namespace art { + +class SideEffectsAnalysis; + +class LoadStoreElimination : public HOptimization { + public: + LoadStoreElimination(HGraph* graph, const SideEffectsAnalysis& side_effects) + : HOptimization(graph, kLoadStoreEliminationPassName), + side_effects_(side_effects) {} + + void Run() OVERRIDE; + + static constexpr const char* kLoadStoreEliminationPassName = "load_store_elimination"; + + private: + const SideEffectsAnalysis& side_effects_; + + DISALLOW_COPY_AND_ASSIGN(LoadStoreElimination); +}; + +} // namespace art + +#endif // ART_COMPILER_OPTIMIZING_LOAD_STORE_ELIMINATION_H_ diff --git a/compiler/optimizing/nodes.cc b/compiler/optimizing/nodes.cc index ed401b67c5..348026551e 100644 --- a/compiler/optimizing/nodes.cc +++ b/compiler/optimizing/nodes.cc @@ -1591,7 +1591,6 @@ HInstruction* HGraph::InlineInto(HGraph* outer_graph, HInvoke* invoke) { // Replace the invoke with the return value of the inlined graph. if (last->IsReturn()) { return_value = last->InputAt(0); - invoke->ReplaceWith(return_value); } else { DCHECK(last->IsReturnVoid()); } @@ -1639,10 +1638,6 @@ HInstruction* HGraph::InlineInto(HGraph* outer_graph, HInvoke* invoke) { } } - if (return_value != nullptr) { - invoke->ReplaceWith(return_value); - } - // Update the meta information surrounding blocks: // (1) the graph they are now in, // (2) the reverse post order of that graph, @@ -1712,20 +1707,21 @@ HInstruction* HGraph::InlineInto(HGraph* outer_graph, HInvoke* invoke) { size_t parameter_index = 0; for (HInstructionIterator it(entry_block_->GetInstructions()); !it.Done(); it.Advance()) { HInstruction* current = it.Current(); + HInstruction* replacement = nullptr; if (current->IsNullConstant()) { - current->ReplaceWith(outer_graph->GetNullConstant(current->GetDexPc())); + replacement = outer_graph->GetNullConstant(current->GetDexPc()); } else if (current->IsIntConstant()) { - current->ReplaceWith(outer_graph->GetIntConstant( - current->AsIntConstant()->GetValue(), current->GetDexPc())); + replacement = outer_graph->GetIntConstant( + current->AsIntConstant()->GetValue(), current->GetDexPc()); } else if (current->IsLongConstant()) { - current->ReplaceWith(outer_graph->GetLongConstant( - current->AsLongConstant()->GetValue(), current->GetDexPc())); + replacement = outer_graph->GetLongConstant( + current->AsLongConstant()->GetValue(), current->GetDexPc()); } else if (current->IsFloatConstant()) { - current->ReplaceWith(outer_graph->GetFloatConstant( - current->AsFloatConstant()->GetValue(), current->GetDexPc())); + replacement = outer_graph->GetFloatConstant( + current->AsFloatConstant()->GetValue(), current->GetDexPc()); } else if (current->IsDoubleConstant()) { - current->ReplaceWith(outer_graph->GetDoubleConstant( - current->AsDoubleConstant()->GetValue(), current->GetDexPc())); + replacement = outer_graph->GetDoubleConstant( + current->AsDoubleConstant()->GetValue(), current->GetDexPc()); } else if (current->IsParameterValue()) { if (kIsDebugBuild && invoke->IsInvokeStaticOrDirect() @@ -1735,13 +1731,25 @@ HInstruction* HGraph::InlineInto(HGraph* outer_graph, HInvoke* invoke) { size_t last_input_index = invoke->InputCount() - 1; DCHECK(parameter_index != last_input_index); } - current->ReplaceWith(invoke->InputAt(parameter_index++)); + replacement = invoke->InputAt(parameter_index++); } else if (current->IsCurrentMethod()) { - current->ReplaceWith(outer_graph->GetCurrentMethod()); + replacement = outer_graph->GetCurrentMethod(); } else { DCHECK(current->IsGoto() || current->IsSuspendCheck()); entry_block_->RemoveInstruction(current); } + if (replacement != nullptr) { + current->ReplaceWith(replacement); + // If the current is the return value then we need to update the latter. + if (current == return_value) { + DCHECK_EQ(entry_block_, return_value->GetBlock()); + return_value = replacement; + } + } + } + + if (return_value != nullptr) { + invoke->ReplaceWith(return_value); } // Finally remove the invoke from the caller. @@ -1903,8 +1911,8 @@ bool HInvoke::NeedsEnvironment() const { return !opt.GetDoesNotNeedEnvironment(); } -bool HInvokeStaticOrDirect::NeedsDexCache() const { - if (IsRecursive() || IsStringInit()) { +bool HInvokeStaticOrDirect::NeedsDexCacheOfDeclaringClass() const { + if (GetMethodLoadKind() != MethodLoadKind::kDexCacheViaMethod) { return false; } if (!IsIntrinsic()) { diff --git a/compiler/optimizing/nodes.h b/compiler/optimizing/nodes.h index 0db1ba2419..6028d4b6fa 100644 --- a/compiler/optimizing/nodes.h +++ b/compiler/optimizing/nodes.h @@ -21,6 +21,7 @@ #include <array> #include <type_traits> +#include "base/arena_bit_vector.h" #include "base/arena_containers.h" #include "base/arena_object.h" #include "base/stl_util.h" @@ -34,7 +35,6 @@ #include "mirror/class.h" #include "offsets.h" #include "primitive.h" -#include "utils/arena_bit_vector.h" namespace art { @@ -75,6 +75,7 @@ static constexpr uint32_t kMaxIntShiftValue = 0x1f; static constexpr uint64_t kMaxLongShiftValue = 0x3f; static constexpr uint32_t kUnknownFieldIndex = static_cast<uint32_t>(-1); +static constexpr uint16_t kUnknownClassDefIndex = static_cast<uint16_t>(-1); static constexpr InvokeType kInvalidInvokeType = static_cast<InvokeType>(-1); @@ -1079,14 +1080,25 @@ class HLoopInformationOutwardIterator : public ValueObject { #define FOR_EACH_CONCRETE_INSTRUCTION_ARM(M) +#ifndef ART_ENABLE_CODEGEN_arm64 #define FOR_EACH_CONCRETE_INSTRUCTION_ARM64(M) +#else +#define FOR_EACH_CONCRETE_INSTRUCTION_ARM64(M) \ + M(Arm64IntermediateAddress, Instruction) +#endif + +#define FOR_EACH_CONCRETE_INSTRUCTION_MIPS(M) #define FOR_EACH_CONCRETE_INSTRUCTION_MIPS64(M) +#ifndef ART_ENABLE_CODEGEN_x86 +#define FOR_EACH_CONCRETE_INSTRUCTION_X86(M) +#else #define FOR_EACH_CONCRETE_INSTRUCTION_X86(M) \ M(X86ComputeBaseMethodAddress, Instruction) \ M(X86LoadFromConstantTable, Instruction) \ M(X86PackedSwitch, Instruction) +#endif #define FOR_EACH_CONCRETE_INSTRUCTION_X86_64(M) @@ -1094,6 +1106,7 @@ class HLoopInformationOutwardIterator : public ValueObject { FOR_EACH_CONCRETE_INSTRUCTION_COMMON(M) \ FOR_EACH_CONCRETE_INSTRUCTION_ARM(M) \ FOR_EACH_CONCRETE_INSTRUCTION_ARM64(M) \ + FOR_EACH_CONCRETE_INSTRUCTION_MIPS(M) \ FOR_EACH_CONCRETE_INSTRUCTION_MIPS64(M) \ FOR_EACH_CONCRETE_INSTRUCTION_X86(M) \ FOR_EACH_CONCRETE_INSTRUCTION_X86_64(M) @@ -1370,6 +1383,10 @@ class SideEffects : public ValueObject { return SideEffects(flags_ & ~other.flags_); } + void Add(SideEffects other) { + flags_ |= other.flags_; + } + bool Includes(SideEffects other) const { return (other.flags_ & flags_) == other.flags_; } @@ -1943,6 +1960,7 @@ class HInstruction : public ArenaObject<kArenaAllocInstruction> { } SideEffects GetSideEffects() const { return side_effects_; } + void AddSideEffects(SideEffects other) { side_effects_.Add(other); } size_t GetLifetimePosition() const { return lifetime_position_; } void SetLifetimePosition(size_t position) { lifetime_position_ = position; } @@ -1962,7 +1980,9 @@ class HInstruction : public ArenaObject<kArenaAllocInstruction> { return NeedsEnvironment() || IsLoadClass() || IsLoadString(); } - virtual bool NeedsDexCache() const { return false; } + // Returns whether the code generation of the instruction will require to have access + // to the dex cache of the current method's declaring class via the current method. + virtual bool NeedsDexCacheOfDeclaringClass() const { return false; } // Does this instruction have any use in an environment before // control flow hits 'other'? @@ -2012,7 +2032,7 @@ class HInstruction : public ArenaObject<kArenaAllocInstruction> { // order of blocks where this instruction's live interval start. size_t lifetime_position_; - const SideEffects side_effects_; + SideEffects side_effects_; // TODO: for primitive types this should be marked as invalid. ReferenceTypeInfo reference_type_info_; @@ -3350,15 +3370,15 @@ class HInvokeStaticOrDirect : public HInvoke { }; struct DispatchInfo { - const MethodLoadKind method_load_kind; - const CodePtrLocation code_ptr_location; + MethodLoadKind method_load_kind; + CodePtrLocation code_ptr_location; // The method load data holds // - thread entrypoint offset for kStringInit method if this is a string init invoke. // Note that there are multiple string init methods, each having its own offset. // - the method address for kDirectAddress // - the dex cache arrays offset for kDexCachePcRel. - const uint64_t method_load_data; - const uint64_t direct_code_ptr; + uint64_t method_load_data; + uint64_t direct_code_ptr; }; HInvokeStaticOrDirect(ArenaAllocator* arena, @@ -3387,6 +3407,10 @@ class HInvokeStaticOrDirect : public HInvoke { target_method_(target_method), dispatch_info_(dispatch_info) {} + void SetDispatchInfo(const DispatchInfo& dispatch_info) { + dispatch_info_ = dispatch_info; + } + bool CanDoImplicitNullCheckOn(HInstruction* obj ATTRIBUTE_UNUSED) const OVERRIDE { // We access the method via the dex cache so we can't do an implicit null check. // TODO: for intrinsics we can generate implicit null checks. @@ -3401,11 +3425,13 @@ class HInvokeStaticOrDirect : public HInvoke { MethodLoadKind GetMethodLoadKind() const { return dispatch_info_.method_load_kind; } CodePtrLocation GetCodePtrLocation() const { return dispatch_info_.code_ptr_location; } bool IsRecursive() const { return GetMethodLoadKind() == MethodLoadKind::kRecursive; } - bool NeedsDexCache() const OVERRIDE; + bool NeedsDexCacheOfDeclaringClass() const OVERRIDE; bool IsStringInit() const { return GetMethodLoadKind() == MethodLoadKind::kStringInit; } uint32_t GetCurrentMethodInputIndex() const { return GetNumberOfArguments(); } bool HasMethodAddress() const { return GetMethodLoadKind() == MethodLoadKind::kDirectAddress; } - bool HasPcRelDexCache() const { return GetMethodLoadKind() == MethodLoadKind::kDexCachePcRelative; } + bool HasPcRelDexCache() const { + return GetMethodLoadKind() == MethodLoadKind::kDexCachePcRelative; + } bool HasDirectCodePtr() const { return GetCodePtrLocation() == CodePtrLocation::kCallDirect; } MethodReference GetTargetMethod() const { return target_method_; } @@ -4165,7 +4191,7 @@ class HTypeConversion : public HExpression<1> { Primitive::Type GetInputType() const { return GetInput()->GetType(); } Primitive::Type GetResultType() const { return GetType(); } - // Required by the x86 and ARM code generators when producing calls + // Required by the x86, ARM, MIPS and MIPS64 code generators when producing calls // to the runtime. bool CanBeMoved() const OVERRIDE { return true; } @@ -4316,18 +4342,21 @@ class FieldInfo : public ValueObject { Primitive::Type field_type, bool is_volatile, uint32_t index, + uint16_t declaring_class_def_index, const DexFile& dex_file, Handle<mirror::DexCache> dex_cache) : field_offset_(field_offset), field_type_(field_type), is_volatile_(is_volatile), index_(index), + declaring_class_def_index_(declaring_class_def_index), dex_file_(dex_file), dex_cache_(dex_cache) {} MemberOffset GetFieldOffset() const { return field_offset_; } Primitive::Type GetFieldType() const { return field_type_; } uint32_t GetFieldIndex() const { return index_; } + uint16_t GetDeclaringClassDefIndex() const { return declaring_class_def_index_;} const DexFile& GetDexFile() const { return dex_file_; } bool IsVolatile() const { return is_volatile_; } Handle<mirror::DexCache> GetDexCache() const { return dex_cache_; } @@ -4337,6 +4366,7 @@ class FieldInfo : public ValueObject { const Primitive::Type field_type_; const bool is_volatile_; const uint32_t index_; + const uint16_t declaring_class_def_index_; const DexFile& dex_file_; const Handle<mirror::DexCache> dex_cache_; }; @@ -4348,13 +4378,20 @@ class HInstanceFieldGet : public HExpression<1> { MemberOffset field_offset, bool is_volatile, uint32_t field_idx, + uint16_t declaring_class_def_index, const DexFile& dex_file, Handle<mirror::DexCache> dex_cache, uint32_t dex_pc) - : HExpression( - field_type, - SideEffects::FieldReadOfType(field_type, is_volatile), dex_pc), - field_info_(field_offset, field_type, is_volatile, field_idx, dex_file, dex_cache) { + : HExpression(field_type, + SideEffects::FieldReadOfType(field_type, is_volatile), + dex_pc), + field_info_(field_offset, + field_type, + is_volatile, + field_idx, + declaring_class_def_index, + dex_file, + dex_cache) { SetRawInputAt(0, value); } @@ -4394,12 +4431,19 @@ class HInstanceFieldSet : public HTemplateInstruction<2> { MemberOffset field_offset, bool is_volatile, uint32_t field_idx, + uint16_t declaring_class_def_index, const DexFile& dex_file, Handle<mirror::DexCache> dex_cache, uint32_t dex_pc) - : HTemplateInstruction( - SideEffects::FieldWriteOfType(field_type, is_volatile), dex_pc), - field_info_(field_offset, field_type, is_volatile, field_idx, dex_file, dex_cache), + : HTemplateInstruction(SideEffects::FieldWriteOfType(field_type, is_volatile), + dex_pc), + field_info_(field_offset, + field_type, + is_volatile, + field_idx, + declaring_class_def_index, + dex_file, + dex_cache), value_can_be_null_(true) { SetRawInputAt(0, object); SetRawInputAt(1, value); @@ -4431,8 +4475,11 @@ class HArrayGet : public HExpression<2> { HArrayGet(HInstruction* array, HInstruction* index, Primitive::Type type, - uint32_t dex_pc) - : HExpression(type, SideEffects::ArrayReadOfType(type), dex_pc) { + uint32_t dex_pc, + SideEffects additional_side_effects = SideEffects::None()) + : HExpression(type, + SideEffects::ArrayReadOfType(type).Union(additional_side_effects), + dex_pc) { SetRawInputAt(0, array); SetRawInputAt(1, index); } @@ -4467,10 +4514,13 @@ class HArraySet : public HTemplateInstruction<3> { HInstruction* index, HInstruction* value, Primitive::Type expected_component_type, - uint32_t dex_pc) + uint32_t dex_pc, + SideEffects additional_side_effects = SideEffects::None()) : HTemplateInstruction( SideEffects::ArrayWriteOfType(expected_component_type).Union( - SideEffectsForArchRuntimeCalls(value->GetType())), dex_pc), + SideEffectsForArchRuntimeCalls(value->GetType())).Union( + additional_side_effects), + dex_pc), expected_component_type_(expected_component_type), needs_type_check_(value->GetType() == Primitive::kPrimNot), value_can_be_null_(true), @@ -4525,6 +4575,10 @@ class HArraySet : public HTemplateInstruction<3> { : expected_component_type_; } + Primitive::Type GetRawExpectedComponentType() const { + return expected_component_type_; + } + static SideEffects SideEffectsForArchRuntimeCalls(Primitive::Type value_type) { return (value_type == Primitive::kPrimNot) ? SideEffects::CanTriggerGC() : SideEffects::None(); } @@ -4583,6 +4637,7 @@ class HBoundsCheck : public HExpression<2> { bool CanThrow() const OVERRIDE { return true; } + HInstruction* GetIndex() const { return InputAt(0); } DECLARE_INSTRUCTION(BoundsCheck); @@ -4718,7 +4773,7 @@ class HLoadClass : public HExpression<1> { const DexFile& GetDexFile() { return dex_file_; } - bool NeedsDexCache() const OVERRIDE { return !is_referrers_class_; } + bool NeedsDexCacheOfDeclaringClass() const OVERRIDE { return !is_referrers_class_; } static SideEffects SideEffectsForArchRuntimeCalls() { return SideEffects::CanTriggerGC(); @@ -4760,7 +4815,7 @@ class HLoadString : public HExpression<1> { // TODO: Can we deopt or debug when we resolve a string? bool NeedsEnvironment() const OVERRIDE { return false; } - bool NeedsDexCache() const OVERRIDE { return true; } + bool NeedsDexCacheOfDeclaringClass() const OVERRIDE { return true; } bool CanBeNull() const OVERRIDE { return false; } static SideEffects SideEffectsForArchRuntimeCalls() { @@ -4814,13 +4869,20 @@ class HStaticFieldGet : public HExpression<1> { MemberOffset field_offset, bool is_volatile, uint32_t field_idx, + uint16_t declaring_class_def_index, const DexFile& dex_file, Handle<mirror::DexCache> dex_cache, uint32_t dex_pc) - : HExpression( - field_type, - SideEffects::FieldReadOfType(field_type, is_volatile), dex_pc), - field_info_(field_offset, field_type, is_volatile, field_idx, dex_file, dex_cache) { + : HExpression(field_type, + SideEffects::FieldReadOfType(field_type, is_volatile), + dex_pc), + field_info_(field_offset, + field_type, + is_volatile, + field_idx, + declaring_class_def_index, + dex_file, + dex_cache) { SetRawInputAt(0, cls); } @@ -4857,12 +4919,19 @@ class HStaticFieldSet : public HTemplateInstruction<2> { MemberOffset field_offset, bool is_volatile, uint32_t field_idx, + uint16_t declaring_class_def_index, const DexFile& dex_file, Handle<mirror::DexCache> dex_cache, uint32_t dex_pc) - : HTemplateInstruction( - SideEffects::FieldWriteOfType(field_type, is_volatile), dex_pc), - field_info_(field_offset, field_type, is_volatile, field_idx, dex_file, dex_cache), + : HTemplateInstruction(SideEffects::FieldWriteOfType(field_type, is_volatile), + dex_pc), + field_info_(field_offset, + field_type, + is_volatile, + field_idx, + declaring_class_def_index, + dex_file, + dex_cache), value_can_be_null_(true) { SetRawInputAt(0, cls); SetRawInputAt(1, value); @@ -5396,6 +5465,9 @@ class HParallelMove : public HTemplateInstruction<0> { } // namespace art +#ifdef ART_ENABLE_CODEGEN_arm64 +#include "nodes_arm64.h" +#endif #ifdef ART_ENABLE_CODEGEN_x86 #include "nodes_x86.h" #endif diff --git a/compiler/optimizing/nodes_arm64.h b/compiler/optimizing/nodes_arm64.h new file mode 100644 index 0000000000..885d3a29ee --- /dev/null +++ b/compiler/optimizing/nodes_arm64.h @@ -0,0 +1,47 @@ +/* + * Copyright (C) 2015 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ART_COMPILER_OPTIMIZING_NODES_ARM64_H_ +#define ART_COMPILER_OPTIMIZING_NODES_ARM64_H_ + +namespace art { + +// This instruction computes an intermediate address pointing in the 'middle' of an object. The +// result pointer cannot be handled by GC, so extra care is taken to make sure that this value is +// never used across anything that can trigger GC. +class HArm64IntermediateAddress : public HExpression<2> { + public: + HArm64IntermediateAddress(HInstruction* base_address, HInstruction* offset, uint32_t dex_pc) + : HExpression(Primitive::kPrimNot, SideEffects::DependsOnGC(), dex_pc) { + SetRawInputAt(0, base_address); + SetRawInputAt(1, offset); + } + + bool CanBeMoved() const OVERRIDE { return true; } + bool InstructionDataEquals(HInstruction* other ATTRIBUTE_UNUSED) const OVERRIDE { return true; } + + HInstruction* GetBaseAddress() const { return InputAt(0); } + HInstruction* GetOffset() const { return InputAt(1); } + + DECLARE_INSTRUCTION(Arm64IntermediateAddress); + + private: + DISALLOW_COPY_AND_ASSIGN(HArm64IntermediateAddress); +}; + +} // namespace art + +#endif // ART_COMPILER_OPTIMIZING_NODES_ARM64_H_ diff --git a/compiler/optimizing/optimizing_compiler.cc b/compiler/optimizing/optimizing_compiler.cc index 17a4743290..2584d3f911 100644 --- a/compiler/optimizing/optimizing_compiler.cc +++ b/compiler/optimizing/optimizing_compiler.cc @@ -58,10 +58,12 @@ #include "intrinsics.h" #include "licm.h" #include "jni/quick/jni_compiler.h" +#include "load_store_elimination.h" #include "nodes.h" #include "prepare_for_register_allocation.h" #include "reference_type_propagation.h" #include "register_allocator.h" +#include "sharpening.h" #include "side_effects_analysis.h" #include "ssa_builder.h" #include "ssa_phi_elimination.h" @@ -361,6 +363,7 @@ static bool IsInstructionSetSupported(InstructionSet instruction_set) { return (instruction_set == kArm && !kArm32QuickCodeUseSoftFloat) || instruction_set == kArm64 || (instruction_set == kThumb2 && !kArm32QuickCodeUseSoftFloat) + || instruction_set == kMips || instruction_set == kMips64 || instruction_set == kX86 || instruction_set == kX86_64; @@ -376,6 +379,7 @@ static void RunOptimizations(HOptimization* optimizations[], } static void MaybeRunInliner(HGraph* graph, + CodeGenerator* codegen, CompilerDriver* driver, OptimizingCompilerStats* stats, const DexCompilationUnit& dex_compilation_unit, @@ -390,7 +394,7 @@ static void MaybeRunInliner(HGraph* graph, ArenaAllocator* arena = graph->GetArena(); HInliner* inliner = new (arena) HInliner( - graph, dex_compilation_unit, dex_compilation_unit, driver, handles, stats); + graph, codegen, dex_compilation_unit, dex_compilation_unit, driver, handles, stats); ReferenceTypePropagation* type_propagation = new (arena) ReferenceTypePropagation(graph, handles, "reference_type_propagation_after_inlining"); @@ -443,6 +447,7 @@ static void RunArchOptimizations(InstructionSet instruction_set, } static void RunOptimizations(HGraph* graph, + CodeGenerator* codegen, CompilerDriver* driver, OptimizingCompilerStats* stats, const DexCompilationUnit& dex_compilation_unit, @@ -460,10 +465,12 @@ static void RunOptimizations(HGraph* graph, SideEffectsAnalysis* side_effects = new (arena) SideEffectsAnalysis(graph); GVNOptimization* gvn = new (arena) GVNOptimization(graph, *side_effects); LICM* licm = new (arena) LICM(graph, *side_effects); + LoadStoreElimination* lse = new (arena) LoadStoreElimination(graph, *side_effects); HInductionVarAnalysis* induction = new (arena) HInductionVarAnalysis(graph); BoundsCheckElimination* bce = new (arena) BoundsCheckElimination(graph, induction); ReferenceTypePropagation* type_propagation = new (arena) ReferenceTypePropagation(graph, handles); + HSharpening* sharpening = new (arena) HSharpening(graph, codegen, dex_compilation_unit, driver); InstructionSimplifier* simplify2 = new (arena) InstructionSimplifier( graph, stats, "instruction_simplifier_after_types"); InstructionSimplifier* simplify3 = new (arena) InstructionSimplifier( @@ -478,6 +485,7 @@ static void RunOptimizations(HGraph* graph, fold1, simplify1, type_propagation, + sharpening, dce1, simplify2 }; @@ -499,7 +507,7 @@ static void RunOptimizations(HGraph* graph, RunOptimizations(optimizations2, arraysize(optimizations2), pass_observer); } else { - MaybeRunInliner(graph, driver, stats, dex_compilation_unit, pass_observer, handles); + MaybeRunInliner(graph, codegen, driver, stats, dex_compilation_unit, pass_observer, handles); HOptimization* optimizations2[] = { // BooleanSimplifier depends on the InstructionSimplifier removing @@ -512,6 +520,7 @@ static void RunOptimizations(HGraph* graph, induction, bce, simplify3, + lse, dce2, // The codegen has a few assumptions that only the instruction simplifier // can satisfy. For example, the code generator does not expect to see a @@ -573,8 +582,13 @@ CompiledMethod* OptimizingCompiler::CompileOptimized(HGraph* graph, ScopedObjectAccess soa(Thread::Current()); StackHandleScopeCollection handles(soa.Self()); soa.Self()->TransitionFromRunnableToSuspended(kNative); - RunOptimizations(graph, compiler_driver, compilation_stats_.get(), - dex_compilation_unit, pass_observer, &handles); + RunOptimizations(graph, + codegen, + compiler_driver, + compilation_stats_.get(), + dex_compilation_unit, + pass_observer, + &handles); AllocateRegisters(graph, codegen, pass_observer); @@ -838,18 +852,26 @@ CompiledMethod* OptimizingCompiler::Compile(const DexFile::CodeItem* code_item, Handle<mirror::DexCache> dex_cache) const { CompilerDriver* compiler_driver = GetCompilerDriver(); CompiledMethod* method = nullptr; - const VerifiedMethod* verified_method = compiler_driver->GetVerifiedMethod(&dex_file, method_idx); - DCHECK(!verified_method->HasRuntimeThrow()); - if (compiler_driver->IsMethodVerifiedWithoutFailures(method_idx, class_def_idx, dex_file) - || CanHandleVerificationFailure(verified_method)) { - method = TryCompile(code_item, access_flags, invoke_type, class_def_idx, - method_idx, jclass_loader, dex_file, dex_cache); - } else { - if (compiler_driver->GetCompilerOptions().VerifyAtRuntime()) { - MaybeRecordStat(MethodCompilationStat::kNotCompiledVerifyAtRuntime); + if (Runtime::Current()->IsAotCompiler()) { + const VerifiedMethod* verified_method = compiler_driver->GetVerifiedMethod(&dex_file, method_idx); + DCHECK(!verified_method->HasRuntimeThrow()); + if (compiler_driver->IsMethodVerifiedWithoutFailures(method_idx, class_def_idx, dex_file) + || CanHandleVerificationFailure(verified_method)) { + method = TryCompile(code_item, access_flags, invoke_type, class_def_idx, + method_idx, jclass_loader, dex_file, dex_cache); } else { - MaybeRecordStat(MethodCompilationStat::kNotCompiledClassNotVerified); + if (compiler_driver->GetCompilerOptions().VerifyAtRuntime()) { + MaybeRecordStat(MethodCompilationStat::kNotCompiledVerifyAtRuntime); + } else { + MaybeRecordStat(MethodCompilationStat::kNotCompiledClassNotVerified); + } } + } else { + // This is for the JIT compiler, which has already ensured the class is verified. + // We can go straight to compiling. + DCHECK(Runtime::Current()->UseJit()); + method = TryCompile(code_item, access_flags, invoke_type, class_def_idx, + method_idx, jclass_loader, dex_file, dex_cache); } if (kIsDebugBuild && diff --git a/compiler/optimizing/register_allocator.cc b/compiler/optimizing/register_allocator.cc index 6fc77721e7..ef22c816a0 100644 --- a/compiler/optimizing/register_allocator.cc +++ b/compiler/optimizing/register_allocator.cc @@ -85,12 +85,13 @@ RegisterAllocator::RegisterAllocator(ArenaAllocator* allocator, bool RegisterAllocator::CanAllocateRegistersFor(const HGraph& graph ATTRIBUTE_UNUSED, InstructionSet instruction_set) { - return instruction_set == kArm64 - || instruction_set == kX86_64 + return instruction_set == kArm + || instruction_set == kArm64 + || instruction_set == kMips || instruction_set == kMips64 - || instruction_set == kArm + || instruction_set == kThumb2 || instruction_set == kX86 - || instruction_set == kThumb2; + || instruction_set == kX86_64; } static bool ShouldProcess(bool processing_core_registers, LiveInterval* interval) { diff --git a/compiler/optimizing/register_allocator_test.cc b/compiler/optimizing/register_allocator_test.cc index ed5419ee49..080f970756 100644 --- a/compiler/optimizing/register_allocator_test.cc +++ b/compiler/optimizing/register_allocator_test.cc @@ -488,6 +488,7 @@ static HGraph* BuildIfElseWithPhi(ArenaAllocator* allocator, MemberOffset(22), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0); @@ -514,6 +515,7 @@ static HGraph* BuildIfElseWithPhi(ArenaAllocator* allocator, MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0); @@ -522,6 +524,7 @@ static HGraph* BuildIfElseWithPhi(ArenaAllocator* allocator, MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0); @@ -638,6 +641,7 @@ static HGraph* BuildFieldReturn(ArenaAllocator* allocator, MemberOffset(42), false, kUnknownFieldIndex, + kUnknownClassDefIndex, graph->GetDexFile(), dex_cache, 0); diff --git a/compiler/optimizing/sharpening.cc b/compiler/optimizing/sharpening.cc new file mode 100644 index 0000000000..649496478a --- /dev/null +++ b/compiler/optimizing/sharpening.cc @@ -0,0 +1,134 @@ +/* + * Copyright (C) 2015 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#include "sharpening.h" + +#include "code_generator.h" +#include "utils/dex_cache_arrays_layout-inl.h" +#include "driver/compiler_driver.h" +#include "nodes.h" + +namespace art { + +void HSharpening::Run() { + // We don't care about the order of the blocks here. + for (HBasicBlock* block : graph_->GetReversePostOrder()) { + for (HInstructionIterator it(block->GetInstructions()); !it.Done(); it.Advance()) { + HInstruction* instruction = it.Current(); + if (instruction->IsInvokeStaticOrDirect()) { + ProcessInvokeStaticOrDirect(instruction->AsInvokeStaticOrDirect()); + } + // TODO: Move the sharpening of invoke-virtual/-interface/-super from HGraphBuilder + // here. Rewrite it to avoid the CompilerDriver's reliance on verifier data + // because we know the type better when inlining. + // TODO: HLoadClass, HLoadString - select PC relative dex cache array access if + // available. + } + } +} + +void HSharpening::ProcessInvokeStaticOrDirect(HInvokeStaticOrDirect* invoke) { + if (invoke->IsStringInit()) { + // Not using the dex cache arrays. But we could still try to use a better dispatch... + // TODO: Use direct_method and direct_code for the appropriate StringFactory method. + return; + } + + // TODO: Avoid CompilerDriver. + InvokeType invoke_type = invoke->GetOriginalInvokeType(); + MethodReference target_method(&graph_->GetDexFile(), invoke->GetDexMethodIndex()); + int vtable_idx; + uintptr_t direct_code, direct_method; + bool success = compiler_driver_->ComputeInvokeInfo( + &compilation_unit_, + invoke->GetDexPc(), + false /* update_stats: already updated in builder */, + true /* enable_devirtualization */, + &invoke_type, + &target_method, + &vtable_idx, + &direct_code, + &direct_method); + DCHECK(success); + DCHECK_EQ(invoke_type, invoke->GetInvokeType()); + DCHECK_EQ(target_method.dex_file, invoke->GetTargetMethod().dex_file); + DCHECK_EQ(target_method.dex_method_index, invoke->GetTargetMethod().dex_method_index); + + HInvokeStaticOrDirect::MethodLoadKind method_load_kind; + HInvokeStaticOrDirect::CodePtrLocation code_ptr_location; + uint64_t method_load_data = 0u; + uint64_t direct_code_ptr = 0u; + + HGraph* outer_graph = codegen_->GetGraph(); + if (target_method.dex_file == &outer_graph->GetDexFile() && + target_method.dex_method_index == outer_graph->GetMethodIdx()) { + method_load_kind = HInvokeStaticOrDirect::MethodLoadKind::kRecursive; + code_ptr_location = HInvokeStaticOrDirect::CodePtrLocation::kCallSelf; + } else { + if (direct_method != 0u) { // Should we use a direct pointer to the method? + if (direct_method != static_cast<uintptr_t>(-1)) { // Is the method pointer known now? + method_load_kind = HInvokeStaticOrDirect::MethodLoadKind::kDirectAddress; + method_load_data = direct_method; + } else { // The direct pointer will be known at link time. + method_load_kind = HInvokeStaticOrDirect::MethodLoadKind::kDirectAddressWithFixup; + } + } else { // Use dex cache. + DCHECK_EQ(target_method.dex_file, &graph_->GetDexFile()); + DexCacheArraysLayout layout = + compiler_driver_->GetDexCacheArraysLayout(target_method.dex_file); + if (layout.Valid()) { // Can we use PC-relative access to the dex cache arrays? + method_load_kind = HInvokeStaticOrDirect::MethodLoadKind::kDexCachePcRelative; + method_load_data = layout.MethodOffset(target_method.dex_method_index); + } else { // We must go through the ArtMethod's pointer to resolved methods. + method_load_kind = HInvokeStaticOrDirect::MethodLoadKind::kDexCacheViaMethod; + } + } + if (direct_code != 0u) { // Should we use a direct pointer to the code? + if (direct_code != static_cast<uintptr_t>(-1)) { // Is the code pointer known now? + code_ptr_location = HInvokeStaticOrDirect::CodePtrLocation::kCallDirect; + direct_code_ptr = direct_code; + } else if (compiler_driver_->IsImage() || + target_method.dex_file == &graph_->GetDexFile()) { + // Use PC-relative calls for invokes within a multi-dex oat file. + // TODO: Recognize when the target dex file is within the current oat file for + // app compilation. At the moment we recognize only the boot image as multi-dex. + code_ptr_location = HInvokeStaticOrDirect::CodePtrLocation::kCallPCRelative; + } else { // The direct pointer will be known at link time. + // NOTE: This is used for app->boot calls when compiling an app against + // a relocatable but not yet relocated image. + code_ptr_location = HInvokeStaticOrDirect::CodePtrLocation::kCallDirectWithFixup; + } + } else { // We must use the code pointer from the ArtMethod. + code_ptr_location = HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod; + } + } + + if (graph_->IsDebuggable()) { + // For debuggable apps always use the code pointer from ArtMethod + // so that we don't circumvent instrumentation stubs if installed. + code_ptr_location = HInvokeStaticOrDirect::CodePtrLocation::kCallArtMethod; + } + + HInvokeStaticOrDirect::DispatchInfo desired_dispatch_info = { + method_load_kind, code_ptr_location, method_load_data, direct_code_ptr + }; + HInvokeStaticOrDirect::DispatchInfo dispatch_info = + codegen_->GetSupportedInvokeStaticOrDirectDispatch(desired_dispatch_info, + invoke->GetTargetMethod()); + invoke->SetDispatchInfo(dispatch_info); +} + +} // namespace art diff --git a/compiler/optimizing/sharpening.h b/compiler/optimizing/sharpening.h new file mode 100644 index 0000000000..adae7007dd --- /dev/null +++ b/compiler/optimizing/sharpening.h @@ -0,0 +1,58 @@ +/* + * Copyright (C) 2015 The Android Open Source Project + * + * Licensed under the Apache License, Version 2.0 (the "License"); + * you may not use this file except in compliance with the License. + * You may obtain a copy of the License at + * + * http://www.apache.org/licenses/LICENSE-2.0 + * + * Unless required by applicable law or agreed to in writing, software + * distributed under the License is distributed on an "AS IS" BASIS, + * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. + * See the License for the specific language governing permissions and + * limitations under the License. + */ + +#ifndef ART_COMPILER_OPTIMIZING_SHARPENING_H_ +#define ART_COMPILER_OPTIMIZING_SHARPENING_H_ + +#include "optimization.h" + +namespace art { + +class CodeGenerator; +class CompilerDriver; +class DexCompilationUnit; +class HInvokeStaticOrDirect; + +// Optimization that tries to improve the way we dispatch methods and access types, +// fields, etc. Besides actual method sharpening based on receiver type (for example +// virtual->direct), this includes selecting the best available dispatch for +// invoke-static/-direct based on code generator support. +class HSharpening : public HOptimization { + public: + HSharpening(HGraph* graph, + CodeGenerator* codegen, + const DexCompilationUnit& compilation_unit, + CompilerDriver* compiler_driver) + : HOptimization(graph, kSharpeningPassName), + codegen_(codegen), + compilation_unit_(compilation_unit), + compiler_driver_(compiler_driver) { } + + void Run() OVERRIDE; + + static constexpr const char* kSharpeningPassName = "sharpening"; + + private: + void ProcessInvokeStaticOrDirect(HInvokeStaticOrDirect* invoke); + + CodeGenerator* codegen_; + const DexCompilationUnit& compilation_unit_; + CompilerDriver* compiler_driver_; +}; + +} // namespace art + +#endif // ART_COMPILER_OPTIMIZING_SHARPENING_H_ diff --git a/compiler/optimizing/stack_map_test.cc b/compiler/optimizing/stack_map_test.cc index c4a3b28aed..560502fde6 100644 --- a/compiler/optimizing/stack_map_test.cc +++ b/compiler/optimizing/stack_map_test.cc @@ -15,8 +15,9 @@ */ #include "stack_map.h" + +#include "base/arena_bit_vector.h" #include "stack_map_stream.h" -#include "utils/arena_bit_vector.h" #include "gtest/gtest.h" |