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-rw-r--r--compiler/optimizing/code_generator_x86.cc162
-rw-r--r--compiler/optimizing/code_generator_x86.h3
2 files changed, 26 insertions, 139 deletions
diff --git a/compiler/optimizing/code_generator_x86.cc b/compiler/optimizing/code_generator_x86.cc
index a6fb07fa98..48445d79da 100644
--- a/compiler/optimizing/code_generator_x86.cc
+++ b/compiler/optimizing/code_generator_x86.cc
@@ -2712,16 +2712,16 @@ void LocationsBuilderX86::HandleShift(HBinaryOperation* op) {
switch (op->GetResultType()) {
case Primitive::kPrimInt: {
- locations->SetInAt(0, Location::Any());
- // The shift count needs to be in CL or a constant.
+ locations->SetInAt(0, Location::RequiresRegister());
+ // The shift count needs to be in CL.
locations->SetInAt(1, Location::ByteRegisterOrConstant(ECX, op->InputAt(1)));
locations->SetOut(Location::SameAsFirstInput());
break;
}
case Primitive::kPrimLong: {
locations->SetInAt(0, Location::RequiresRegister());
- // The shift count needs to be in CL or a constant.
- locations->SetInAt(1, Location::ByteRegisterOrConstant(ECX, op->InputAt(1)));
+ // The shift count needs to be in CL.
+ locations->SetInAt(1, Location::RegisterLocation(ECX));
locations->SetOut(Location::SameAsFirstInput());
break;
}
@@ -2740,87 +2740,38 @@ void InstructionCodeGeneratorX86::HandleShift(HBinaryOperation* op) {
switch (op->GetResultType()) {
case Primitive::kPrimInt: {
- if (first.IsRegister()) {
- Register first_reg = first.AsRegister<Register>();
- if (second.IsRegister()) {
- Register second_reg = second.AsRegister<Register>();
- DCHECK_EQ(ECX, second_reg);
- if (op->IsShl()) {
- __ shll(first_reg, second_reg);
- } else if (op->IsShr()) {
- __ sarl(first_reg, second_reg);
- } else {
- __ shrl(first_reg, second_reg);
- }
+ Register first_reg = first.AsRegister<Register>();
+ if (second.IsRegister()) {
+ Register second_reg = second.AsRegister<Register>();
+ DCHECK_EQ(ECX, second_reg);
+ if (op->IsShl()) {
+ __ shll(first_reg, second_reg);
+ } else if (op->IsShr()) {
+ __ sarl(first_reg, second_reg);
} else {
- int32_t shift = second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftValue;
- if (shift == 0) {
- return;
- }
- Immediate imm(shift);
- if (op->IsShl()) {
- __ shll(first_reg, imm);
- } else if (op->IsShr()) {
- __ sarl(first_reg, imm);
- } else {
- __ shrl(first_reg, imm);
- }
+ __ shrl(first_reg, second_reg);
}
} else {
- DCHECK(first.IsStackSlot()) << first;
- Address addr(ESP, first.GetStackIndex());
- if (second.IsRegister()) {
- Register second_reg = second.AsRegister<Register>();
- DCHECK_EQ(ECX, second_reg);
- if (op->IsShl()) {
- __ shll(addr, second_reg);
- } else if (op->IsShr()) {
- __ sarl(addr, second_reg);
- } else {
- __ shrl(addr, second_reg);
- }
+ Immediate imm(second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftValue);
+ if (op->IsShl()) {
+ __ shll(first_reg, imm);
+ } else if (op->IsShr()) {
+ __ sarl(first_reg, imm);
} else {
- int32_t shift = second.GetConstant()->AsIntConstant()->GetValue() & kMaxIntShiftValue;
- if (shift == 0) {
- return;
- }
- Immediate imm(shift);
- if (op->IsShl()) {
- __ shll(addr, imm);
- } else if (op->IsShr()) {
- __ sarl(addr, imm);
- } else {
- __ shrl(addr, imm);
- }
+ __ shrl(first_reg, imm);
}
}
-
break;
}
case Primitive::kPrimLong: {
- if (second.IsRegister()) {
- Register second_reg = second.AsRegister<Register>();
- DCHECK_EQ(ECX, second_reg);
- if (op->IsShl()) {
- GenerateShlLong(first, second_reg);
- } else if (op->IsShr()) {
- GenerateShrLong(first, second_reg);
- } else {
- GenerateUShrLong(first, second_reg);
- }
+ Register second_reg = second.AsRegister<Register>();
+ DCHECK_EQ(ECX, second_reg);
+ if (op->IsShl()) {
+ GenerateShlLong(first, second_reg);
+ } else if (op->IsShr()) {
+ GenerateShrLong(first, second_reg);
} else {
- // Shift by a constant.
- int shift = second.GetConstant()->AsIntConstant()->GetValue() & kMaxLongShiftValue;
- // Nothing to do if the shift is 0, as the input is already the output.
- if (shift != 0) {
- if (op->IsShl()) {
- GenerateShlLong(first, shift);
- } else if (op->IsShr()) {
- GenerateShrLong(first, shift);
- } else {
- GenerateUShrLong(first, shift);
- }
- }
+ GenerateUShrLong(first, second_reg);
}
break;
}
@@ -2829,26 +2780,6 @@ void InstructionCodeGeneratorX86::HandleShift(HBinaryOperation* op) {
}
}
-void InstructionCodeGeneratorX86::GenerateShlLong(const Location& loc, int shift) {
- Register low = loc.AsRegisterPairLow<Register>();
- Register high = loc.AsRegisterPairHigh<Register>();
- if (shift == 32) {
- // Shift by 32 is easy. High gets low, and low gets 0.
- codegen_->EmitParallelMoves(
- loc.ToLow(), loc.ToHigh(),
- Location::ConstantLocation(GetGraph()->GetIntConstant(0)), loc.ToLow());
- } else if (shift > 32) {
- // Low part becomes 0. High part is low part << (shift-32).
- __ movl(high, low);
- __ shll(high, Immediate(shift - 32));
- __ xorl(low, low);
- } else {
- // Between 1 and 31.
- __ shld(high, low, Immediate(shift));
- __ shll(low, Immediate(shift));
- }
-}
-
void InstructionCodeGeneratorX86::GenerateShlLong(const Location& loc, Register shifter) {
Label done;
__ shld(loc.AsRegisterPairHigh<Register>(), loc.AsRegisterPairLow<Register>(), shifter);
@@ -2860,27 +2791,6 @@ void InstructionCodeGeneratorX86::GenerateShlLong(const Location& loc, Register
__ Bind(&done);
}
-void InstructionCodeGeneratorX86::GenerateShrLong(const Location& loc, int shift) {
- Register low = loc.AsRegisterPairLow<Register>();
- Register high = loc.AsRegisterPairHigh<Register>();
- if (shift == 32) {
- // Need to copy the sign.
- DCHECK_NE(low, high);
- __ movl(low, high);
- __ sarl(high, Immediate(31));
- } else if (shift > 32) {
- DCHECK_NE(low, high);
- // High part becomes sign. Low part is shifted by shift - 32.
- __ movl(low, high);
- __ sarl(high, Immediate(31));
- __ shrl(low, Immediate(shift - 32));
- } else {
- // Between 1 and 31.
- __ shrd(low, high, Immediate(shift));
- __ sarl(high, Immediate(shift));
- }
-}
-
void InstructionCodeGeneratorX86::GenerateShrLong(const Location& loc, Register shifter) {
Label done;
__ shrd(loc.AsRegisterPairLow<Register>(), loc.AsRegisterPairHigh<Register>(), shifter);
@@ -2892,26 +2802,6 @@ void InstructionCodeGeneratorX86::GenerateShrLong(const Location& loc, Register
__ Bind(&done);
}
-void InstructionCodeGeneratorX86::GenerateUShrLong(const Location& loc, int shift) {
- Register low = loc.AsRegisterPairLow<Register>();
- Register high = loc.AsRegisterPairHigh<Register>();
- if (shift == 32) {
- // Shift by 32 is easy. Low gets high, and high gets 0.
- codegen_->EmitParallelMoves(
- loc.ToHigh(), loc.ToLow(),
- Location::ConstantLocation(GetGraph()->GetIntConstant(0)), loc.ToHigh());
- } else if (shift > 32) {
- // Low part is high >> (shift - 32). High part becomes 0.
- __ movl(low, high);
- __ shrl(low, Immediate(shift - 32));
- __ xorl(high, high);
- } else {
- // Between 1 and 31.
- __ shrd(low, high, Immediate(shift));
- __ shrl(high, Immediate(shift));
- }
-}
-
void InstructionCodeGeneratorX86::GenerateUShrLong(const Location& loc, Register shifter) {
Label done;
__ shrd(loc.AsRegisterPairLow<Register>(), loc.AsRegisterPairHigh<Register>(), shifter);
diff --git a/compiler/optimizing/code_generator_x86.h b/compiler/optimizing/code_generator_x86.h
index 8c56e35329..00a4323a54 100644
--- a/compiler/optimizing/code_generator_x86.h
+++ b/compiler/optimizing/code_generator_x86.h
@@ -172,9 +172,6 @@ class InstructionCodeGeneratorX86 : public HGraphVisitor {
void GenerateShlLong(const Location& loc, Register shifter);
void GenerateShrLong(const Location& loc, Register shifter);
void GenerateUShrLong(const Location& loc, Register shifter);
- void GenerateShlLong(const Location& loc, int shift);
- void GenerateShrLong(const Location& loc, int shift);
- void GenerateUShrLong(const Location& loc, int shift);
void GenerateMemoryBarrier(MemBarrierKind kind);
void HandleFieldSet(HInstruction* instruction, const FieldInfo& field_info);
void HandleFieldGet(HInstruction* instruction, const FieldInfo& field_info);
generated by cgit v1.2.3-59-g8ed1b (git 2.39.0) at 2026-01-10 17:51:29 +0000