diff options
Diffstat (limited to 'compiler/optimizing/scheduler_arm.h')
| -rw-r--r-- | compiler/optimizing/scheduler_arm.h | 7 |
1 files changed, 2 insertions, 5 deletions
diff --git a/compiler/optimizing/scheduler_arm.h b/compiler/optimizing/scheduler_arm.h index d11222d9f4..6aeea6dde1 100644 --- a/compiler/optimizing/scheduler_arm.h +++ b/compiler/optimizing/scheduler_arm.h @@ -22,9 +22,6 @@ namespace art { namespace arm { -// TODO: Replace CodeGeneratorARMType with CodeGeneratorARMVIXL everywhere? -typedef CodeGeneratorARMVIXL CodeGeneratorARMType; - // AArch32 instruction latencies. // We currently assume that all ARM CPUs share the same instruction latency list. // The following latencies were tuned based on performance experiments and @@ -52,7 +49,7 @@ static constexpr uint32_t kArmRuntimeTypeCheckLatency = 46; class SchedulingLatencyVisitorARM : public SchedulingLatencyVisitor { public: explicit SchedulingLatencyVisitorARM(CodeGenerator* codegen) - : codegen_(down_cast<CodeGeneratorARMType*>(codegen)) {} + : codegen_(down_cast<CodeGeneratorARMVIXL*>(codegen)) {} // Default visitor for instructions not handled specifically below. void VisitInstruction(HInstruction* ATTRIBUTE_UNUSED) override { @@ -133,7 +130,7 @@ class SchedulingLatencyVisitorARM : public SchedulingLatencyVisitor { // The latency setting for each HInstruction depends on how CodeGenerator may generate code, // latency visitors may query CodeGenerator for such information for accurate latency settings. - CodeGeneratorARMType* codegen_; + CodeGeneratorARMVIXL* codegen_; }; class HSchedulerARM : public HScheduler { |