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-rw-r--r--compiler/optimizing/codegen_test.cc9
1 files changed, 3 insertions, 6 deletions
diff --git a/compiler/optimizing/codegen_test.cc b/compiler/optimizing/codegen_test.cc
index 2d9acc49b3..f890ba9cc0 100644
--- a/compiler/optimizing/codegen_test.cc
+++ b/compiler/optimizing/codegen_test.cc
@@ -733,8 +733,7 @@ TEST_F(CodegenTest, ARMVIXLParallelMoveResolver) {
move->AddMove(Location::StackSlot(8192), Location::StackSlot(0), DataType::Type::kInt32, nullptr);
codegen.GetMoveResolver()->EmitNativeCode(move);
- InternalCodeAllocator code_allocator;
- codegen.Finalize(&code_allocator);
+ codegen.Finalize();
}
#endif
@@ -785,8 +784,7 @@ TEST_F(CodegenTest, ARM64ParallelMoveResolverB34760542) {
nullptr);
codegen.GetMoveResolver()->EmitNativeCode(move);
- InternalCodeAllocator code_allocator;
- codegen.Finalize(&code_allocator);
+ codegen.Finalize();
}
// Check that ParallelMoveResolver works fine for ARM64 for both cases when SIMD is on and off.
@@ -821,8 +819,7 @@ TEST_F(CodegenTest, ARM64ParallelMoveResolverSIMD) {
graph->SetHasSIMD(false);
}
- InternalCodeAllocator code_allocator;
- codegen.Finalize(&code_allocator);
+ codegen.Finalize();
}
// Check that ART ISA Features are propagated to VIXL for arm64 (using cortex-a75 as example).