diff options
25 files changed, 67 insertions, 119 deletions
diff --git a/runtime/asm_support.h b/runtime/asm_support.h index e18f11080f..3cf2b93690 100644 --- a/runtime/asm_support.h +++ b/runtime/asm_support.h @@ -110,9 +110,9 @@ ADD_TEST_EQ(SHADOWFRAME_RESULT_REGISTER_OFFSET, #define SHADOWFRAME_DEX_PC_PTR_OFFSET (SHADOWFRAME_LINK_OFFSET + 3 * __SIZEOF_POINTER__) ADD_TEST_EQ(SHADOWFRAME_DEX_PC_PTR_OFFSET, static_cast<int32_t>(art::ShadowFrame::DexPCPtrOffset())) -#define SHADOWFRAME_CODE_ITEM_OFFSET (SHADOWFRAME_LINK_OFFSET + 4 * __SIZEOF_POINTER__) -ADD_TEST_EQ(SHADOWFRAME_CODE_ITEM_OFFSET, - static_cast<int32_t>(art::ShadowFrame::CodeItemOffset())) +#define SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET (SHADOWFRAME_LINK_OFFSET + 4 * __SIZEOF_POINTER__) +ADD_TEST_EQ(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET, + static_cast<int32_t>(art::ShadowFrame::DexInstructionsOffset())) #define SHADOWFRAME_LOCK_COUNT_DATA_OFFSET (SHADOWFRAME_LINK_OFFSET + 5 * __SIZEOF_POINTER__) ADD_TEST_EQ(SHADOWFRAME_LOCK_COUNT_DATA_OFFSET, static_cast<int32_t>(art::ShadowFrame::LockCountDataOffset())) diff --git a/runtime/generated/asm_support_gen.h b/runtime/generated/asm_support_gen.h index 74265bbf0b..e1582120dc 100644 --- a/runtime/generated/asm_support_gen.h +++ b/runtime/generated/asm_support_gen.h @@ -46,8 +46,6 @@ DEFINE_CHECK_EQ(static_cast<int32_t>(THREAD_ID_OFFSET), (static_cast<int32_t>(ar DEFINE_CHECK_EQ(static_cast<int32_t>(THREAD_IS_GC_MARKING_OFFSET), (static_cast<int32_t>(art::Thread::IsGcMarkingOffset<art::kRuntimePointerSize>().Int32Value()))) #define THREAD_CARD_TABLE_OFFSET 136 DEFINE_CHECK_EQ(static_cast<int32_t>(THREAD_CARD_TABLE_OFFSET), (static_cast<int32_t>(art::Thread::CardTableOffset<art::kRuntimePointerSize>().Int32Value()))) -#define CODEITEM_INSNS_OFFSET 16 -DEFINE_CHECK_EQ(static_cast<int32_t>(CODEITEM_INSNS_OFFSET), (static_cast<int32_t>(__builtin_offsetof(art::DexFile::CodeItem, insns_)))) #define MIRROR_CLASS_DEX_CACHE_OFFSET 16 DEFINE_CHECK_EQ(static_cast<int32_t>(MIRROR_CLASS_DEX_CACHE_OFFSET), (static_cast<int32_t>(art::mirror::Class::DexCacheOffset().Int32Value()))) #define MIRROR_DEX_CACHE_RESOLVED_METHODS_OFFSET 48 diff --git a/runtime/interpreter/interpreter.cc b/runtime/interpreter/interpreter.cc index 038405eebc..01b7d4e457 100644 --- a/runtime/interpreter/interpreter.cc +++ b/runtime/interpreter/interpreter.cc @@ -314,7 +314,10 @@ static inline JValue Execute( return ExecuteSwitchImpl<false, false>(self, code_item, shadow_frame, result_register, false); } - bool returned = ExecuteMterpImpl(self, code_item, &shadow_frame, &result_register); + bool returned = ExecuteMterpImpl(self, + code_item->insns_, + &shadow_frame, + &result_register); if (returned) { return result_register; } else { diff --git a/runtime/interpreter/interpreter_mterp_impl.h b/runtime/interpreter/interpreter_mterp_impl.h index 1be20fab25..7aa5a34bd4 100644 --- a/runtime/interpreter/interpreter_mterp_impl.h +++ b/runtime/interpreter/interpreter_mterp_impl.h @@ -32,7 +32,7 @@ namespace interpreter { // Mterp does not support transactions or access check, thus no templated versions. extern "C" bool ExecuteMterpImpl(Thread* self, - const DexFile::CodeItem* code_item, + const uint16_t* dex_instructions, ShadowFrame* shadow_frame, JValue* result_register) REQUIRES_SHARED(Locks::mutator_lock_); diff --git a/runtime/interpreter/mterp/arm/entry.S b/runtime/interpreter/mterp/arm/entry.S index 5781414f27..de617a90d7 100644 --- a/runtime/interpreter/mterp/arm/entry.S +++ b/runtime/interpreter/mterp/arm/entry.S @@ -46,8 +46,8 @@ ENTRY ExecuteMterpImpl /* Remember the return register */ str r3, [r2, #SHADOWFRAME_RESULT_REGISTER_OFFSET] - /* Remember the code_item */ - str r1, [r2, #SHADOWFRAME_CODE_ITEM_OFFSET] + /* Remember the dex instruction pointer */ + str r1, [r2, #SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET] /* set up "named" registers */ mov rSELF, r0 @@ -55,8 +55,7 @@ ENTRY ExecuteMterpImpl add rFP, r2, #SHADOWFRAME_VREGS_OFFSET @ point to vregs. VREG_INDEX_TO_ADDR rREFS, r0 @ point to reference array in shadow frame ldr r0, [r2, #SHADOWFRAME_DEX_PC_OFFSET] @ Get starting dex_pc. - add rPC, r1, #CODEITEM_INSNS_OFFSET @ Point to base of insns[] - add rPC, rPC, r0, lsl #1 @ Create direct pointer to 1st dex opcode + add rPC, r1, r0, lsl #1 @ Create direct pointer to 1st dex opcode EXPORT_PC /* Starting ibase */ diff --git a/runtime/interpreter/mterp/arm/footer.S b/runtime/interpreter/mterp/arm/footer.S index c6801e5dda..f3a3ad25fc 100644 --- a/runtime/interpreter/mterp/arm/footer.S +++ b/runtime/interpreter/mterp/arm/footer.S @@ -97,11 +97,10 @@ MterpException: bl MterpHandleException @ (self, shadow_frame) cmp r0, #0 beq MterpExceptionReturn @ no local catch, back to caller. - ldr r0, [rFP, #OFF_FP_CODE_ITEM] + ldr r0, [rFP, #OFF_FP_DEX_INSTRUCTIONS] ldr r1, [rFP, #OFF_FP_DEX_PC] ldr rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] - add rPC, r0, #CODEITEM_INSNS_OFFSET - add rPC, rPC, r1, lsl #1 @ generate new dex_pc_ptr + add rPC, r0, r1, lsl #1 @ generate new dex_pc_ptr /* Do we need to switch interpreters? */ bl MterpShouldSwitchInterpreters cmp r0, #0 diff --git a/runtime/interpreter/mterp/arm/header.S b/runtime/interpreter/mterp/arm/header.S index 597d9d46a5..51c2ba4c03 100644 --- a/runtime/interpreter/mterp/arm/header.S +++ b/runtime/interpreter/mterp/arm/header.S @@ -110,7 +110,7 @@ unspecified registers or condition codes. #define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET) #define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET) #define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET) -#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET) +#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET) #define OFF_FP_SHADOWFRAME OFF_FP(0) /* @@ -130,9 +130,8 @@ unspecified registers or condition codes. .endm .macro EXPORT_DEX_PC tmp - ldr \tmp, [rFP, #OFF_FP_CODE_ITEM] + ldr \tmp, [rFP, #OFF_FP_DEX_INSTRUCTIONS] str rPC, [rFP, #OFF_FP_DEX_PC_PTR] - add \tmp, #CODEITEM_INSNS_OFFSET sub \tmp, rPC, \tmp asr \tmp, #1 str \tmp, [rFP, #OFF_FP_DEX_PC] diff --git a/runtime/interpreter/mterp/arm64/entry.S b/runtime/interpreter/mterp/arm64/entry.S index 7306e4e0f1..f3d40ff6f7 100644 --- a/runtime/interpreter/mterp/arm64/entry.S +++ b/runtime/interpreter/mterp/arm64/entry.S @@ -36,8 +36,8 @@ ENTRY ExecuteMterpImpl /* Remember the return register */ str x3, [x2, #SHADOWFRAME_RESULT_REGISTER_OFFSET] - /* Remember the code_item */ - str x1, [x2, #SHADOWFRAME_CODE_ITEM_OFFSET] + /* Remember the dex instruction pointer */ + str x1, [x2, #SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET] /* set up "named" registers */ mov xSELF, x0 @@ -45,8 +45,7 @@ ENTRY ExecuteMterpImpl add xFP, x2, #SHADOWFRAME_VREGS_OFFSET // point to vregs. add xREFS, xFP, w0, lsl #2 // point to reference array in shadow frame ldr w0, [x2, #SHADOWFRAME_DEX_PC_OFFSET] // Get starting dex_pc. - add xPC, x1, #CODEITEM_INSNS_OFFSET // Point to base of insns[] - add xPC, xPC, w0, lsl #1 // Create direct pointer to 1st dex opcode + add xPC, x1, w0, lsl #1 // Create direct pointer to 1st dex opcode EXPORT_PC /* Starting ibase */ diff --git a/runtime/interpreter/mterp/arm64/footer.S b/runtime/interpreter/mterp/arm64/footer.S index fafa606a10..0ce3543911 100644 --- a/runtime/interpreter/mterp/arm64/footer.S +++ b/runtime/interpreter/mterp/arm64/footer.S @@ -93,11 +93,10 @@ MterpException: add x1, xFP, #OFF_FP_SHADOWFRAME bl MterpHandleException // (self, shadow_frame) cbz w0, MterpExceptionReturn // no local catch, back to caller. - ldr x0, [xFP, #OFF_FP_CODE_ITEM] + ldr x0, [xFP, #OFF_FP_DEX_INSTRUCTIONS] ldr w1, [xFP, #OFF_FP_DEX_PC] ldr xIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] - add xPC, x0, #CODEITEM_INSNS_OFFSET - add xPC, xPC, x1, lsl #1 // generate new dex_pc_ptr + add xPC, x0, x1, lsl #1 // generate new dex_pc_ptr /* Do we need to switch interpreters? */ bl MterpShouldSwitchInterpreters cbnz w0, MterpFallback diff --git a/runtime/interpreter/mterp/arm64/header.S b/runtime/interpreter/mterp/arm64/header.S index cedfa49133..47f12d2f5d 100644 --- a/runtime/interpreter/mterp/arm64/header.S +++ b/runtime/interpreter/mterp/arm64/header.S @@ -116,7 +116,7 @@ codes. #define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET) #define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET) #define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET) -#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET) +#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET) #define OFF_FP_SHADOWFRAME OFF_FP(0) /* diff --git a/runtime/interpreter/mterp/mterp.cc b/runtime/interpreter/mterp/mterp.cc index 404c2609e8..92dd19ed2f 100644 --- a/runtime/interpreter/mterp/mterp.cc +++ b/runtime/interpreter/mterp/mterp.cc @@ -577,7 +577,7 @@ extern "C" void MterpCheckBefore(Thread* self, ShadowFrame* shadow_frame, uint16 self->AssertNoPendingException(); } if (kTraceExecutionEnabled) { - uint32_t dex_pc = dex_pc_ptr - shadow_frame->GetCodeItem()->insns_; + uint32_t dex_pc = dex_pc_ptr - shadow_frame->GetDexInstructions(); TraceExecution(*shadow_frame, inst, dex_pc); } if (kTestExportPC) { diff --git a/runtime/interpreter/mterp/mterp_stub.cc b/runtime/interpreter/mterp/mterp_stub.cc index 35f8f1c7e7..e515ec4471 100644 --- a/runtime/interpreter/mterp/mterp_stub.cc +++ b/runtime/interpreter/mterp/mterp_stub.cc @@ -38,8 +38,10 @@ void InitMterpTls(Thread* self) { /* * The platform-specific implementation must provide this. */ -extern "C" bool ExecuteMterpImpl(Thread* self, const DexFile::CodeItem* code_item, - ShadowFrame* shadow_frame, JValue* result_register) +extern "C" bool ExecuteMterpImpl(Thread* self, + const uint16_t* dex_instructions, + ShadowFrame* shadow_frame, + JValue* result_register) REQUIRES_SHARED(Locks::mutator_lock_) { UNUSED(self); UNUSED(shadow_frame); UNUSED(code_item); UNUSED(result_register); UNIMPLEMENTED(art::FATAL); diff --git a/runtime/interpreter/mterp/out/mterp_arm.S b/runtime/interpreter/mterp/out/mterp_arm.S index 8ca5bd457b..20b1975154 100644 --- a/runtime/interpreter/mterp/out/mterp_arm.S +++ b/runtime/interpreter/mterp/out/mterp_arm.S @@ -117,7 +117,7 @@ unspecified registers or condition codes. #define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET) #define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET) #define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET) -#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET) +#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET) #define OFF_FP_SHADOWFRAME OFF_FP(0) /* @@ -137,9 +137,8 @@ unspecified registers or condition codes. .endm .macro EXPORT_DEX_PC tmp - ldr \tmp, [rFP, #OFF_FP_CODE_ITEM] + ldr \tmp, [rFP, #OFF_FP_DEX_INSTRUCTIONS] str rPC, [rFP, #OFF_FP_DEX_PC_PTR] - add \tmp, #CODEITEM_INSNS_OFFSET sub \tmp, rPC, \tmp asr \tmp, #1 str \tmp, [rFP, #OFF_FP_DEX_PC] @@ -365,8 +364,8 @@ ENTRY ExecuteMterpImpl /* Remember the return register */ str r3, [r2, #SHADOWFRAME_RESULT_REGISTER_OFFSET] - /* Remember the code_item */ - str r1, [r2, #SHADOWFRAME_CODE_ITEM_OFFSET] + /* Remember the dex instruction pointer */ + str r1, [r2, #SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET] /* set up "named" registers */ mov rSELF, r0 @@ -374,8 +373,7 @@ ENTRY ExecuteMterpImpl add rFP, r2, #SHADOWFRAME_VREGS_OFFSET @ point to vregs. VREG_INDEX_TO_ADDR rREFS, r0 @ point to reference array in shadow frame ldr r0, [r2, #SHADOWFRAME_DEX_PC_OFFSET] @ Get starting dex_pc. - add rPC, r1, #CODEITEM_INSNS_OFFSET @ Point to base of insns[] - add rPC, rPC, r0, lsl #1 @ Create direct pointer to 1st dex opcode + add rPC, r1, r0, lsl #1 @ Create direct pointer to 1st dex opcode EXPORT_PC /* Starting ibase */ @@ -12044,11 +12042,10 @@ MterpException: bl MterpHandleException @ (self, shadow_frame) cmp r0, #0 beq MterpExceptionReturn @ no local catch, back to caller. - ldr r0, [rFP, #OFF_FP_CODE_ITEM] + ldr r0, [rFP, #OFF_FP_DEX_INSTRUCTIONS] ldr r1, [rFP, #OFF_FP_DEX_PC] ldr rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] - add rPC, r0, #CODEITEM_INSNS_OFFSET - add rPC, rPC, r1, lsl #1 @ generate new dex_pc_ptr + add rPC, r0, r1, lsl #1 @ generate new dex_pc_ptr /* Do we need to switch interpreters? */ bl MterpShouldSwitchInterpreters cmp r0, #0 diff --git a/runtime/interpreter/mterp/out/mterp_arm64.S b/runtime/interpreter/mterp/out/mterp_arm64.S index d4423ab0c4..82edab465e 100644 --- a/runtime/interpreter/mterp/out/mterp_arm64.S +++ b/runtime/interpreter/mterp/out/mterp_arm64.S @@ -123,7 +123,7 @@ codes. #define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET) #define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET) #define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET) -#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET) +#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET) #define OFF_FP_SHADOWFRAME OFF_FP(0) /* @@ -394,8 +394,8 @@ ENTRY ExecuteMterpImpl /* Remember the return register */ str x3, [x2, #SHADOWFRAME_RESULT_REGISTER_OFFSET] - /* Remember the code_item */ - str x1, [x2, #SHADOWFRAME_CODE_ITEM_OFFSET] + /* Remember the dex instruction pointer */ + str x1, [x2, #SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET] /* set up "named" registers */ mov xSELF, x0 @@ -403,8 +403,7 @@ ENTRY ExecuteMterpImpl add xFP, x2, #SHADOWFRAME_VREGS_OFFSET // point to vregs. add xREFS, xFP, w0, lsl #2 // point to reference array in shadow frame ldr w0, [x2, #SHADOWFRAME_DEX_PC_OFFSET] // Get starting dex_pc. - add xPC, x1, #CODEITEM_INSNS_OFFSET // Point to base of insns[] - add xPC, xPC, w0, lsl #1 // Create direct pointer to 1st dex opcode + add xPC, x1, w0, lsl #1 // Create direct pointer to 1st dex opcode EXPORT_PC /* Starting ibase */ @@ -7182,11 +7181,10 @@ MterpException: add x1, xFP, #OFF_FP_SHADOWFRAME bl MterpHandleException // (self, shadow_frame) cbz w0, MterpExceptionReturn // no local catch, back to caller. - ldr x0, [xFP, #OFF_FP_CODE_ITEM] + ldr x0, [xFP, #OFF_FP_DEX_INSTRUCTIONS] ldr w1, [xFP, #OFF_FP_DEX_PC] ldr xIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] - add xPC, x0, #CODEITEM_INSNS_OFFSET - add xPC, xPC, x1, lsl #1 // generate new dex_pc_ptr + add xPC, x0, x1, lsl #1 // generate new dex_pc_ptr /* Do we need to switch interpreters? */ bl MterpShouldSwitchInterpreters cbnz w0, MterpFallback diff --git a/runtime/interpreter/mterp/out/mterp_x86.S b/runtime/interpreter/mterp/out/mterp_x86.S index 514ecacb05..cbab61ebf6 100644 --- a/runtime/interpreter/mterp/out/mterp_x86.S +++ b/runtime/interpreter/mterp/out/mterp_x86.S @@ -135,7 +135,7 @@ unspecified registers or condition codes. #define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET) #define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET) #define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET) -#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET) +#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET) #define OFF_FP_COUNTDOWN_OFFSET OFF_FP(SHADOWFRAME_HOTNESS_COUNTDOWN_OFFSET) #define OFF_FP_SHADOWFRAME OFF_FP(0) @@ -371,15 +371,14 @@ SYMBOL(ExecuteMterpImpl): /* Remember the code_item */ movl IN_ARG1(%esp), %ecx - movl %ecx, SHADOWFRAME_CODE_ITEM_OFFSET(%edx) + movl %ecx, SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET(%edx) /* set up "named" registers */ movl SHADOWFRAME_NUMBER_OF_VREGS_OFFSET(%edx), %eax leal SHADOWFRAME_VREGS_OFFSET(%edx), rFP leal (rFP, %eax, 4), rREFS movl SHADOWFRAME_DEX_PC_OFFSET(%edx), %eax - lea CODEITEM_INSNS_OFFSET(%ecx), rPC - lea (rPC, %eax, 2), rPC + lea (%ecx, %eax, 2), rPC EXPORT_PC /* Set up for backwards branches & osr profiling */ @@ -12749,10 +12748,9 @@ MterpException: call SYMBOL(MterpHandleException) testb %al, %al jz MterpExceptionReturn - movl OFF_FP_CODE_ITEM(rFP), %eax + movl OFF_FP_DEX_INSTRUCTIONS(rFP), %eax movl OFF_FP_DEX_PC(rFP), %ecx - lea CODEITEM_INSNS_OFFSET(%eax), rPC - lea (rPC, %ecx, 2), rPC + lea (%eax, %ecx, 2), rPC movl rPC, OFF_FP_DEX_PC_PTR(rFP) /* Do we need to switch interpreters? */ call SYMBOL(MterpShouldSwitchInterpreters) diff --git a/runtime/interpreter/mterp/out/mterp_x86_64.S b/runtime/interpreter/mterp/out/mterp_x86_64.S index cfee2b8f84..83c3e4fb91 100644 --- a/runtime/interpreter/mterp/out/mterp_x86_64.S +++ b/runtime/interpreter/mterp/out/mterp_x86_64.S @@ -131,7 +131,7 @@ unspecified registers or condition codes. #define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET) #define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET) #define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET) -#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET) +#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET) #define OFF_FP_COUNTDOWN_OFFSET OFF_FP(SHADOWFRAME_HOTNESS_COUNTDOWN_OFFSET) #define OFF_FP_SHADOWFRAME (-SHADOWFRAME_VREGS_OFFSET) @@ -354,15 +354,14 @@ SYMBOL(ExecuteMterpImpl): movq IN_ARG3, SHADOWFRAME_RESULT_REGISTER_OFFSET(IN_ARG2) /* Remember the code_item */ - movq IN_ARG1, SHADOWFRAME_CODE_ITEM_OFFSET(IN_ARG2) + movq IN_ARG1, SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET(IN_ARG2) /* set up "named" registers */ movl SHADOWFRAME_NUMBER_OF_VREGS_OFFSET(IN_ARG2), %eax leaq SHADOWFRAME_VREGS_OFFSET(IN_ARG2), rFP leaq (rFP, %rax, 4), rREFS movl SHADOWFRAME_DEX_PC_OFFSET(IN_ARG2), %eax - leaq CODEITEM_INSNS_OFFSET(IN_ARG1), rPC - leaq (rPC, %rax, 2), rPC + leaq (IN_ARG1, %rax, 2), rPC EXPORT_PC /* Starting ibase */ @@ -11967,10 +11966,9 @@ MterpException: call SYMBOL(MterpHandleException) testb %al, %al jz MterpExceptionReturn - movq OFF_FP_CODE_ITEM(rFP), %rax + movq OFF_FP_DEX_INSTRUCTIONS(rFP), %rax mov OFF_FP_DEX_PC(rFP), %ecx - leaq CODEITEM_INSNS_OFFSET(%rax), rPC - leaq (rPC, %rcx, 2), rPC + leaq (%rax, %rcx, 2), rPC movq rPC, OFF_FP_DEX_PC_PTR(rFP) /* Do we need to switch interpreters? */ call SYMBOL(MterpShouldSwitchInterpreters) diff --git a/runtime/interpreter/mterp/x86/entry.S b/runtime/interpreter/mterp/x86/entry.S index 34adf53b99..055e834fed 100644 --- a/runtime/interpreter/mterp/x86/entry.S +++ b/runtime/interpreter/mterp/x86/entry.S @@ -53,15 +53,14 @@ SYMBOL(ExecuteMterpImpl): /* Remember the code_item */ movl IN_ARG1(%esp), %ecx - movl %ecx, SHADOWFRAME_CODE_ITEM_OFFSET(%edx) + movl %ecx, SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET(%edx) /* set up "named" registers */ movl SHADOWFRAME_NUMBER_OF_VREGS_OFFSET(%edx), %eax leal SHADOWFRAME_VREGS_OFFSET(%edx), rFP leal (rFP, %eax, 4), rREFS movl SHADOWFRAME_DEX_PC_OFFSET(%edx), %eax - lea CODEITEM_INSNS_OFFSET(%ecx), rPC - lea (rPC, %eax, 2), rPC + lea (%ecx, %eax, 2), rPC EXPORT_PC /* Set up for backwards branches & osr profiling */ diff --git a/runtime/interpreter/mterp/x86/footer.S b/runtime/interpreter/mterp/x86/footer.S index 088cb127dc..0b08cf98a3 100644 --- a/runtime/interpreter/mterp/x86/footer.S +++ b/runtime/interpreter/mterp/x86/footer.S @@ -115,10 +115,9 @@ MterpException: call SYMBOL(MterpHandleException) testb %al, %al jz MterpExceptionReturn - movl OFF_FP_CODE_ITEM(rFP), %eax + movl OFF_FP_DEX_INSTRUCTIONS(rFP), %eax movl OFF_FP_DEX_PC(rFP), %ecx - lea CODEITEM_INSNS_OFFSET(%eax), rPC - lea (rPC, %ecx, 2), rPC + lea (%eax, %ecx, 2), rPC movl rPC, OFF_FP_DEX_PC_PTR(rFP) /* Do we need to switch interpreters? */ call SYMBOL(MterpShouldSwitchInterpreters) diff --git a/runtime/interpreter/mterp/x86/header.S b/runtime/interpreter/mterp/x86/header.S index 3a2dcb7188..370012f324 100644 --- a/runtime/interpreter/mterp/x86/header.S +++ b/runtime/interpreter/mterp/x86/header.S @@ -128,7 +128,7 @@ unspecified registers or condition codes. #define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET) #define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET) #define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET) -#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET) +#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET) #define OFF_FP_COUNTDOWN_OFFSET OFF_FP(SHADOWFRAME_HOTNESS_COUNTDOWN_OFFSET) #define OFF_FP_SHADOWFRAME OFF_FP(0) diff --git a/runtime/interpreter/mterp/x86_64/entry.S b/runtime/interpreter/mterp/x86_64/entry.S index 0f969eb79f..83b845b702 100644 --- a/runtime/interpreter/mterp/x86_64/entry.S +++ b/runtime/interpreter/mterp/x86_64/entry.S @@ -50,15 +50,14 @@ SYMBOL(ExecuteMterpImpl): movq IN_ARG3, SHADOWFRAME_RESULT_REGISTER_OFFSET(IN_ARG2) /* Remember the code_item */ - movq IN_ARG1, SHADOWFRAME_CODE_ITEM_OFFSET(IN_ARG2) + movq IN_ARG1, SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET(IN_ARG2) /* set up "named" registers */ movl SHADOWFRAME_NUMBER_OF_VREGS_OFFSET(IN_ARG2), %eax leaq SHADOWFRAME_VREGS_OFFSET(IN_ARG2), rFP leaq (rFP, %rax, 4), rREFS movl SHADOWFRAME_DEX_PC_OFFSET(IN_ARG2), %eax - leaq CODEITEM_INSNS_OFFSET(IN_ARG1), rPC - leaq (rPC, %rax, 2), rPC + leaq (IN_ARG1, %rax, 2), rPC EXPORT_PC /* Starting ibase */ diff --git a/runtime/interpreter/mterp/x86_64/footer.S b/runtime/interpreter/mterp/x86_64/footer.S index ac6cd19f4e..3cc75321cf 100644 --- a/runtime/interpreter/mterp/x86_64/footer.S +++ b/runtime/interpreter/mterp/x86_64/footer.S @@ -98,10 +98,9 @@ MterpException: call SYMBOL(MterpHandleException) testb %al, %al jz MterpExceptionReturn - movq OFF_FP_CODE_ITEM(rFP), %rax + movq OFF_FP_DEX_INSTRUCTIONS(rFP), %rax mov OFF_FP_DEX_PC(rFP), %ecx - leaq CODEITEM_INSNS_OFFSET(%rax), rPC - leaq (rPC, %rcx, 2), rPC + leaq (%rax, %rcx, 2), rPC movq rPC, OFF_FP_DEX_PC_PTR(rFP) /* Do we need to switch interpreters? */ call SYMBOL(MterpShouldSwitchInterpreters) diff --git a/runtime/interpreter/mterp/x86_64/header.S b/runtime/interpreter/mterp/x86_64/header.S index f229e84eb8..9d21f3f1a1 100644 --- a/runtime/interpreter/mterp/x86_64/header.S +++ b/runtime/interpreter/mterp/x86_64/header.S @@ -124,7 +124,7 @@ unspecified registers or condition codes. #define OFF_FP_METHOD OFF_FP(SHADOWFRAME_METHOD_OFFSET) #define OFF_FP_RESULT_REGISTER OFF_FP(SHADOWFRAME_RESULT_REGISTER_OFFSET) #define OFF_FP_DEX_PC_PTR OFF_FP(SHADOWFRAME_DEX_PC_PTR_OFFSET) -#define OFF_FP_CODE_ITEM OFF_FP(SHADOWFRAME_CODE_ITEM_OFFSET) +#define OFF_FP_DEX_INSTRUCTIONS OFF_FP(SHADOWFRAME_DEX_INSTRUCTIONS_OFFSET) #define OFF_FP_COUNTDOWN_OFFSET OFF_FP(SHADOWFRAME_HOTNESS_COUNTDOWN_OFFSET) #define OFF_FP_SHADOWFRAME (-SHADOWFRAME_VREGS_OFFSET) diff --git a/runtime/interpreter/shadow_frame.h b/runtime/interpreter/shadow_frame.h index 80fdadb0a7..88275cc6d4 100644 --- a/runtime/interpreter/shadow_frame.h +++ b/runtime/interpreter/shadow_frame.h @@ -92,7 +92,7 @@ class ShadowFrame { } uint32_t GetDexPC() const { - return (dex_pc_ptr_ == nullptr) ? dex_pc_ : dex_pc_ptr_ - code_item_->insns_; + return (dex_pc_ptr_ == nullptr) ? dex_pc_ : dex_pc_ptr_ - dex_instructions_; } int16_t GetCachedHotnessCountdown() const { @@ -146,12 +146,8 @@ class ShadowFrame { return &vregs_[i + NumberOfVRegs()]; } - void SetCodeItem(const DexFile::CodeItem* code_item) { - code_item_ = code_item; - } - - const DexFile::CodeItem* GetCodeItem() const { - return code_item_; + const uint16_t* GetDexInstructions() const { + return dex_instructions_; } float GetVRegFloat(size_t i) const { @@ -324,8 +320,8 @@ class ShadowFrame { return OFFSETOF_MEMBER(ShadowFrame, dex_pc_ptr_); } - static size_t CodeItemOffset() { - return OFFSETOF_MEMBER(ShadowFrame, code_item_); + static size_t DexInstructionsOffset() { + return OFFSETOF_MEMBER(ShadowFrame, dex_instructions_); } static size_t CachedHotnessCountdownOffset() { @@ -372,7 +368,7 @@ class ShadowFrame { method_(method), result_register_(nullptr), dex_pc_ptr_(nullptr), - code_item_(nullptr), + dex_instructions_(nullptr), number_of_vregs_(num_vregs), dex_pc_(dex_pc), cached_hotness_countdown_(0), @@ -403,7 +399,8 @@ class ShadowFrame { ArtMethod* method_; JValue* result_register_; const uint16_t* dex_pc_ptr_; - const DexFile::CodeItem* code_item_; + // Dex instruction base of the code item. + const uint16_t* dex_instructions_; LockCountData lock_count_data_; // This may contain GC roots when lock counting is active. const uint32_t number_of_vregs_; uint32_t dex_pc_; diff --git a/tools/cpp-define-generator/offset_codeitem.def b/tools/cpp-define-generator/offset_codeitem.def deleted file mode 100644 index e5acd1d93d..0000000000 --- a/tools/cpp-define-generator/offset_codeitem.def +++ /dev/null @@ -1,33 +0,0 @@ -/* - * Copyright (C) 2016 The Android Open Source Project - * - * Licensed under the Apache License, Version 2.0 (the "License"); - * you may not use this file except in compliance with the License. - * You may obtain a copy of the License at - * - * http://www.apache.org/licenses/LICENSE-2.0 - * - * Unless required by applicable law or agreed to in writing, software - * distributed under the License is distributed on an "AS IS" BASIS, - * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. - * See the License for the specific language governing permissions and - * limitations under the License. - */ - -// Offsets within CodeItem. - -#if defined(DEFINE_INCLUDE_DEPENDENCIES) -#include <cstddef> // offsetof -#include "dex_file.h" // art::DexFile -#endif - -#include "common.def" // DEFINE_OFFSET_EXPR - -#define DEFINE_CODEITEM_OFFSET(field_name) \ - DEFINE_OFFSET_EXPR(CodeItem, field_name, int32_t, offsetof(art::DexFile::CodeItem, field_name ## _)) - -// Field Name -DEFINE_CODEITEM_OFFSET(insns) - -#undef DEFINE_CODEITEM_OFFSET -#include "common_undef.def" // undef DEFINE_OFFSET_EXPR diff --git a/tools/cpp-define-generator/offsets_all.def b/tools/cpp-define-generator/offsets_all.def index c2e8c9728c..31587d8d62 100644 --- a/tools/cpp-define-generator/offsets_all.def +++ b/tools/cpp-define-generator/offsets_all.def @@ -40,7 +40,6 @@ #include "offset_thread.def" // TODO: SHADOW_FRAME depends on __SIZEOF__POINTER__ // #include "offset_shadow_frame.def" -#include "offset_codeitem.def" // TODO: MIRROR_OBJECT_HEADER_SIZE (depends on #ifdef read barrier) #include "offset_mirror_class.def" #include "offset_mirror_dex_cache.def" |