diff options
23 files changed, 466 insertions, 904 deletions
diff --git a/compiler/optimizing/register_allocator.cc b/compiler/optimizing/register_allocator.cc index 5cd30adb45..b8d76b912e 100644 --- a/compiler/optimizing/register_allocator.cc +++ b/compiler/optimizing/register_allocator.cc @@ -994,10 +994,6 @@ bool RegisterAllocator::AllocateBlockedReg(LiveInterval* current) { return false; } - // We use the first use to compare with other intervals. If this interval - // is used after any active intervals, we will spill this interval. - size_t first_use = current->FirstUseAfter(current->GetStart()); - // First set all registers as not being used. size_t* next_use = registers_array_; for (size_t i = 0; i < number_of_registers_; ++i) { @@ -1011,7 +1007,7 @@ bool RegisterAllocator::AllocateBlockedReg(LiveInterval* current) { if (active->IsFixed()) { next_use[active->GetRegister()] = current->GetStart(); } else { - size_t use = active->FirstUseAfter(current->GetStart()); + size_t use = active->FirstRegisterUseAfter(current->GetStart()); if (use != kNoLifetime) { next_use[active->GetRegister()] = use; } @@ -1052,16 +1048,16 @@ bool RegisterAllocator::AllocateBlockedReg(LiveInterval* current) { DCHECK(current->IsHighInterval()); reg = current->GetRegister(); // When allocating the low part, we made sure the high register was available. - DCHECK_LT(first_use, next_use[reg]); + DCHECK_LT(first_register_use, next_use[reg]); } else if (current->IsLowInterval()) { - reg = FindAvailableRegisterPair(next_use, first_use); + reg = FindAvailableRegisterPair(next_use, first_register_use); // We should spill if both registers are not available. - should_spill = (first_use >= next_use[reg]) - || (first_use >= next_use[GetHighForLowRegister(reg)]); + should_spill = (first_register_use >= next_use[reg]) + || (first_register_use >= next_use[GetHighForLowRegister(reg)]); } else { DCHECK(!current->IsHighInterval()); reg = FindAvailableRegister(next_use, current); - should_spill = (first_use >= next_use[reg]); + should_spill = (first_register_use >= next_use[reg]); } DCHECK_NE(reg, kNoRegister); diff --git a/runtime/instrumentation.h b/runtime/instrumentation.h index e3cbf53873..56aeefc2f5 100644 --- a/runtime/instrumentation.h +++ b/runtime/instrumentation.h @@ -290,14 +290,6 @@ class Instrumentation { bool IsActive() const SHARED_REQUIRES(Locks::mutator_lock_) { return have_dex_pc_listeners_ || have_method_entry_listeners_ || have_method_exit_listeners_ || have_field_read_listeners_ || have_field_write_listeners_ || - have_exception_caught_listeners_ || have_method_unwind_listeners_ || - have_branch_listeners_ || have_invoke_virtual_or_interface_listeners_; - } - - // Any instrumentation *other* than what is needed for Jit profiling active? - bool NonJitProfilingActive() const SHARED_REQUIRES(Locks::mutator_lock_) { - return have_dex_pc_listeners_ || have_method_exit_listeners_ || - have_field_read_listeners_ || have_field_write_listeners_ || have_exception_caught_listeners_ || have_method_unwind_listeners_; } diff --git a/runtime/interpreter/interpreter.cc b/runtime/interpreter/interpreter.cc index 01498a23db..0b2471b4c0 100644 --- a/runtime/interpreter/interpreter.cc +++ b/runtime/interpreter/interpreter.cc @@ -322,14 +322,8 @@ static inline JValue Execute(Thread* self, const DexFile::CodeItem* code_item, const instrumentation::Instrumentation* const instrumentation = Runtime::Current()->GetInstrumentation(); while (true) { - // Mterp does not support all instrumentation. - bool unhandled_instrumentation; - if ((kRuntimeISA == kArm64) || (kRuntimeISA == kArm)) { - unhandled_instrumentation = instrumentation->NonJitProfilingActive(); - } else { - unhandled_instrumentation = instrumentation->IsActive(); - } - if (unhandled_instrumentation || !Runtime::Current()->IsStarted()) { + if (instrumentation->IsActive() || !Runtime::Current()->IsStarted()) { + // TODO: allow JIT profiling instrumentation. Now, just punt on all instrumentation. #if !defined(__clang__) return ExecuteGotoImpl<false, false>(self, code_item, shadow_frame, result_register); #else diff --git a/runtime/interpreter/mterp/arm/bincmp.S b/runtime/interpreter/mterp/arm/bincmp.S index 774e1676b7..474bc3c276 100644 --- a/runtime/interpreter/mterp/arm/bincmp.S +++ b/runtime/interpreter/mterp/arm/bincmp.S @@ -6,29 +6,17 @@ * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le */ /* if-cmp vA, vB, +CCCC */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r1, rINST, lsr #12 @ r1<- B ubfx r0, rINST, #8, #4 @ r0<- A GET_VREG r3, r1 @ r3<- vB GET_VREG r2, r0 @ r2<- vA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, r3 @ compare (vA, vB) - b${revcmp} .L_${opcode}_not_taken - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - adds r2, rINST, rINST @ convert to bytes, check sign - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] + mov${revcmp} r1, #2 @ r1<- BYTE branch dist for not-taken + adds r2, r1, r1 @ convert to bytes, check sign FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue - GET_INST_OPCODE ip @ extract opcode from rINST - GOTO_OPCODE ip @ jump to next instruction -.L_${opcode}_not_taken: - FETCH_ADVANCE_INST 2 @ update rPC, load rINST + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh rIBASE GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else @@ -37,10 +25,10 @@ GET_VREG r3, r1 @ r3<- vB GET_VREG r2, r0 @ r2<- vA ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, r3 @ compare (vA, vB) - mov${revcmp} rINST, #2 @ rINST<- BYTE branch dist for not-taken - adds r2, rINST, rINST @ convert to bytes, check sign + mov${revcmp} r1, #2 @ r1<- BYTE branch dist for not-taken + adds r2, r1, r1 @ convert to bytes, check sign FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST diff --git a/runtime/interpreter/mterp/arm/footer.S b/runtime/interpreter/mterp/arm/footer.S index 9a433e3358..1dba856ecb 100644 --- a/runtime/interpreter/mterp/arm/footer.S +++ b/runtime/interpreter/mterp/arm/footer.S @@ -12,6 +12,7 @@ * has not yet been thrown. Just bail out to the reference interpreter to deal with it. * TUNING: for consistency, we may want to just go ahead and handle these here. */ +#define MTERP_LOGGING 0 common_errDivideByZero: EXPORT_PC #if MTERP_LOGGING @@ -123,18 +124,6 @@ MterpCheckSuspendAndContinue: GOTO_OPCODE ip @ jump to next instruction /* - * On-stack replacement pending. - * Branch offset in rINST on entry. - */ -MterpOnStackReplacement: -#if MTERP_LOGGING - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpLogOSR -#endif - b MterpFallback @ Let the reference interpreter deal with it. -/* * Bail out to reference interpreter. */ MterpFallback: diff --git a/runtime/interpreter/mterp/arm/header.S b/runtime/interpreter/mterp/arm/header.S index 298af8a57e..b2370bffb4 100644 --- a/runtime/interpreter/mterp/arm/header.S +++ b/runtime/interpreter/mterp/arm/header.S @@ -85,9 +85,6 @@ unspecified registers or condition codes. */ #include "asm_support.h" -#define MTERP_PROFILE_BRANCHES 1 -#define MTERP_LOGGING 0 - /* During bringup, we'll use the shadow frame model instead of rFP */ /* single-purpose registers, given names for clarity */ #define rPC r4 @@ -112,6 +109,14 @@ unspecified registers or condition codes. #define OFF_FP_SHADOWFRAME (-SHADOWFRAME_VREGS_OFFSET) /* + * + * The reference interpreter performs explicit suspect checks, which is somewhat wasteful. + * Dalvik's interpreter folded suspend checks into the jump table mechanism, and eventually + * mterp should do so as well. + */ +#define MTERP_SUSPEND 0 + +/* * "export" the PC to dex_pc field in the shadow frame, f/b/o future exception objects. Must * be done *before* something throws. * diff --git a/runtime/interpreter/mterp/arm/op_goto.S b/runtime/interpreter/mterp/arm/op_goto.S index eb1d42992b..9b3632aba2 100644 --- a/runtime/interpreter/mterp/arm/op_goto.S +++ b/runtime/interpreter/mterp/arm/op_goto.S @@ -6,28 +6,20 @@ */ /* goto +AA */ /* tuning: use sbfx for 6t2+ targets */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r0, rINST, lsl #16 @ r0<- AAxx0000 - movs rINST, r0, asr #24 @ rINST<- ssssssAA (sign-extended) - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - add r2, rINST, rINST @ r2<- byte offset, set flags - FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST + movs r1, r0, asr #24 @ r1<- ssssssAA (sign-extended) + add r2, r1, r1 @ r2<- byte offset, set flags @ If backwards branch refresh rIBASE - bmi MterpCheckSuspendAndContinue + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh handler base + FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else - mov r0, rINST, lsl #16 @ r0<- AAxx0000 - movs rINST, r0, asr #24 @ rINST<- ssssssAA (sign-extended) ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - add r2, rINST, rINST @ r2<- byte offset, set flags + mov r0, rINST, lsl #16 @ r0<- AAxx0000 + movs r1, r0, asr #24 @ r1<- ssssssAA (sign-extended) + add r2, r1, r1 @ r2<- byte offset, set flags FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST @ If backwards branch refresh rIBASE bmi MterpCheckSuspendAndContinue diff --git a/runtime/interpreter/mterp/arm/op_goto_16.S b/runtime/interpreter/mterp/arm/op_goto_16.S index 91639ca796..2231acdb9e 100644 --- a/runtime/interpreter/mterp/arm/op_goto_16.S +++ b/runtime/interpreter/mterp/arm/op_goto_16.S @@ -5,25 +5,17 @@ * double to get a byte offset. */ /* goto/16 +AAAA */ -#if MTERP_PROFILE_BRANCHES - FETCH_S rINST, 1 @ rINST<- ssssAAAA (sign-extended) - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - adds r1, rINST, rINST @ r1<- byte offset, flags set +#if MTERP_SUSPEND + FETCH_S r0, 1 @ r0<- ssssAAAA (sign-extended) + adds r1, r0, r0 @ r1<- byte offset, flags set FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh handler base GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else - FETCH_S rINST, 1 @ rINST<- ssssAAAA (sign-extended) + FETCH_S r0, 1 @ r0<- ssssAAAA (sign-extended) ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - adds r1, rINST, rINST @ r1<- byte offset, flags set + adds r1, r0, r0 @ r1<- byte offset, flags set FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST diff --git a/runtime/interpreter/mterp/arm/op_goto_32.S b/runtime/interpreter/mterp/arm/op_goto_32.S index e730b527ec..6b72ff5ce2 100644 --- a/runtime/interpreter/mterp/arm/op_goto_32.S +++ b/runtime/interpreter/mterp/arm/op_goto_32.S @@ -10,29 +10,21 @@ * offset to byte offset. */ /* goto/32 +AAAAAAAA */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND FETCH r0, 1 @ r0<- aaaa (lo) FETCH r1, 2 @ r1<- AAAA (hi) - orr rINST, r0, r1, lsl #16 @ rINST<- AAAAaaaa - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - adds r1, rINST, rINST @ r1<- byte offset + orr r0, r0, r1, lsl #16 @ r0<- AAAAaaaa + adds r1, r0, r0 @ r1<- byte offset FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST - ble MterpCheckSuspendAndContinue + ldrle rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh handler base GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else FETCH r0, 1 @ r0<- aaaa (lo) FETCH r1, 2 @ r1<- AAAA (hi) - orr rINST, r0, r1, lsl #16 @ rINST<- AAAAaaaa ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - adds r1, rINST, rINST @ r1<- byte offset + orr r0, r0, r1, lsl #16 @ r0<- AAAAaaaa + adds r1, r0, r0 @ r1<- byte offset FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST ble MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST diff --git a/runtime/interpreter/mterp/arm/op_packed_switch.S b/runtime/interpreter/mterp/arm/op_packed_switch.S index 4c369cb136..1e3370ea6a 100644 --- a/runtime/interpreter/mterp/arm/op_packed_switch.S +++ b/runtime/interpreter/mterp/arm/op_packed_switch.S @@ -9,7 +9,7 @@ * for: packed-switch, sparse-switch */ /* op vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND FETCH r0, 1 @ r0<- bbbb (lo) FETCH r1, 2 @ r1<- BBBB (hi) mov r3, rINST, lsr #8 @ r3<- AA @@ -17,18 +17,9 @@ GET_VREG r1, r3 @ r1<- vAA add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2 bl $func @ r0<- code-unit branch offset - mov rINST, r0 - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - adds r1, rINST, rINST @ r1<- byte offset; clear V + adds r1, r0, r0 @ r1<- byte offset; clear V + ldrle rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh handler base FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST - ble MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else @@ -39,9 +30,8 @@ GET_VREG r1, r3 @ r1<- vAA add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2 bl $func @ r0<- code-unit branch offset - mov rINST, r0 ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - adds r1, rINST, rINST @ r1<- byte offset; clear V + adds r1, r0, r0 @ r1<- byte offset; clear V FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST ble MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST diff --git a/runtime/interpreter/mterp/arm/zcmp.S b/runtime/interpreter/mterp/arm/zcmp.S index 800804d95e..6e9ef55104 100644 --- a/runtime/interpreter/mterp/arm/zcmp.S +++ b/runtime/interpreter/mterp/arm/zcmp.S @@ -6,37 +6,25 @@ * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez */ /* if-cmp vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r0, rINST, lsr #8 @ r0<- AA GET_VREG r2, r0 @ r2<- vAA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, #0 @ compare (vA, 0) - b${revcmp} .L_${opcode}_not_taken - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - adds r1, rINST, rINST @ convert to bytes & set flags + mov${revcmp} r1, #2 @ r1<- inst branch dist for not-taken + adds r1, r1, r1 @ convert to bytes & set flags FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue - GET_INST_OPCODE ip @ extract opcode from rINST - GOTO_OPCODE ip @ jump to next instruction -.L_${opcode}_not_taken: - FETCH_ADVANCE_INST 2 @ update rPC, load rINST + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh table base GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else mov r0, rINST, lsr #8 @ r0<- AA GET_VREG r2, r0 @ r2<- vAA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] cmp r2, #0 @ compare (vA, 0) - mov${revcmp} rINST, #2 @ rINST<- inst branch dist for not-taken - adds r1, rINST, rINST @ convert to bytes & set flags + mov${revcmp} r1, #2 @ r1<- inst branch dist for not-taken + adds r1, r1, r1 @ convert to bytes & set flags FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST diff --git a/runtime/interpreter/mterp/arm64/bincmp.S b/runtime/interpreter/mterp/arm64/bincmp.S index ed850fc49d..ecab2ceba7 100644 --- a/runtime/interpreter/mterp/arm64/bincmp.S +++ b/runtime/interpreter/mterp/arm64/bincmp.S @@ -6,28 +6,17 @@ * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le */ /* if-cmp vA, vB, +CCCC */ -#if MTERP_PROFILE_BRANCHES - lsr w1, wINST, #12 // w1<- B +#if MTERP_SUSPEND + mov w1, wINST, lsr #12 // w1<- B ubfx w0, wINST, #8, #4 // w0<- A GET_VREG w3, w1 // w3<- vB GET_VREG w2, w0 // w2<- vA - FETCH_S wINST, 1 // wINST<- branch offset, in code units + FETCH_S w1, 1 // w1<- branch offset, in code units cmp w2, w3 // compare (vA, vB) - b.${condition} .L_${opcode}_taken - FETCH_ADVANCE_INST 2 // update rPC, load wINST - GET_INST_OPCODE ip // extract opcode from wINST - GOTO_OPCODE ip // jump to next instruction -.L_${opcode}_taken: - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 // Sign extend branch offset - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in xINST - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes, check sign + mov${condition} w1, #2 // w1<- BYTE branch dist for not-taken + adds w2, w1, w1 // convert to bytes, check sign FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST - b.mi MterpCheckSuspendAndContinue + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh rIBASE GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction #else @@ -36,11 +25,11 @@ GET_VREG w3, w1 // w3<- vB GET_VREG w2, w0 // w2<- vA FETCH_S w1, 1 // w1<- branch offset, in code units + ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] mov w0, #2 // Offset if branch not taken cmp w2, w3 // compare (vA, vB) - csel wINST, w1, w0, ${condition} // Branch if true, stashing result in callee save reg. - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes, check sign + csel w1, w1, w0, ${condition} // Branch if true + adds w2, w1, w1 // convert to bytes, check sign FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST diff --git a/runtime/interpreter/mterp/arm64/footer.S b/runtime/interpreter/mterp/arm64/footer.S index 867e927722..b360539a8c 100644 --- a/runtime/interpreter/mterp/arm64/footer.S +++ b/runtime/interpreter/mterp/arm64/footer.S @@ -10,6 +10,7 @@ * has not yet been thrown. Just bail out to the reference interpreter to deal with it. * TUNING: for consistency, we may want to just go ahead and handle these here. */ +#define MTERP_LOGGING 0 common_errDivideByZero: EXPORT_PC #if MTERP_LOGGING @@ -123,19 +124,6 @@ check1: GOTO_OPCODE ip // jump to next instruction /* - * On-stack replacement pending. - * Branch offset in wINST on entry. - */ -MterpOnStackReplacement: -#if MTERP_LOGGING - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpLogOSR -#endif - b MterpFallback // Let the reference interpreter deal with it. - -/* * Bail out to reference interpreter. */ MterpFallback: diff --git a/runtime/interpreter/mterp/arm64/header.S b/runtime/interpreter/mterp/arm64/header.S index 722375002b..351a6075cb 100644 --- a/runtime/interpreter/mterp/arm64/header.S +++ b/runtime/interpreter/mterp/arm64/header.S @@ -87,9 +87,6 @@ codes. */ #include "asm_support.h" -#define MTERP_PROFILE_BRANCHES 1 -#define MTERP_LOGGING 0 - /* During bringup, we'll use the shadow frame model instead of xFP */ /* single-purpose registers, given names for clarity */ #define xPC x20 @@ -117,6 +114,14 @@ codes. #define OFF_FP_SHADOWFRAME (-SHADOWFRAME_VREGS_OFFSET) /* + * + * The reference interpreter performs explicit suspect checks, which is somewhat wasteful. + * Dalvik's interpreter folded suspend checks into the jump table mechanism, and eventually + * mterp should do so as well. + */ +#define MTERP_SUSPEND 0 + +/* * "export" the PC to dex_pc field in the shadow frame, f/b/o future exception objects. Must * be done *before* something throws. * diff --git a/runtime/interpreter/mterp/arm64/op_goto.S b/runtime/interpreter/mterp/arm64/op_goto.S index 7e2f6a9c11..db98a45fae 100644 --- a/runtime/interpreter/mterp/arm64/op_goto.S +++ b/runtime/interpreter/mterp/arm64/op_goto.S @@ -6,20 +6,23 @@ */ /* goto +AA */ /* tuning: use sbfx for 6t2+ targets */ - lsl w0, wINST, #16 // w0<- AAxx0000 - asr wINST, w0, #24 // wINST<- ssssssAA (sign-extended) -#if MTERP_PROFILE_BRANCHES - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in wINST -#endif +#if MTERP_SUSPEND + mov w0, wINST, lsl #16 // w0<- AAxx0000 + movs w1, w0, asr #24 // w1<- ssssssAA (sign-extended) + add w2, w1, w1 // w2<- byte offset, set flags + // If backwards branch refresh rIBASE + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh handler base + FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST + GET_INST_OPCODE ip // extract opcode from wINST + GOTO_OPCODE ip // jump to next instruction +#else ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] // Preload flags for MterpCheckSuspendAndContinue - adds w1, wINST, wINST // Convert dalvik offset to byte offset, setting flags + lsl w0, wINST, #16 // w0<- AAxx0000 + asr w0, w0, #24 // w0<- ssssssAA (sign-extended) + adds w1, w0, w0 // Convert dalvik offset to byte offset, setting flags FETCH_ADVANCE_INST_RB w1 // load wINST and advance xPC // If backwards branch refresh rIBASE b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction +#endif diff --git a/runtime/interpreter/mterp/arm64/op_goto_16.S b/runtime/interpreter/mterp/arm64/op_goto_16.S index b2b9924409..ff66a23c4e 100644 --- a/runtime/interpreter/mterp/arm64/op_goto_16.S +++ b/runtime/interpreter/mterp/arm64/op_goto_16.S @@ -5,18 +5,19 @@ * double to get a byte offset. */ /* goto/16 +AAAA */ - FETCH_S wINST, 1 // wINST<- ssssAAAA (sign-extended) -#if MTERP_PROFILE_BRANCHES - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in xINST -#endif +#if MTERP_SUSPEND + FETCH_S w0, 1 // w0<- ssssAAAA (sign-extended) + adds w1, w0, w0 // w1<- byte offset, flags set + FETCH_ADVANCE_INST_RB w1 // update rPC, load rINST + ldrmi xIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh handler base + GET_INST_OPCODE ip // extract opcode from rINST + GOTO_OPCODE ip // jump to next instruction +#else + FETCH_S w0, 1 // w0<- ssssAAAA (sign-extended) ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w1, wINST, wINST // w1<- byte offset, flags set + adds w1, w0, w0 // w1<- byte offset, flags set FETCH_ADVANCE_INST_RB w1 // update rPC, load rINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from rINST GOTO_OPCODE ip // jump to next instruction +#endif diff --git a/runtime/interpreter/mterp/arm64/op_goto_32.S b/runtime/interpreter/mterp/arm64/op_goto_32.S index b785857b9b..8a6980ecea 100644 --- a/runtime/interpreter/mterp/arm64/op_goto_32.S +++ b/runtime/interpreter/mterp/arm64/op_goto_32.S @@ -10,20 +10,23 @@ * offset to byte offset. */ /* goto/32 +AAAAAAAA */ +#if MTERP_SUSPEND + FETCH w0, 1 // w0<- aaaa (lo) + FETCH w1, 2 // w1<- AAAA (hi) + orr w0, w0, w1, lsl #16 // w0<- AAAAaaaa + adds w1, w0, w0 // w1<- byte offset + FETCH_ADVANCE_INST_RB w1 // update rPC, load xINST + ldrle xIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh handler base + GET_INST_OPCODE ip // extract opcode from xINST + GOTO_OPCODE ip // jump to next instruction +#else FETCH w0, 1 // w0<- aaaa (lo) FETCH w1, 2 // w1<- AAAA (hi) - orr wINST, w0, w1, lsl #16 // wINST<- AAAAaaaa -#if MTERP_PROFILE_BRANCHES - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in xINST -#endif ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w1, wINST, wINST // w1<- byte offset + orr w0, w0, w1, lsl #16 // w0<- AAAAaaaa + adds w1, w0, w0 // w1<- byte offset FETCH_ADVANCE_INST_RB w1 // update rPC, load xINST b.le MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from xINST GOTO_OPCODE ip // jump to next instruction +#endif diff --git a/runtime/interpreter/mterp/arm64/op_iget.S b/runtime/interpreter/mterp/arm64/op_iget.S index 88533bd33d..165c7308e1 100644 --- a/runtime/interpreter/mterp/arm64/op_iget.S +++ b/runtime/interpreter/mterp/arm64/op_iget.S @@ -1,4 +1,4 @@ -%default { "extend":"", "is_object":"0", "helper":"artGet32InstanceFromCode"} +%default { "is_object":"0", "helper":"artGet32InstanceFromCode"} /* * General instance field get. * @@ -12,7 +12,6 @@ mov x3, xSELF // w3<- self bl $helper ldr x3, [xSELF, #THREAD_EXCEPTION_OFFSET] - $extend ubfx w2, wINST, #8, #4 // w2<- A PREFETCH_INST 2 cbnz x3, MterpPossibleException // bail out diff --git a/runtime/interpreter/mterp/arm64/op_packed_switch.S b/runtime/interpreter/mterp/arm64/op_packed_switch.S index e8b4f04dfe..f087d23c0a 100644 --- a/runtime/interpreter/mterp/arm64/op_packed_switch.S +++ b/runtime/interpreter/mterp/arm64/op_packed_switch.S @@ -9,6 +9,20 @@ * for: packed-switch, sparse-switch */ /* op vAA, +BBBB */ +#if MTERP_SUSPEND + FETCH w0, 1 // w0<- bbbb (lo) + FETCH w1, 2 // w1<- BBBB (hi) + mov w3, wINST, lsr #8 // w3<- AA + orr w0, w0, w1, lsl #16 // w0<- BBBBbbbb + GET_VREG w1, w3 // w1<- vAA + add w0, rPC, w0, lsl #1 // w0<- PC + BBBBbbbb*2 + bl $func // w0<- code-unit branch offset + adds w1, w0, w0 // w1<- byte offset; clear V + ldrle rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh handler base + FETCH_ADVANCE_INST_RB w1 // update rPC, load wINST + GET_INST_OPCODE ip // extract opcode from wINST + GOTO_OPCODE ip // jump to next instruction +#else FETCH w0, 1 // w0<- bbbb (lo) FETCH w1, 2 // w1<- BBBB (hi) lsr w3, wINST, #8 // w3<- AA @@ -16,18 +30,10 @@ GET_VREG w1, w3 // w1<- vAA add x0, xPC, w0, lsl #1 // w0<- PC + BBBBbbbb*2 bl $func // w0<- code-unit branch offset - sbfm xINST, x0, 0, 31 -#if MTERP_PROFILE_BRANCHES - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - mov x2, xINST - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement -#endif ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w1, wINST, wINST // w1<- byte offset; clear V + adds w1, w0, w0 // w1<- byte offset; clear V FETCH_ADVANCE_INST_RB w1 // update rPC, load wINST b.le MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction +#endif diff --git a/runtime/interpreter/mterp/arm64/zcmp.S b/runtime/interpreter/mterp/arm64/zcmp.S index e528d9f030..d4856d2668 100644 --- a/runtime/interpreter/mterp/arm64/zcmp.S +++ b/runtime/interpreter/mterp/arm64/zcmp.S @@ -6,37 +6,26 @@ * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez */ /* if-cmp vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES - lsr w0, wINST, #8 // w0<- AA +#if MTERP_SUSPEND + mov w0, wINST, lsr #8 // w0<- AA GET_VREG w2, w0 // w2<- vAA - FETCH_S wINST, 1 // w1<- branch offset, in code units + FETCH_S w1, 1 // w1<- branch offset, in code units cmp w2, #0 // compare (vA, 0) - b.${condition} .L_${opcode}_taken - FETCH_ADVANCE_INST 2 // update rPC, load wINST - GET_INST_OPCODE ip // extract opcode from wINST - GOTO_OPCODE ip // jump to next instruction -.L_${opcode}_taken: - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in wINST - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes & set flags - FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST - b.mi MterpCheckSuspendAndContinue + mov${condition} w1, #2 // w1<- inst branch dist for not-taken + adds w1, w1, w1 // convert to bytes & set flags + FETCH_ADVANCE_INST_RB w1 // update rPC, load wINST + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh table base GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction #else lsr w0, wINST, #8 // w0<- AA GET_VREG w2, w0 // w2<- vAA FETCH_S w1, 1 // w1<- branch offset, in code units + ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] mov w0, #2 // Branch offset if not taken cmp w2, #0 // compare (vA, 0) - csel wINST, w1, w0, ${condition} // Branch if true, stashing result in callee save reg - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes & set flags + csel w1, w1, w0, ${condition} // Branch if true + adds w2, w1, w1 // convert to bytes & set flags FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST diff --git a/runtime/interpreter/mterp/mterp.cc b/runtime/interpreter/mterp/mterp.cc index 3feea505ea..0afd2765db 100644 --- a/runtime/interpreter/mterp/mterp.cc +++ b/runtime/interpreter/mterp/mterp.cc @@ -20,7 +20,6 @@ #include "interpreter/interpreter_common.h" #include "entrypoints/entrypoint_utils-inl.h" #include "mterp.h" -#include "jit/jit.h" namespace art { namespace interpreter { @@ -489,14 +488,6 @@ extern "C" void MterpLogFallback(Thread* self, ShadowFrame* shadow_frame) << self->IsExceptionPending(); } -extern "C" void MterpLogOSR(Thread* self, ShadowFrame* shadow_frame, int32_t offset) - SHARED_REQUIRES(Locks::mutator_lock_) { - UNUSED(self); - const Instruction* inst = Instruction::At(shadow_frame->GetDexPCPtr()); - uint16_t inst_data = inst->Fetch16(0); - LOG(INFO) << "OSR: " << inst->Opcode(inst_data) << ", offset = " << offset; -} - extern "C" void MterpLogSuspendFallback(Thread* self, ShadowFrame* shadow_frame, uint32_t flags) SHARED_REQUIRES(Locks::mutator_lock_) { UNUSED(self); @@ -627,15 +618,5 @@ extern "C" mirror::Object* artIGetObjectFromMterp(mirror::Object* obj, uint32_t return obj->GetFieldObject<mirror::Object>(MemberOffset(field_offset)); } -extern "C" bool MterpProfileBranch(Thread* self, ShadowFrame* shadow_frame, int32_t offset) - SHARED_REQUIRES(Locks::mutator_lock_) { - ArtMethod* method = shadow_frame->GetMethod(); - uint32_t dex_pc = shadow_frame->GetDexPC(); - const auto* const instrumentation = Runtime::Current()->GetInstrumentation(); - instrumentation->Branch(self, method, dex_pc, offset); - JValue result; - return jit::Jit::MaybeDoOnStackReplacement(self, method, dex_pc, offset, &result); -} - } // namespace interpreter } // namespace art diff --git a/runtime/interpreter/mterp/out/mterp_arm.S b/runtime/interpreter/mterp/out/mterp_arm.S index b08427d257..ee195598db 100644 --- a/runtime/interpreter/mterp/out/mterp_arm.S +++ b/runtime/interpreter/mterp/out/mterp_arm.S @@ -92,9 +92,6 @@ unspecified registers or condition codes. */ #include "asm_support.h" -#define MTERP_PROFILE_BRANCHES 1 -#define MTERP_LOGGING 0 - /* During bringup, we'll use the shadow frame model instead of rFP */ /* single-purpose registers, given names for clarity */ #define rPC r4 @@ -119,6 +116,14 @@ unspecified registers or condition codes. #define OFF_FP_SHADOWFRAME (-SHADOWFRAME_VREGS_OFFSET) /* + * + * The reference interpreter performs explicit suspect checks, which is somewhat wasteful. + * Dalvik's interpreter folded suspend checks into the jump table mechanism, and eventually + * mterp should do so as well. + */ +#define MTERP_SUSPEND 0 + +/* * "export" the PC to dex_pc field in the shadow frame, f/b/o future exception objects. Must * be done *before* something throws. * @@ -1106,28 +1111,20 @@ artMterpAsmInstructionStart = .L_op_nop */ /* goto +AA */ /* tuning: use sbfx for 6t2+ targets */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r0, rINST, lsl #16 @ r0<- AAxx0000 - movs rINST, r0, asr #24 @ rINST<- ssssssAA (sign-extended) - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - add r2, rINST, rINST @ r2<- byte offset, set flags - FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST + movs r1, r0, asr #24 @ r1<- ssssssAA (sign-extended) + add r2, r1, r1 @ r2<- byte offset, set flags @ If backwards branch refresh rIBASE - bmi MterpCheckSuspendAndContinue + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh handler base + FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else - mov r0, rINST, lsl #16 @ r0<- AAxx0000 - movs rINST, r0, asr #24 @ rINST<- ssssssAA (sign-extended) ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - add r2, rINST, rINST @ r2<- byte offset, set flags + mov r0, rINST, lsl #16 @ r0<- AAxx0000 + movs r1, r0, asr #24 @ r1<- ssssssAA (sign-extended) + add r2, r1, r1 @ r2<- byte offset, set flags FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST @ If backwards branch refresh rIBASE bmi MterpCheckSuspendAndContinue @@ -1146,25 +1143,17 @@ artMterpAsmInstructionStart = .L_op_nop * double to get a byte offset. */ /* goto/16 +AAAA */ -#if MTERP_PROFILE_BRANCHES - FETCH_S rINST, 1 @ rINST<- ssssAAAA (sign-extended) - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - adds r1, rINST, rINST @ r1<- byte offset, flags set +#if MTERP_SUSPEND + FETCH_S r0, 1 @ r0<- ssssAAAA (sign-extended) + adds r1, r0, r0 @ r1<- byte offset, flags set FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh handler base GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else - FETCH_S rINST, 1 @ rINST<- ssssAAAA (sign-extended) + FETCH_S r0, 1 @ r0<- ssssAAAA (sign-extended) ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - adds r1, rINST, rINST @ r1<- byte offset, flags set + adds r1, r0, r0 @ r1<- byte offset, flags set FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -1187,29 +1176,21 @@ artMterpAsmInstructionStart = .L_op_nop * offset to byte offset. */ /* goto/32 +AAAAAAAA */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND FETCH r0, 1 @ r0<- aaaa (lo) FETCH r1, 2 @ r1<- AAAA (hi) - orr rINST, r0, r1, lsl #16 @ rINST<- AAAAaaaa - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - adds r1, rINST, rINST @ r1<- byte offset + orr r0, r0, r1, lsl #16 @ r0<- AAAAaaaa + adds r1, r0, r0 @ r1<- byte offset FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST - ble MterpCheckSuspendAndContinue + ldrle rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh handler base GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else FETCH r0, 1 @ r0<- aaaa (lo) FETCH r1, 2 @ r1<- AAAA (hi) - orr rINST, r0, r1, lsl #16 @ rINST<- AAAAaaaa ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - adds r1, rINST, rINST @ r1<- byte offset + orr r0, r0, r1, lsl #16 @ r0<- AAAAaaaa + adds r1, r0, r0 @ r1<- byte offset FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST ble MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -1230,7 +1211,7 @@ artMterpAsmInstructionStart = .L_op_nop * for: packed-switch, sparse-switch */ /* op vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND FETCH r0, 1 @ r0<- bbbb (lo) FETCH r1, 2 @ r1<- BBBB (hi) mov r3, rINST, lsr #8 @ r3<- AA @@ -1238,18 +1219,9 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG r1, r3 @ r1<- vAA add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2 bl MterpDoPackedSwitch @ r0<- code-unit branch offset - mov rINST, r0 - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - adds r1, rINST, rINST @ r1<- byte offset; clear V + adds r1, r0, r0 @ r1<- byte offset; clear V + ldrle rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh handler base FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST - ble MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else @@ -1260,9 +1232,8 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG r1, r3 @ r1<- vAA add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2 bl MterpDoPackedSwitch @ r0<- code-unit branch offset - mov rINST, r0 ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - adds r1, rINST, rINST @ r1<- byte offset; clear V + adds r1, r0, r0 @ r1<- byte offset; clear V FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST ble MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -1284,7 +1255,7 @@ artMterpAsmInstructionStart = .L_op_nop * for: packed-switch, sparse-switch */ /* op vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND FETCH r0, 1 @ r0<- bbbb (lo) FETCH r1, 2 @ r1<- BBBB (hi) mov r3, rINST, lsr #8 @ r3<- AA @@ -1292,18 +1263,9 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG r1, r3 @ r1<- vAA add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2 bl MterpDoSparseSwitch @ r0<- code-unit branch offset - mov rINST, r0 - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - adds r1, rINST, rINST @ r1<- byte offset; clear V + adds r1, r0, r0 @ r1<- byte offset; clear V + ldrle rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh handler base FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST - ble MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else @@ -1314,9 +1276,8 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG r1, r3 @ r1<- vAA add r0, rPC, r0, lsl #1 @ r0<- PC + BBBBbbbb*2 bl MterpDoSparseSwitch @ r0<- code-unit branch offset - mov rINST, r0 ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - adds r1, rINST, rINST @ r1<- byte offset; clear V + adds r1, r0, r0 @ r1<- byte offset; clear V FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST ble MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -1534,29 +1495,17 @@ artMterpAsmInstructionStart = .L_op_nop * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le */ /* if-cmp vA, vB, +CCCC */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r1, rINST, lsr #12 @ r1<- B ubfx r0, rINST, #8, #4 @ r0<- A GET_VREG r3, r1 @ r3<- vB GET_VREG r2, r0 @ r2<- vA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, r3 @ compare (vA, vB) - bne .L_op_if_eq_not_taken - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - adds r2, rINST, rINST @ convert to bytes, check sign - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] + movne r1, #2 @ r1<- BYTE branch dist for not-taken + adds r2, r1, r1 @ convert to bytes, check sign FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue - GET_INST_OPCODE ip @ extract opcode from rINST - GOTO_OPCODE ip @ jump to next instruction -.L_op_if_eq_not_taken: - FETCH_ADVANCE_INST 2 @ update rPC, load rINST + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh rIBASE GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else @@ -1565,10 +1514,10 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG r3, r1 @ r3<- vB GET_VREG r2, r0 @ r2<- vA ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, r3 @ compare (vA, vB) - movne rINST, #2 @ rINST<- BYTE branch dist for not-taken - adds r2, rINST, rINST @ convert to bytes, check sign + movne r1, #2 @ r1<- BYTE branch dist for not-taken + adds r2, r1, r1 @ convert to bytes, check sign FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -1589,29 +1538,17 @@ artMterpAsmInstructionStart = .L_op_nop * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le */ /* if-cmp vA, vB, +CCCC */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r1, rINST, lsr #12 @ r1<- B ubfx r0, rINST, #8, #4 @ r0<- A GET_VREG r3, r1 @ r3<- vB GET_VREG r2, r0 @ r2<- vA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, r3 @ compare (vA, vB) - beq .L_op_if_ne_not_taken - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - adds r2, rINST, rINST @ convert to bytes, check sign - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] + moveq r1, #2 @ r1<- BYTE branch dist for not-taken + adds r2, r1, r1 @ convert to bytes, check sign FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue - GET_INST_OPCODE ip @ extract opcode from rINST - GOTO_OPCODE ip @ jump to next instruction -.L_op_if_ne_not_taken: - FETCH_ADVANCE_INST 2 @ update rPC, load rINST + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh rIBASE GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else @@ -1620,10 +1557,10 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG r3, r1 @ r3<- vB GET_VREG r2, r0 @ r2<- vA ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, r3 @ compare (vA, vB) - moveq rINST, #2 @ rINST<- BYTE branch dist for not-taken - adds r2, rINST, rINST @ convert to bytes, check sign + moveq r1, #2 @ r1<- BYTE branch dist for not-taken + adds r2, r1, r1 @ convert to bytes, check sign FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -1644,29 +1581,17 @@ artMterpAsmInstructionStart = .L_op_nop * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le */ /* if-cmp vA, vB, +CCCC */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r1, rINST, lsr #12 @ r1<- B ubfx r0, rINST, #8, #4 @ r0<- A GET_VREG r3, r1 @ r3<- vB GET_VREG r2, r0 @ r2<- vA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, r3 @ compare (vA, vB) - bge .L_op_if_lt_not_taken - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - adds r2, rINST, rINST @ convert to bytes, check sign - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] + movge r1, #2 @ r1<- BYTE branch dist for not-taken + adds r2, r1, r1 @ convert to bytes, check sign FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue - GET_INST_OPCODE ip @ extract opcode from rINST - GOTO_OPCODE ip @ jump to next instruction -.L_op_if_lt_not_taken: - FETCH_ADVANCE_INST 2 @ update rPC, load rINST + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh rIBASE GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else @@ -1675,10 +1600,10 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG r3, r1 @ r3<- vB GET_VREG r2, r0 @ r2<- vA ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, r3 @ compare (vA, vB) - movge rINST, #2 @ rINST<- BYTE branch dist for not-taken - adds r2, rINST, rINST @ convert to bytes, check sign + movge r1, #2 @ r1<- BYTE branch dist for not-taken + adds r2, r1, r1 @ convert to bytes, check sign FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -1699,29 +1624,17 @@ artMterpAsmInstructionStart = .L_op_nop * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le */ /* if-cmp vA, vB, +CCCC */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r1, rINST, lsr #12 @ r1<- B ubfx r0, rINST, #8, #4 @ r0<- A GET_VREG r3, r1 @ r3<- vB GET_VREG r2, r0 @ r2<- vA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, r3 @ compare (vA, vB) - blt .L_op_if_ge_not_taken - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - adds r2, rINST, rINST @ convert to bytes, check sign - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] + movlt r1, #2 @ r1<- BYTE branch dist for not-taken + adds r2, r1, r1 @ convert to bytes, check sign FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue - GET_INST_OPCODE ip @ extract opcode from rINST - GOTO_OPCODE ip @ jump to next instruction -.L_op_if_ge_not_taken: - FETCH_ADVANCE_INST 2 @ update rPC, load rINST + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh rIBASE GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else @@ -1730,10 +1643,10 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG r3, r1 @ r3<- vB GET_VREG r2, r0 @ r2<- vA ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, r3 @ compare (vA, vB) - movlt rINST, #2 @ rINST<- BYTE branch dist for not-taken - adds r2, rINST, rINST @ convert to bytes, check sign + movlt r1, #2 @ r1<- BYTE branch dist for not-taken + adds r2, r1, r1 @ convert to bytes, check sign FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -1754,29 +1667,17 @@ artMterpAsmInstructionStart = .L_op_nop * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le */ /* if-cmp vA, vB, +CCCC */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r1, rINST, lsr #12 @ r1<- B ubfx r0, rINST, #8, #4 @ r0<- A GET_VREG r3, r1 @ r3<- vB GET_VREG r2, r0 @ r2<- vA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, r3 @ compare (vA, vB) - ble .L_op_if_gt_not_taken - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - adds r2, rINST, rINST @ convert to bytes, check sign - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] + movle r1, #2 @ r1<- BYTE branch dist for not-taken + adds r2, r1, r1 @ convert to bytes, check sign FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue - GET_INST_OPCODE ip @ extract opcode from rINST - GOTO_OPCODE ip @ jump to next instruction -.L_op_if_gt_not_taken: - FETCH_ADVANCE_INST 2 @ update rPC, load rINST + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh rIBASE GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else @@ -1785,10 +1686,10 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG r3, r1 @ r3<- vB GET_VREG r2, r0 @ r2<- vA ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, r3 @ compare (vA, vB) - movle rINST, #2 @ rINST<- BYTE branch dist for not-taken - adds r2, rINST, rINST @ convert to bytes, check sign + movle r1, #2 @ r1<- BYTE branch dist for not-taken + adds r2, r1, r1 @ convert to bytes, check sign FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -1809,29 +1710,17 @@ artMterpAsmInstructionStart = .L_op_nop * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le */ /* if-cmp vA, vB, +CCCC */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r1, rINST, lsr #12 @ r1<- B ubfx r0, rINST, #8, #4 @ r0<- A GET_VREG r3, r1 @ r3<- vB GET_VREG r2, r0 @ r2<- vA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, r3 @ compare (vA, vB) - bgt .L_op_if_le_not_taken - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - adds r2, rINST, rINST @ convert to bytes, check sign - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] + movgt r1, #2 @ r1<- BYTE branch dist for not-taken + adds r2, r1, r1 @ convert to bytes, check sign FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue - GET_INST_OPCODE ip @ extract opcode from rINST - GOTO_OPCODE ip @ jump to next instruction -.L_op_if_le_not_taken: - FETCH_ADVANCE_INST 2 @ update rPC, load rINST + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh rIBASE GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else @@ -1840,10 +1729,10 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG r3, r1 @ r3<- vB GET_VREG r2, r0 @ r2<- vA ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, r3 @ compare (vA, vB) - movgt rINST, #2 @ rINST<- BYTE branch dist for not-taken - adds r2, rINST, rINST @ convert to bytes, check sign + movgt r1, #2 @ r1<- BYTE branch dist for not-taken + adds r2, r1, r1 @ convert to bytes, check sign FETCH_ADVANCE_INST_RB r2 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -1864,37 +1753,25 @@ artMterpAsmInstructionStart = .L_op_nop * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez */ /* if-cmp vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r0, rINST, lsr #8 @ r0<- AA GET_VREG r2, r0 @ r2<- vAA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, #0 @ compare (vA, 0) - bne .L_op_if_eqz_not_taken - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - adds r1, rINST, rINST @ convert to bytes & set flags + movne r1, #2 @ r1<- inst branch dist for not-taken + adds r1, r1, r1 @ convert to bytes & set flags FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue - GET_INST_OPCODE ip @ extract opcode from rINST - GOTO_OPCODE ip @ jump to next instruction -.L_op_if_eqz_not_taken: - FETCH_ADVANCE_INST 2 @ update rPC, load rINST + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh table base GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else mov r0, rINST, lsr #8 @ r0<- AA GET_VREG r2, r0 @ r2<- vAA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] cmp r2, #0 @ compare (vA, 0) - movne rINST, #2 @ rINST<- inst branch dist for not-taken - adds r1, rINST, rINST @ convert to bytes & set flags + movne r1, #2 @ r1<- inst branch dist for not-taken + adds r1, r1, r1 @ convert to bytes & set flags FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -1915,37 +1792,25 @@ artMterpAsmInstructionStart = .L_op_nop * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez */ /* if-cmp vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r0, rINST, lsr #8 @ r0<- AA GET_VREG r2, r0 @ r2<- vAA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, #0 @ compare (vA, 0) - beq .L_op_if_nez_not_taken - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - adds r1, rINST, rINST @ convert to bytes & set flags + moveq r1, #2 @ r1<- inst branch dist for not-taken + adds r1, r1, r1 @ convert to bytes & set flags FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue - GET_INST_OPCODE ip @ extract opcode from rINST - GOTO_OPCODE ip @ jump to next instruction -.L_op_if_nez_not_taken: - FETCH_ADVANCE_INST 2 @ update rPC, load rINST + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh table base GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else mov r0, rINST, lsr #8 @ r0<- AA GET_VREG r2, r0 @ r2<- vAA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] cmp r2, #0 @ compare (vA, 0) - moveq rINST, #2 @ rINST<- inst branch dist for not-taken - adds r1, rINST, rINST @ convert to bytes & set flags + moveq r1, #2 @ r1<- inst branch dist for not-taken + adds r1, r1, r1 @ convert to bytes & set flags FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -1966,37 +1831,25 @@ artMterpAsmInstructionStart = .L_op_nop * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez */ /* if-cmp vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r0, rINST, lsr #8 @ r0<- AA GET_VREG r2, r0 @ r2<- vAA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, #0 @ compare (vA, 0) - bge .L_op_if_ltz_not_taken - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - adds r1, rINST, rINST @ convert to bytes & set flags + movge r1, #2 @ r1<- inst branch dist for not-taken + adds r1, r1, r1 @ convert to bytes & set flags FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue - GET_INST_OPCODE ip @ extract opcode from rINST - GOTO_OPCODE ip @ jump to next instruction -.L_op_if_ltz_not_taken: - FETCH_ADVANCE_INST 2 @ update rPC, load rINST + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh table base GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else mov r0, rINST, lsr #8 @ r0<- AA GET_VREG r2, r0 @ r2<- vAA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] cmp r2, #0 @ compare (vA, 0) - movge rINST, #2 @ rINST<- inst branch dist for not-taken - adds r1, rINST, rINST @ convert to bytes & set flags + movge r1, #2 @ r1<- inst branch dist for not-taken + adds r1, r1, r1 @ convert to bytes & set flags FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -2017,37 +1870,25 @@ artMterpAsmInstructionStart = .L_op_nop * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez */ /* if-cmp vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r0, rINST, lsr #8 @ r0<- AA GET_VREG r2, r0 @ r2<- vAA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, #0 @ compare (vA, 0) - blt .L_op_if_gez_not_taken - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - adds r1, rINST, rINST @ convert to bytes & set flags + movlt r1, #2 @ r1<- inst branch dist for not-taken + adds r1, r1, r1 @ convert to bytes & set flags FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue - GET_INST_OPCODE ip @ extract opcode from rINST - GOTO_OPCODE ip @ jump to next instruction -.L_op_if_gez_not_taken: - FETCH_ADVANCE_INST 2 @ update rPC, load rINST + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh table base GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else mov r0, rINST, lsr #8 @ r0<- AA GET_VREG r2, r0 @ r2<- vAA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] cmp r2, #0 @ compare (vA, 0) - movlt rINST, #2 @ rINST<- inst branch dist for not-taken - adds r1, rINST, rINST @ convert to bytes & set flags + movlt r1, #2 @ r1<- inst branch dist for not-taken + adds r1, r1, r1 @ convert to bytes & set flags FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -2068,37 +1909,25 @@ artMterpAsmInstructionStart = .L_op_nop * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez */ /* if-cmp vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r0, rINST, lsr #8 @ r0<- AA GET_VREG r2, r0 @ r2<- vAA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, #0 @ compare (vA, 0) - ble .L_op_if_gtz_not_taken - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - adds r1, rINST, rINST @ convert to bytes & set flags + movle r1, #2 @ r1<- inst branch dist for not-taken + adds r1, r1, r1 @ convert to bytes & set flags FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue - GET_INST_OPCODE ip @ extract opcode from rINST - GOTO_OPCODE ip @ jump to next instruction -.L_op_if_gtz_not_taken: - FETCH_ADVANCE_INST 2 @ update rPC, load rINST + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh table base GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else mov r0, rINST, lsr #8 @ r0<- AA GET_VREG r2, r0 @ r2<- vAA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] cmp r2, #0 @ compare (vA, 0) - movle rINST, #2 @ rINST<- inst branch dist for not-taken - adds r1, rINST, rINST @ convert to bytes & set flags + movle r1, #2 @ r1<- inst branch dist for not-taken + adds r1, r1, r1 @ convert to bytes & set flags FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -2119,37 +1948,25 @@ artMterpAsmInstructionStart = .L_op_nop * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez */ /* if-cmp vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES +#if MTERP_SUSPEND mov r0, rINST, lsr #8 @ r0<- AA GET_VREG r2, r0 @ r2<- vAA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units - ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] + FETCH_S r1, 1 @ r1<- branch offset, in code units cmp r2, #0 @ compare (vA, 0) - bgt .L_op_if_lez_not_taken - EXPORT_PC - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpProfileBranch @ (self, shadow_frame, offset) - cmp r0, #0 - bne MterpOnStackReplacement @ Note: offset must be in rINST - adds r1, rINST, rINST @ convert to bytes & set flags + movgt r1, #2 @ r1<- inst branch dist for not-taken + adds r1, r1, r1 @ convert to bytes & set flags FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST - bmi MterpCheckSuspendAndContinue - GET_INST_OPCODE ip @ extract opcode from rINST - GOTO_OPCODE ip @ jump to next instruction -.L_op_if_lez_not_taken: - FETCH_ADVANCE_INST 2 @ update rPC, load rINST + ldrmi rIBASE, [rSELF, #THREAD_CURRENT_IBASE_OFFSET] @ refresh table base GET_INST_OPCODE ip @ extract opcode from rINST GOTO_OPCODE ip @ jump to next instruction #else mov r0, rINST, lsr #8 @ r0<- AA GET_VREG r2, r0 @ r2<- vAA - FETCH_S rINST, 1 @ rINST<- branch offset, in code units + FETCH_S r1, 1 @ r1<- branch offset, in code units ldr lr, [rSELF, #THREAD_FLAGS_OFFSET] cmp r2, #0 @ compare (vA, 0) - movgt rINST, #2 @ rINST<- inst branch dist for not-taken - adds r1, rINST, rINST @ convert to bytes & set flags + movgt r1, #2 @ r1<- inst branch dist for not-taken + adds r1, r1, r1 @ convert to bytes & set flags FETCH_ADVANCE_INST_RB r1 @ update rPC, load rINST bmi MterpCheckSuspendAndContinue GET_INST_OPCODE ip @ extract opcode from rINST @@ -12281,6 +12098,7 @@ artMterpAsmAltInstructionEnd: * has not yet been thrown. Just bail out to the reference interpreter to deal with it. * TUNING: for consistency, we may want to just go ahead and handle these here. */ +#define MTERP_LOGGING 0 common_errDivideByZero: EXPORT_PC #if MTERP_LOGGING @@ -12392,18 +12210,6 @@ MterpCheckSuspendAndContinue: GOTO_OPCODE ip @ jump to next instruction /* - * On-stack replacement pending. - * Branch offset in rINST on entry. - */ -MterpOnStackReplacement: -#if MTERP_LOGGING - mov r0, rSELF - add r1, rFP, #OFF_FP_SHADOWFRAME - mov r2, rINST - bl MterpLogOSR -#endif - b MterpFallback @ Let the reference interpreter deal with it. -/* * Bail out to reference interpreter. */ MterpFallback: diff --git a/runtime/interpreter/mterp/out/mterp_arm64.S b/runtime/interpreter/mterp/out/mterp_arm64.S index 66598ccc07..e9d28abf8b 100644 --- a/runtime/interpreter/mterp/out/mterp_arm64.S +++ b/runtime/interpreter/mterp/out/mterp_arm64.S @@ -94,9 +94,6 @@ codes. */ #include "asm_support.h" -#define MTERP_PROFILE_BRANCHES 1 -#define MTERP_LOGGING 0 - /* During bringup, we'll use the shadow frame model instead of xFP */ /* single-purpose registers, given names for clarity */ #define xPC x20 @@ -124,6 +121,14 @@ codes. #define OFF_FP_SHADOWFRAME (-SHADOWFRAME_VREGS_OFFSET) /* + * + * The reference interpreter performs explicit suspect checks, which is somewhat wasteful. + * Dalvik's interpreter folded suspend checks into the jump table mechanism, and eventually + * mterp should do so as well. + */ +#define MTERP_SUSPEND 0 + +/* * "export" the PC to dex_pc field in the shadow frame, f/b/o future exception objects. Must * be done *before* something throws. * @@ -1082,23 +1087,26 @@ artMterpAsmInstructionStart = .L_op_nop */ /* goto +AA */ /* tuning: use sbfx for 6t2+ targets */ - lsl w0, wINST, #16 // w0<- AAxx0000 - asr wINST, w0, #24 // wINST<- ssssssAA (sign-extended) -#if MTERP_PROFILE_BRANCHES - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in wINST -#endif +#if MTERP_SUSPEND + mov w0, wINST, lsl #16 // w0<- AAxx0000 + movs w1, w0, asr #24 // w1<- ssssssAA (sign-extended) + add w2, w1, w1 // w2<- byte offset, set flags + // If backwards branch refresh rIBASE + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh handler base + FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST + GET_INST_OPCODE ip // extract opcode from wINST + GOTO_OPCODE ip // jump to next instruction +#else ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] // Preload flags for MterpCheckSuspendAndContinue - adds w1, wINST, wINST // Convert dalvik offset to byte offset, setting flags + lsl w0, wINST, #16 // w0<- AAxx0000 + asr w0, w0, #24 // w0<- ssssssAA (sign-extended) + adds w1, w0, w0 // Convert dalvik offset to byte offset, setting flags FETCH_ADVANCE_INST_RB w1 // load wINST and advance xPC // If backwards branch refresh rIBASE b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction +#endif /* ------------------------------ */ .balign 128 @@ -1111,21 +1119,22 @@ artMterpAsmInstructionStart = .L_op_nop * double to get a byte offset. */ /* goto/16 +AAAA */ - FETCH_S wINST, 1 // wINST<- ssssAAAA (sign-extended) -#if MTERP_PROFILE_BRANCHES - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in xINST -#endif +#if MTERP_SUSPEND + FETCH_S w0, 1 // w0<- ssssAAAA (sign-extended) + adds w1, w0, w0 // w1<- byte offset, flags set + FETCH_ADVANCE_INST_RB w1 // update rPC, load rINST + ldrmi xIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh handler base + GET_INST_OPCODE ip // extract opcode from rINST + GOTO_OPCODE ip // jump to next instruction +#else + FETCH_S w0, 1 // w0<- ssssAAAA (sign-extended) ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w1, wINST, wINST // w1<- byte offset, flags set + adds w1, w0, w0 // w1<- byte offset, flags set FETCH_ADVANCE_INST_RB w1 // update rPC, load rINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from rINST GOTO_OPCODE ip // jump to next instruction +#endif /* ------------------------------ */ .balign 128 @@ -1143,23 +1152,26 @@ artMterpAsmInstructionStart = .L_op_nop * offset to byte offset. */ /* goto/32 +AAAAAAAA */ +#if MTERP_SUSPEND + FETCH w0, 1 // w0<- aaaa (lo) + FETCH w1, 2 // w1<- AAAA (hi) + orr w0, w0, w1, lsl #16 // w0<- AAAAaaaa + adds w1, w0, w0 // w1<- byte offset + FETCH_ADVANCE_INST_RB w1 // update rPC, load xINST + ldrle xIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh handler base + GET_INST_OPCODE ip // extract opcode from xINST + GOTO_OPCODE ip // jump to next instruction +#else FETCH w0, 1 // w0<- aaaa (lo) FETCH w1, 2 // w1<- AAAA (hi) - orr wINST, w0, w1, lsl #16 // wINST<- AAAAaaaa -#if MTERP_PROFILE_BRANCHES - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in xINST -#endif ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w1, wINST, wINST // w1<- byte offset + orr w0, w0, w1, lsl #16 // w0<- AAAAaaaa + adds w1, w0, w0 // w1<- byte offset FETCH_ADVANCE_INST_RB w1 // update rPC, load xINST b.le MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from xINST GOTO_OPCODE ip // jump to next instruction +#endif /* ------------------------------ */ .balign 128 @@ -1175,6 +1187,20 @@ artMterpAsmInstructionStart = .L_op_nop * for: packed-switch, sparse-switch */ /* op vAA, +BBBB */ +#if MTERP_SUSPEND + FETCH w0, 1 // w0<- bbbb (lo) + FETCH w1, 2 // w1<- BBBB (hi) + mov w3, wINST, lsr #8 // w3<- AA + orr w0, w0, w1, lsl #16 // w0<- BBBBbbbb + GET_VREG w1, w3 // w1<- vAA + add w0, rPC, w0, lsl #1 // w0<- PC + BBBBbbbb*2 + bl MterpDoPackedSwitch // w0<- code-unit branch offset + adds w1, w0, w0 // w1<- byte offset; clear V + ldrle rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh handler base + FETCH_ADVANCE_INST_RB w1 // update rPC, load wINST + GET_INST_OPCODE ip // extract opcode from wINST + GOTO_OPCODE ip // jump to next instruction +#else FETCH w0, 1 // w0<- bbbb (lo) FETCH w1, 2 // w1<- BBBB (hi) lsr w3, wINST, #8 // w3<- AA @@ -1182,21 +1208,13 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG w1, w3 // w1<- vAA add x0, xPC, w0, lsl #1 // w0<- PC + BBBBbbbb*2 bl MterpDoPackedSwitch // w0<- code-unit branch offset - sbfm xINST, x0, 0, 31 -#if MTERP_PROFILE_BRANCHES - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - mov x2, xINST - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement -#endif ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w1, wINST, wINST // w1<- byte offset; clear V + adds w1, w0, w0 // w1<- byte offset; clear V FETCH_ADVANCE_INST_RB w1 // update rPC, load wINST b.le MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction +#endif /* ------------------------------ */ .balign 128 @@ -1213,6 +1231,20 @@ artMterpAsmInstructionStart = .L_op_nop * for: packed-switch, sparse-switch */ /* op vAA, +BBBB */ +#if MTERP_SUSPEND + FETCH w0, 1 // w0<- bbbb (lo) + FETCH w1, 2 // w1<- BBBB (hi) + mov w3, wINST, lsr #8 // w3<- AA + orr w0, w0, w1, lsl #16 // w0<- BBBBbbbb + GET_VREG w1, w3 // w1<- vAA + add w0, rPC, w0, lsl #1 // w0<- PC + BBBBbbbb*2 + bl MterpDoSparseSwitch // w0<- code-unit branch offset + adds w1, w0, w0 // w1<- byte offset; clear V + ldrle rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh handler base + FETCH_ADVANCE_INST_RB w1 // update rPC, load wINST + GET_INST_OPCODE ip // extract opcode from wINST + GOTO_OPCODE ip // jump to next instruction +#else FETCH w0, 1 // w0<- bbbb (lo) FETCH w1, 2 // w1<- BBBB (hi) lsr w3, wINST, #8 // w3<- AA @@ -1220,21 +1252,13 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG w1, w3 // w1<- vAA add x0, xPC, w0, lsl #1 // w0<- PC + BBBBbbbb*2 bl MterpDoSparseSwitch // w0<- code-unit branch offset - sbfm xINST, x0, 0, 31 -#if MTERP_PROFILE_BRANCHES - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - mov x2, xINST - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement -#endif ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w1, wINST, wINST // w1<- byte offset; clear V + adds w1, w0, w0 // w1<- byte offset; clear V FETCH_ADVANCE_INST_RB w1 // update rPC, load wINST b.le MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction +#endif /* ------------------------------ */ @@ -1372,28 +1396,17 @@ artMterpAsmInstructionStart = .L_op_nop * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le */ /* if-cmp vA, vB, +CCCC */ -#if MTERP_PROFILE_BRANCHES - lsr w1, wINST, #12 // w1<- B +#if MTERP_SUSPEND + mov w1, wINST, lsr #12 // w1<- B ubfx w0, wINST, #8, #4 // w0<- A GET_VREG w3, w1 // w3<- vB GET_VREG w2, w0 // w2<- vA - FETCH_S wINST, 1 // wINST<- branch offset, in code units + FETCH_S w1, 1 // w1<- branch offset, in code units cmp w2, w3 // compare (vA, vB) - b.eq .L_op_if_eq_taken - FETCH_ADVANCE_INST 2 // update rPC, load wINST - GET_INST_OPCODE ip // extract opcode from wINST - GOTO_OPCODE ip // jump to next instruction -.L_op_if_eq_taken: - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 // Sign extend branch offset - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in xINST - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes, check sign + moveq w1, #2 // w1<- BYTE branch dist for not-taken + adds w2, w1, w1 // convert to bytes, check sign FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST - b.mi MterpCheckSuspendAndContinue + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh rIBASE GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction #else @@ -1402,11 +1415,11 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG w3, w1 // w3<- vB GET_VREG w2, w0 // w2<- vA FETCH_S w1, 1 // w1<- branch offset, in code units + ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] mov w0, #2 // Offset if branch not taken cmp w2, w3 // compare (vA, vB) - csel wINST, w1, w0, eq // Branch if true, stashing result in callee save reg. - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes, check sign + csel w1, w1, w0, eq // Branch if true + adds w2, w1, w1 // convert to bytes, check sign FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST @@ -1427,28 +1440,17 @@ artMterpAsmInstructionStart = .L_op_nop * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le */ /* if-cmp vA, vB, +CCCC */ -#if MTERP_PROFILE_BRANCHES - lsr w1, wINST, #12 // w1<- B +#if MTERP_SUSPEND + mov w1, wINST, lsr #12 // w1<- B ubfx w0, wINST, #8, #4 // w0<- A GET_VREG w3, w1 // w3<- vB GET_VREG w2, w0 // w2<- vA - FETCH_S wINST, 1 // wINST<- branch offset, in code units + FETCH_S w1, 1 // w1<- branch offset, in code units cmp w2, w3 // compare (vA, vB) - b.ne .L_op_if_ne_taken - FETCH_ADVANCE_INST 2 // update rPC, load wINST - GET_INST_OPCODE ip // extract opcode from wINST - GOTO_OPCODE ip // jump to next instruction -.L_op_if_ne_taken: - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 // Sign extend branch offset - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in xINST - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes, check sign + movne w1, #2 // w1<- BYTE branch dist for not-taken + adds w2, w1, w1 // convert to bytes, check sign FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST - b.mi MterpCheckSuspendAndContinue + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh rIBASE GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction #else @@ -1457,11 +1459,11 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG w3, w1 // w3<- vB GET_VREG w2, w0 // w2<- vA FETCH_S w1, 1 // w1<- branch offset, in code units + ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] mov w0, #2 // Offset if branch not taken cmp w2, w3 // compare (vA, vB) - csel wINST, w1, w0, ne // Branch if true, stashing result in callee save reg. - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes, check sign + csel w1, w1, w0, ne // Branch if true + adds w2, w1, w1 // convert to bytes, check sign FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST @@ -1482,28 +1484,17 @@ artMterpAsmInstructionStart = .L_op_nop * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le */ /* if-cmp vA, vB, +CCCC */ -#if MTERP_PROFILE_BRANCHES - lsr w1, wINST, #12 // w1<- B +#if MTERP_SUSPEND + mov w1, wINST, lsr #12 // w1<- B ubfx w0, wINST, #8, #4 // w0<- A GET_VREG w3, w1 // w3<- vB GET_VREG w2, w0 // w2<- vA - FETCH_S wINST, 1 // wINST<- branch offset, in code units + FETCH_S w1, 1 // w1<- branch offset, in code units cmp w2, w3 // compare (vA, vB) - b.lt .L_op_if_lt_taken - FETCH_ADVANCE_INST 2 // update rPC, load wINST - GET_INST_OPCODE ip // extract opcode from wINST - GOTO_OPCODE ip // jump to next instruction -.L_op_if_lt_taken: - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 // Sign extend branch offset - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in xINST - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes, check sign + movlt w1, #2 // w1<- BYTE branch dist for not-taken + adds w2, w1, w1 // convert to bytes, check sign FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST - b.mi MterpCheckSuspendAndContinue + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh rIBASE GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction #else @@ -1512,11 +1503,11 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG w3, w1 // w3<- vB GET_VREG w2, w0 // w2<- vA FETCH_S w1, 1 // w1<- branch offset, in code units + ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] mov w0, #2 // Offset if branch not taken cmp w2, w3 // compare (vA, vB) - csel wINST, w1, w0, lt // Branch if true, stashing result in callee save reg. - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes, check sign + csel w1, w1, w0, lt // Branch if true + adds w2, w1, w1 // convert to bytes, check sign FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST @@ -1537,28 +1528,17 @@ artMterpAsmInstructionStart = .L_op_nop * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le */ /* if-cmp vA, vB, +CCCC */ -#if MTERP_PROFILE_BRANCHES - lsr w1, wINST, #12 // w1<- B +#if MTERP_SUSPEND + mov w1, wINST, lsr #12 // w1<- B ubfx w0, wINST, #8, #4 // w0<- A GET_VREG w3, w1 // w3<- vB GET_VREG w2, w0 // w2<- vA - FETCH_S wINST, 1 // wINST<- branch offset, in code units + FETCH_S w1, 1 // w1<- branch offset, in code units cmp w2, w3 // compare (vA, vB) - b.ge .L_op_if_ge_taken - FETCH_ADVANCE_INST 2 // update rPC, load wINST - GET_INST_OPCODE ip // extract opcode from wINST - GOTO_OPCODE ip // jump to next instruction -.L_op_if_ge_taken: - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 // Sign extend branch offset - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in xINST - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes, check sign + movge w1, #2 // w1<- BYTE branch dist for not-taken + adds w2, w1, w1 // convert to bytes, check sign FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST - b.mi MterpCheckSuspendAndContinue + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh rIBASE GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction #else @@ -1567,11 +1547,11 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG w3, w1 // w3<- vB GET_VREG w2, w0 // w2<- vA FETCH_S w1, 1 // w1<- branch offset, in code units + ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] mov w0, #2 // Offset if branch not taken cmp w2, w3 // compare (vA, vB) - csel wINST, w1, w0, ge // Branch if true, stashing result in callee save reg. - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes, check sign + csel w1, w1, w0, ge // Branch if true + adds w2, w1, w1 // convert to bytes, check sign FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST @@ -1592,28 +1572,17 @@ artMterpAsmInstructionStart = .L_op_nop * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le */ /* if-cmp vA, vB, +CCCC */ -#if MTERP_PROFILE_BRANCHES - lsr w1, wINST, #12 // w1<- B +#if MTERP_SUSPEND + mov w1, wINST, lsr #12 // w1<- B ubfx w0, wINST, #8, #4 // w0<- A GET_VREG w3, w1 // w3<- vB GET_VREG w2, w0 // w2<- vA - FETCH_S wINST, 1 // wINST<- branch offset, in code units + FETCH_S w1, 1 // w1<- branch offset, in code units cmp w2, w3 // compare (vA, vB) - b.gt .L_op_if_gt_taken - FETCH_ADVANCE_INST 2 // update rPC, load wINST - GET_INST_OPCODE ip // extract opcode from wINST - GOTO_OPCODE ip // jump to next instruction -.L_op_if_gt_taken: - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 // Sign extend branch offset - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in xINST - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes, check sign + movgt w1, #2 // w1<- BYTE branch dist for not-taken + adds w2, w1, w1 // convert to bytes, check sign FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST - b.mi MterpCheckSuspendAndContinue + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh rIBASE GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction #else @@ -1622,11 +1591,11 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG w3, w1 // w3<- vB GET_VREG w2, w0 // w2<- vA FETCH_S w1, 1 // w1<- branch offset, in code units + ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] mov w0, #2 // Offset if branch not taken cmp w2, w3 // compare (vA, vB) - csel wINST, w1, w0, gt // Branch if true, stashing result in callee save reg. - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes, check sign + csel w1, w1, w0, gt // Branch if true + adds w2, w1, w1 // convert to bytes, check sign FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST @@ -1647,28 +1616,17 @@ artMterpAsmInstructionStart = .L_op_nop * For: if-eq, if-ne, if-lt, if-ge, if-gt, if-le */ /* if-cmp vA, vB, +CCCC */ -#if MTERP_PROFILE_BRANCHES - lsr w1, wINST, #12 // w1<- B +#if MTERP_SUSPEND + mov w1, wINST, lsr #12 // w1<- B ubfx w0, wINST, #8, #4 // w0<- A GET_VREG w3, w1 // w3<- vB GET_VREG w2, w0 // w2<- vA - FETCH_S wINST, 1 // wINST<- branch offset, in code units + FETCH_S w1, 1 // w1<- branch offset, in code units cmp w2, w3 // compare (vA, vB) - b.le .L_op_if_le_taken - FETCH_ADVANCE_INST 2 // update rPC, load wINST - GET_INST_OPCODE ip // extract opcode from wINST - GOTO_OPCODE ip // jump to next instruction -.L_op_if_le_taken: - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 // Sign extend branch offset - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in xINST - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes, check sign + movle w1, #2 // w1<- BYTE branch dist for not-taken + adds w2, w1, w1 // convert to bytes, check sign FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST - b.mi MterpCheckSuspendAndContinue + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh rIBASE GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction #else @@ -1677,11 +1635,11 @@ artMterpAsmInstructionStart = .L_op_nop GET_VREG w3, w1 // w3<- vB GET_VREG w2, w0 // w2<- vA FETCH_S w1, 1 // w1<- branch offset, in code units + ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] mov w0, #2 // Offset if branch not taken cmp w2, w3 // compare (vA, vB) - csel wINST, w1, w0, le // Branch if true, stashing result in callee save reg. - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes, check sign + csel w1, w1, w0, le // Branch if true + adds w2, w1, w1 // convert to bytes, check sign FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST @@ -1702,37 +1660,26 @@ artMterpAsmInstructionStart = .L_op_nop * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez */ /* if-cmp vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES - lsr w0, wINST, #8 // w0<- AA +#if MTERP_SUSPEND + mov w0, wINST, lsr #8 // w0<- AA GET_VREG w2, w0 // w2<- vAA - FETCH_S wINST, 1 // w1<- branch offset, in code units + FETCH_S w1, 1 // w1<- branch offset, in code units cmp w2, #0 // compare (vA, 0) - b.eq .L_op_if_eqz_taken - FETCH_ADVANCE_INST 2 // update rPC, load wINST - GET_INST_OPCODE ip // extract opcode from wINST - GOTO_OPCODE ip // jump to next instruction -.L_op_if_eqz_taken: - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in wINST - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes & set flags - FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST - b.mi MterpCheckSuspendAndContinue + moveq w1, #2 // w1<- inst branch dist for not-taken + adds w1, w1, w1 // convert to bytes & set flags + FETCH_ADVANCE_INST_RB w1 // update rPC, load wINST + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh table base GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction #else lsr w0, wINST, #8 // w0<- AA GET_VREG w2, w0 // w2<- vAA FETCH_S w1, 1 // w1<- branch offset, in code units + ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] mov w0, #2 // Branch offset if not taken cmp w2, #0 // compare (vA, 0) - csel wINST, w1, w0, eq // Branch if true, stashing result in callee save reg - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes & set flags + csel w1, w1, w0, eq // Branch if true + adds w2, w1, w1 // convert to bytes & set flags FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST @@ -1753,37 +1700,26 @@ artMterpAsmInstructionStart = .L_op_nop * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez */ /* if-cmp vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES - lsr w0, wINST, #8 // w0<- AA +#if MTERP_SUSPEND + mov w0, wINST, lsr #8 // w0<- AA GET_VREG w2, w0 // w2<- vAA - FETCH_S wINST, 1 // w1<- branch offset, in code units + FETCH_S w1, 1 // w1<- branch offset, in code units cmp w2, #0 // compare (vA, 0) - b.ne .L_op_if_nez_taken - FETCH_ADVANCE_INST 2 // update rPC, load wINST - GET_INST_OPCODE ip // extract opcode from wINST - GOTO_OPCODE ip // jump to next instruction -.L_op_if_nez_taken: - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in wINST - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes & set flags - FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST - b.mi MterpCheckSuspendAndContinue + movne w1, #2 // w1<- inst branch dist for not-taken + adds w1, w1, w1 // convert to bytes & set flags + FETCH_ADVANCE_INST_RB w1 // update rPC, load wINST + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh table base GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction #else lsr w0, wINST, #8 // w0<- AA GET_VREG w2, w0 // w2<- vAA FETCH_S w1, 1 // w1<- branch offset, in code units + ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] mov w0, #2 // Branch offset if not taken cmp w2, #0 // compare (vA, 0) - csel wINST, w1, w0, ne // Branch if true, stashing result in callee save reg - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes & set flags + csel w1, w1, w0, ne // Branch if true + adds w2, w1, w1 // convert to bytes & set flags FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST @@ -1804,37 +1740,26 @@ artMterpAsmInstructionStart = .L_op_nop * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez */ /* if-cmp vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES - lsr w0, wINST, #8 // w0<- AA +#if MTERP_SUSPEND + mov w0, wINST, lsr #8 // w0<- AA GET_VREG w2, w0 // w2<- vAA - FETCH_S wINST, 1 // w1<- branch offset, in code units + FETCH_S w1, 1 // w1<- branch offset, in code units cmp w2, #0 // compare (vA, 0) - b.lt .L_op_if_ltz_taken - FETCH_ADVANCE_INST 2 // update rPC, load wINST - GET_INST_OPCODE ip // extract opcode from wINST - GOTO_OPCODE ip // jump to next instruction -.L_op_if_ltz_taken: - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in wINST - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes & set flags - FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST - b.mi MterpCheckSuspendAndContinue + movlt w1, #2 // w1<- inst branch dist for not-taken + adds w1, w1, w1 // convert to bytes & set flags + FETCH_ADVANCE_INST_RB w1 // update rPC, load wINST + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh table base GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction #else lsr w0, wINST, #8 // w0<- AA GET_VREG w2, w0 // w2<- vAA FETCH_S w1, 1 // w1<- branch offset, in code units + ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] mov w0, #2 // Branch offset if not taken cmp w2, #0 // compare (vA, 0) - csel wINST, w1, w0, lt // Branch if true, stashing result in callee save reg - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes & set flags + csel w1, w1, w0, lt // Branch if true + adds w2, w1, w1 // convert to bytes & set flags FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST @@ -1855,37 +1780,26 @@ artMterpAsmInstructionStart = .L_op_nop * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez */ /* if-cmp vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES - lsr w0, wINST, #8 // w0<- AA +#if MTERP_SUSPEND + mov w0, wINST, lsr #8 // w0<- AA GET_VREG w2, w0 // w2<- vAA - FETCH_S wINST, 1 // w1<- branch offset, in code units + FETCH_S w1, 1 // w1<- branch offset, in code units cmp w2, #0 // compare (vA, 0) - b.ge .L_op_if_gez_taken - FETCH_ADVANCE_INST 2 // update rPC, load wINST - GET_INST_OPCODE ip // extract opcode from wINST - GOTO_OPCODE ip // jump to next instruction -.L_op_if_gez_taken: - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in wINST - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes & set flags - FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST - b.mi MterpCheckSuspendAndContinue + movge w1, #2 // w1<- inst branch dist for not-taken + adds w1, w1, w1 // convert to bytes & set flags + FETCH_ADVANCE_INST_RB w1 // update rPC, load wINST + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh table base GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction #else lsr w0, wINST, #8 // w0<- AA GET_VREG w2, w0 // w2<- vAA FETCH_S w1, 1 // w1<- branch offset, in code units + ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] mov w0, #2 // Branch offset if not taken cmp w2, #0 // compare (vA, 0) - csel wINST, w1, w0, ge // Branch if true, stashing result in callee save reg - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes & set flags + csel w1, w1, w0, ge // Branch if true + adds w2, w1, w1 // convert to bytes & set flags FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST @@ -1906,37 +1820,26 @@ artMterpAsmInstructionStart = .L_op_nop * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez */ /* if-cmp vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES - lsr w0, wINST, #8 // w0<- AA +#if MTERP_SUSPEND + mov w0, wINST, lsr #8 // w0<- AA GET_VREG w2, w0 // w2<- vAA - FETCH_S wINST, 1 // w1<- branch offset, in code units + FETCH_S w1, 1 // w1<- branch offset, in code units cmp w2, #0 // compare (vA, 0) - b.gt .L_op_if_gtz_taken - FETCH_ADVANCE_INST 2 // update rPC, load wINST - GET_INST_OPCODE ip // extract opcode from wINST - GOTO_OPCODE ip // jump to next instruction -.L_op_if_gtz_taken: - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in wINST - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes & set flags - FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST - b.mi MterpCheckSuspendAndContinue + movgt w1, #2 // w1<- inst branch dist for not-taken + adds w1, w1, w1 // convert to bytes & set flags + FETCH_ADVANCE_INST_RB w1 // update rPC, load wINST + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh table base GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction #else lsr w0, wINST, #8 // w0<- AA GET_VREG w2, w0 // w2<- vAA FETCH_S w1, 1 // w1<- branch offset, in code units + ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] mov w0, #2 // Branch offset if not taken cmp w2, #0 // compare (vA, 0) - csel wINST, w1, w0, gt // Branch if true, stashing result in callee save reg - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes & set flags + csel w1, w1, w0, gt // Branch if true + adds w2, w1, w1 // convert to bytes & set flags FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST @@ -1957,37 +1860,26 @@ artMterpAsmInstructionStart = .L_op_nop * for: if-eqz, if-nez, if-ltz, if-gez, if-gtz, if-lez */ /* if-cmp vAA, +BBBB */ -#if MTERP_PROFILE_BRANCHES - lsr w0, wINST, #8 // w0<- AA +#if MTERP_SUSPEND + mov w0, wINST, lsr #8 // w0<- AA GET_VREG w2, w0 // w2<- vAA - FETCH_S wINST, 1 // w1<- branch offset, in code units + FETCH_S w1, 1 // w1<- branch offset, in code units cmp w2, #0 // compare (vA, 0) - b.le .L_op_if_lez_taken - FETCH_ADVANCE_INST 2 // update rPC, load wINST - GET_INST_OPCODE ip // extract opcode from wINST - GOTO_OPCODE ip // jump to next instruction -.L_op_if_lez_taken: - EXPORT_PC - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpProfileBranch // (self, shadow_frame, offset) - cbnz w0, MterpOnStackReplacement // Note: offset must be in wINST - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes & set flags - FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST - b.mi MterpCheckSuspendAndContinue + movle w1, #2 // w1<- inst branch dist for not-taken + adds w1, w1, w1 // convert to bytes & set flags + FETCH_ADVANCE_INST_RB w1 // update rPC, load wINST + ldrmi rIBASE, [xSELF, #THREAD_CURRENT_IBASE_OFFSET] // refresh table base GET_INST_OPCODE ip // extract opcode from wINST GOTO_OPCODE ip // jump to next instruction #else lsr w0, wINST, #8 // w0<- AA GET_VREG w2, w0 // w2<- vAA FETCH_S w1, 1 // w1<- branch offset, in code units + ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] mov w0, #2 // Branch offset if not taken cmp w2, #0 // compare (vA, 0) - csel wINST, w1, w0, le // Branch if true, stashing result in callee save reg - ldr w7, [xSELF, #THREAD_FLAGS_OFFSET] - adds w2, wINST, wINST // convert to bytes & set flags + csel w1, w1, w0, le // Branch if true + adds w2, w1, w1 // convert to bytes & set flags FETCH_ADVANCE_INST_RB w2 // update rPC, load wINST b.mi MterpCheckSuspendAndContinue GET_INST_OPCODE ip // extract opcode from wINST @@ -2509,7 +2401,6 @@ artMterpAsmInstructionStart = .L_op_nop mov x3, xSELF // w3<- self bl artGet32InstanceFromCode ldr x3, [xSELF, #THREAD_EXCEPTION_OFFSET] - ubfx w2, wINST, #8, #4 // w2<- A PREFETCH_INST 2 cbnz x3, MterpPossibleException // bail out @@ -2566,7 +2457,6 @@ artMterpAsmInstructionStart = .L_op_nop mov x3, xSELF // w3<- self bl artGetObjInstanceFromCode ldr x3, [xSELF, #THREAD_EXCEPTION_OFFSET] - ubfx w2, wINST, #8, #4 // w2<- A PREFETCH_INST 2 cbnz x3, MterpPossibleException // bail out @@ -2598,7 +2488,6 @@ artMterpAsmInstructionStart = .L_op_nop mov x3, xSELF // w3<- self bl artGetBooleanInstanceFromCode ldr x3, [xSELF, #THREAD_EXCEPTION_OFFSET] - uxtb w0, w0 ubfx w2, wINST, #8, #4 // w2<- A PREFETCH_INST 2 cbnz x3, MterpPossibleException // bail out @@ -2630,7 +2519,6 @@ artMterpAsmInstructionStart = .L_op_nop mov x3, xSELF // w3<- self bl artGetByteInstanceFromCode ldr x3, [xSELF, #THREAD_EXCEPTION_OFFSET] - sxtb w0, w0 ubfx w2, wINST, #8, #4 // w2<- A PREFETCH_INST 2 cbnz x3, MterpPossibleException // bail out @@ -2662,7 +2550,6 @@ artMterpAsmInstructionStart = .L_op_nop mov x3, xSELF // w3<- self bl artGetCharInstanceFromCode ldr x3, [xSELF, #THREAD_EXCEPTION_OFFSET] - uxth w0, w0 ubfx w2, wINST, #8, #4 // w2<- A PREFETCH_INST 2 cbnz x3, MterpPossibleException // bail out @@ -2694,7 +2581,6 @@ artMterpAsmInstructionStart = .L_op_nop mov x3, xSELF // w3<- self bl artGetShortInstanceFromCode ldr x3, [xSELF, #THREAD_EXCEPTION_OFFSET] - sxth w0, w0 ubfx w2, wINST, #8, #4 // w2<- A PREFETCH_INST 2 cbnz x3, MterpPossibleException // bail out @@ -11679,6 +11565,7 @@ artMterpAsmAltInstructionEnd: * has not yet been thrown. Just bail out to the reference interpreter to deal with it. * TUNING: for consistency, we may want to just go ahead and handle these here. */ +#define MTERP_LOGGING 0 common_errDivideByZero: EXPORT_PC #if MTERP_LOGGING @@ -11792,19 +11679,6 @@ check1: GOTO_OPCODE ip // jump to next instruction /* - * On-stack replacement pending. - * Branch offset in wINST on entry. - */ -MterpOnStackReplacement: -#if MTERP_LOGGING - mov x0, xSELF - add x1, xFP, #OFF_FP_SHADOWFRAME - sbfm x2, xINST, 0, 31 - bl MterpLogOSR -#endif - b MterpFallback // Let the reference interpreter deal with it. - -/* * Bail out to reference interpreter. */ MterpFallback: |