diff options
| -rw-r--r-- | compiler/utils/riscv64/assembler_riscv64.cc | 4 | ||||
| -rw-r--r-- | compiler/utils/riscv64/assembler_riscv64_test.cc | 37 |
2 files changed, 35 insertions, 6 deletions
diff --git a/compiler/utils/riscv64/assembler_riscv64.cc b/compiler/utils/riscv64/assembler_riscv64.cc index c07a714b90..fd714c7594 100644 --- a/compiler/utils/riscv64/assembler_riscv64.cc +++ b/compiler/utils/riscv64/assembler_riscv64.cc @@ -390,18 +390,22 @@ void Riscv64Assembler::Remuw(XRegister rd, XRegister rs1, XRegister rs2) { /////////////////////////////// RV64 "A" Instructions START /////////////////////////////// void Riscv64Assembler::LrW(XRegister rd, XRegister rs1, AqRl aqrl) { + CHECK(aqrl != AqRl::kRelease); EmitR4(0x2, enum_cast<uint32_t>(aqrl), 0x0, rs1, 0x2, rd, 0x2f); } void Riscv64Assembler::LrD(XRegister rd, XRegister rs1, AqRl aqrl) { + CHECK(aqrl != AqRl::kRelease); EmitR4(0x2, enum_cast<uint32_t>(aqrl), 0x0, rs1, 0x3, rd, 0x2f); } void Riscv64Assembler::ScW(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { + CHECK(aqrl != AqRl::kAcquire); EmitR4(0x3, enum_cast<uint32_t>(aqrl), rs2, rs1, 0x2, rd, 0x2f); } void Riscv64Assembler::ScD(XRegister rd, XRegister rs2, XRegister rs1, AqRl aqrl) { + CHECK(aqrl != AqRl::kAcquire); EmitR4(0x3, enum_cast<uint32_t>(aqrl), rs2, rs1, 0x3, rd, 0x2f); } diff --git a/compiler/utils/riscv64/assembler_riscv64_test.cc b/compiler/utils/riscv64/assembler_riscv64_test.cc index bb093d35a7..0299ac25c5 100644 --- a/compiler/utils/riscv64/assembler_riscv64_test.cc +++ b/compiler/utils/riscv64/assembler_riscv64_test.cc @@ -1001,13 +1001,18 @@ class AssemblerRISCV64Test : public AssemblerTest<Riscv64Assembler, fmt); } + template <typename InvalidAqRl> std::string RepeatRRAqRl(void (Riscv64Assembler::*f)(XRegister, XRegister, AqRl), - const std::string& fmt) { + const std::string& fmt, + InvalidAqRl&& invalid_aqrl) { CHECK(f != nullptr); std::string str; for (XRegister reg1 : GetRegisters()) { for (XRegister reg2 : GetRegisters()) { for (AqRl aqrl : kAqRls) { + if (invalid_aqrl(aqrl)) { + continue; + } (GetAssembler()->*f)(reg1, reg2, aqrl); std::string base = fmt; @@ -1022,14 +1027,19 @@ class AssemblerRISCV64Test : public AssemblerTest<Riscv64Assembler, return str; } + template <typename InvalidAqRl> std::string RepeatRRRAqRl(void (Riscv64Assembler::*f)(XRegister, XRegister, XRegister, AqRl), - const std::string& fmt) { + const std::string& fmt, + InvalidAqRl&& invalid_aqrl) { CHECK(f != nullptr); std::string str; for (XRegister reg1 : GetRegisters()) { for (XRegister reg2 : GetRegisters()) { for (XRegister reg3 : GetRegisters()) { for (AqRl aqrl : kAqRls) { + if (invalid_aqrl(aqrl)) { + continue; + } (GetAssembler()->*f)(reg1, reg2, reg3, aqrl); std::string base = fmt; @@ -1046,6 +1056,11 @@ class AssemblerRISCV64Test : public AssemblerTest<Riscv64Assembler, return str; } + std::string RepeatRRRAqRl(void (Riscv64Assembler::*f)(XRegister, XRegister, XRegister, AqRl), + const std::string& fmt) { + return RepeatRRRAqRl(f, fmt, [](AqRl) { return false; }); + } + std::string RepeatCsrrX(void (Riscv64Assembler::*f)(XRegister, uint32_t, XRegister), const std::string& fmt) { CHECK(f != nullptr); @@ -1538,19 +1553,29 @@ TEST_F(AssemblerRISCV64Test, Remuw) { } TEST_F(AssemblerRISCV64Test, LrW) { - DriverStr(RepeatRRAqRl(&Riscv64Assembler::LrW, "lr.w{aqrl} {reg1}, ({reg2})"), "LrW"); + auto invalid_aqrl = [](AqRl aqrl) { return aqrl == AqRl::kRelease; }; + DriverStr(RepeatRRAqRl(&Riscv64Assembler::LrW, "lr.w{aqrl} {reg1}, ({reg2})", invalid_aqrl), + "LrW"); } TEST_F(AssemblerRISCV64Test, LrD) { - DriverStr(RepeatRRAqRl(&Riscv64Assembler::LrD, "lr.d{aqrl} {reg1}, ({reg2})"), "LrD"); + auto invalid_aqrl = [](AqRl aqrl) { return aqrl == AqRl::kRelease; }; + DriverStr(RepeatRRAqRl(&Riscv64Assembler::LrD, "lr.d{aqrl} {reg1}, ({reg2})", invalid_aqrl), + "LrD"); } TEST_F(AssemblerRISCV64Test, ScW) { - DriverStr(RepeatRRRAqRl(&Riscv64Assembler::ScW, "sc.w{aqrl} {reg1}, {reg2}, ({reg3})"), "ScW"); + auto invalid_aqrl = [](AqRl aqrl) { return aqrl == AqRl::kAcquire; }; + DriverStr( + RepeatRRRAqRl(&Riscv64Assembler::ScW, "sc.w{aqrl} {reg1}, {reg2}, ({reg3})", invalid_aqrl), + "ScW"); } TEST_F(AssemblerRISCV64Test, ScD) { - DriverStr(RepeatRRRAqRl(&Riscv64Assembler::ScD, "sc.d{aqrl} {reg1}, {reg2}, ({reg3})"), "ScD"); + auto invalid_aqrl = [](AqRl aqrl) { return aqrl == AqRl::kAcquire; }; + DriverStr( + RepeatRRRAqRl(&Riscv64Assembler::ScD, "sc.d{aqrl} {reg1}, {reg2}, ({reg3})", invalid_aqrl), + "ScD"); } TEST_F(AssemblerRISCV64Test, AmoSwapW) { |