diff options
| -rw-r--r-- | compiler/dex/quick/x86/target_x86.cc | 11 | ||||
| -rw-r--r-- | test/700-LoadArgRegs/expected.txt | 1 | ||||
| -rw-r--r-- | test/700-LoadArgRegs/src/Main.java | 6 |
3 files changed, 14 insertions, 4 deletions
diff --git a/compiler/dex/quick/x86/target_x86.cc b/compiler/dex/quick/x86/target_x86.cc index e369d26df3..408a40a3fb 100644 --- a/compiler/dex/quick/x86/target_x86.cc +++ b/compiler/dex/quick/x86/target_x86.cc @@ -2150,7 +2150,8 @@ int X86Mir2Lir::GenDalvikArgsRange(CallInfo* info, int call_state, if (in_to_reg_storage_mapping.IsThereStackMapped()) { RegStorage regSingle = TargetReg(kArg2); RegStorage regWide = RegStorage::Solo64(TargetReg(kArg3).GetReg()); - for (int i = start_index; i <= last_mapped_in + regs_left_to_pass_via_stack; i++) { + for (int i = start_index; + i < last_mapped_in + size_of_the_last_mapped + regs_left_to_pass_via_stack; i++) { RegLocation rl_arg = info->args[i]; rl_arg = UpdateRawLoc(rl_arg); RegStorage reg = in_to_reg_storage_mapping.Get(i); @@ -2166,7 +2167,6 @@ int X86Mir2Lir::GenDalvikArgsRange(CallInfo* info, int call_state, LoadValueDirectWideFixed(rl_arg, regWide); StoreBaseDisp(TargetReg(kSp), out_offset, regWide, k64, kNotVolatile); } - i++; } else { if (rl_arg.location == kLocPhysReg) { StoreBaseDisp(TargetReg(kSp), out_offset, rl_arg.reg, k32, kNotVolatile); @@ -2179,6 +2179,9 @@ int X86Mir2Lir::GenDalvikArgsRange(CallInfo* info, int call_state, call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, direct_code, direct_method, type); } + if (rl_arg.wide) { + i++; + } } } @@ -2190,13 +2193,15 @@ int X86Mir2Lir::GenDalvikArgsRange(CallInfo* info, int call_state, if (reg.Valid()) { if (rl_arg.wide) { LoadValueDirectWideFixed(rl_arg, reg); - i++; } else { LoadValueDirectFixed(rl_arg, reg); } call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, direct_code, direct_method, type); } + if (rl_arg.wide) { + i++; + } } call_state = next_call_insn(cu_, info, call_state, target_method, vtable_idx, diff --git a/test/700-LoadArgRegs/expected.txt b/test/700-LoadArgRegs/expected.txt index 4908e5bf78..4977df691e 100644 --- a/test/700-LoadArgRegs/expected.txt +++ b/test/700-LoadArgRegs/expected.txt @@ -73,3 +73,4 @@ a, b, c, d, e, f, g -81, -82, -83, -84, -85, -86, -87, -88 -91, -92, -93, -94, -95, -96, -97, -98, -99 -1, -91, -92, -93, -94, -95, -96, -97, -98, -99 +1, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 2, 3, 4, 5, 6 diff --git a/test/700-LoadArgRegs/src/Main.java b/test/700-LoadArgRegs/src/Main.java index 281ab166e4..0e6de737b3 100644 --- a/test/700-LoadArgRegs/src/Main.java +++ b/test/700-LoadArgRegs/src/Main.java @@ -270,8 +270,11 @@ public class Main { // testL2x(100100100100011L, 100100100100011L); } - static public void main(String[] args) throws Exception { + static void testMore(int i1, double d1, double d2, double d3, double d4, double d5, double d6, double d7, double d8, double d9, int i2, int i3, int i4, int i5, int i6) { + System.out.println(i1+", "+d1+", "+d2+", "+d3+", "+d4+", "+d5+", "+d6+", "+d7+", "+d8+", "+d9+", "+i2+", "+i3+", "+i4+", "+i5+", "+i6); + } + static public void main(String[] args) throws Exception { testI(); testB(); testO(); @@ -284,5 +287,6 @@ public class Main { testLL(); + testMore(1, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, 8.0, 9.0, 2, 3, 4, 5, 6); } } |