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-rw-r--r--compiler/optimizing/code_generator_arm_vixl.cc42
-rw-r--r--compiler/optimizing/code_generator_arm_vixl.h4
-rw-r--r--test/Android.arm_vixl.mk16
3 files changed, 41 insertions, 21 deletions
diff --git a/compiler/optimizing/code_generator_arm_vixl.cc b/compiler/optimizing/code_generator_arm_vixl.cc
index bfade3ccbe..cac0543da3 100644
--- a/compiler/optimizing/code_generator_arm_vixl.cc
+++ b/compiler/optimizing/code_generator_arm_vixl.cc
@@ -37,6 +37,7 @@ namespace arm {
namespace vixl32 = vixl::aarch32;
using namespace vixl32; // NOLINT(build/namespaces)
+using helpers::DRegisterFrom;
using helpers::DWARFReg;
using helpers::FromLowSToD;
using helpers::HighDRegisterFrom;
@@ -1347,6 +1348,26 @@ void InstructionCodeGeneratorARMVIXL::VisitLongConstant(HLongConstant* constant
// Will be generated at use site.
}
+void LocationsBuilderARMVIXL::VisitFloatConstant(HFloatConstant* constant) {
+ LocationSummary* locations =
+ new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall);
+ locations->SetOut(Location::ConstantLocation(constant));
+}
+
+void InstructionCodeGeneratorARMVIXL::VisitFloatConstant(HFloatConstant* constant ATTRIBUTE_UNUSED) {
+ // Will be generated at use site.
+}
+
+void LocationsBuilderARMVIXL::VisitDoubleConstant(HDoubleConstant* constant) {
+ LocationSummary* locations =
+ new (GetGraph()->GetArena()) LocationSummary(constant, LocationSummary::kNoCall);
+ locations->SetOut(Location::ConstantLocation(constant));
+}
+
+void InstructionCodeGeneratorARMVIXL::VisitDoubleConstant(HDoubleConstant* constant ATTRIBUTE_UNUSED) {
+ // Will be generated at use site.
+}
+
void LocationsBuilderARMVIXL::VisitMemoryBarrier(HMemoryBarrier* memory_barrier) {
memory_barrier->SetLocations(nullptr);
}
@@ -3101,7 +3122,14 @@ void ParallelMoveResolverARMVIXL::EmitMove(size_t index) {
GetAssembler()->StoreToOffset(kStoreWord, temp, sp, destination.GetStackIndex());
}
} else if (source.IsFpuRegister()) {
- TODO_VIXL32(FATAL);
+ if (destination.IsRegister()) {
+ TODO_VIXL32(FATAL);
+ } else if (destination.IsFpuRegister()) {
+ __ Vmov(SRegisterFrom(destination), SRegisterFrom(source));
+ } else {
+ DCHECK(destination.IsStackSlot());
+ GetAssembler()->StoreSToOffset(SRegisterFrom(source), sp, destination.GetStackIndex());
+ }
} else if (source.IsDoubleStackSlot()) {
if (destination.IsDoubleStackSlot()) {
vixl32::DRegister temp = temps.AcquireD();
@@ -3112,7 +3140,8 @@ void ParallelMoveResolverARMVIXL::EmitMove(size_t index) {
GetAssembler()->LoadFromOffset(
kLoadWordPair, LowRegisterFrom(destination), sp, source.GetStackIndex());
} else {
- TODO_VIXL32(FATAL);
+ DCHECK(destination.IsFpuRegisterPair()) << destination;
+ GetAssembler()->LoadDFromOffset(DRegisterFrom(destination), sp, source.GetStackIndex());
}
} else if (source.IsRegisterPair()) {
if (destination.IsRegisterPair()) {
@@ -3131,7 +3160,14 @@ void ParallelMoveResolverARMVIXL::EmitMove(size_t index) {
destination.GetStackIndex());
}
} else if (source.IsFpuRegisterPair()) {
- TODO_VIXL32(FATAL);
+ if (destination.IsRegisterPair()) {
+ TODO_VIXL32(FATAL);
+ } else if (destination.IsFpuRegisterPair()) {
+ __ Vmov(DRegisterFrom(destination), DRegisterFrom(source));
+ } else {
+ DCHECK(destination.IsDoubleStackSlot()) << destination;
+ GetAssembler()->StoreDToOffset(DRegisterFrom(source), sp, destination.GetStackIndex());
+ }
} else {
DCHECK(source.IsConstant()) << source;
HConstant* constant = source.GetConstant();
diff --git a/compiler/optimizing/code_generator_arm_vixl.h b/compiler/optimizing/code_generator_arm_vixl.h
index 7815db2960..1cd6184dd4 100644
--- a/compiler/optimizing/code_generator_arm_vixl.h
+++ b/compiler/optimizing/code_generator_arm_vixl.h
@@ -114,8 +114,10 @@ class LoadClassSlowPathARMVIXL;
M(CurrentMethod) \
M(Div) \
M(DivZeroCheck) \
+ M(DoubleConstant) \
M(Equal) \
M(Exit) \
+ M(FloatConstant) \
M(Goto) \
M(GreaterThan) \
M(GreaterThanOrEqual) \
@@ -163,8 +165,6 @@ class LoadClassSlowPathARMVIXL;
M(CheckCast) \
M(ClassTableGet) \
M(Deoptimize) \
- M(DoubleConstant) \
- M(FloatConstant) \
M(InstanceOf) \
M(InvokeInterface) \
M(InvokeUnresolved) \
diff --git a/test/Android.arm_vixl.mk b/test/Android.arm_vixl.mk
index 5e1b953d94..2aeb5a0f6c 100644
--- a/test/Android.arm_vixl.mk
+++ b/test/Android.arm_vixl.mk
@@ -34,8 +34,6 @@ TEST_ART_BROKEN_OPTIMIZING_ARM_VIXL_RUN_TESTS := \
011-array-copy \
012-math \
015-switch \
- 017-float \
- 018-stack-overflow \
019-wrong-array-type \
020-string \
021-string2 \
@@ -50,7 +48,6 @@ TEST_ART_BROKEN_OPTIMIZING_ARM_VIXL_RUN_TESTS := \
035-enum \
036-finalizer \
037-inherit \
- 041-narrowing \
042-new-instance \
044-proxy \
045-reflect-array \
@@ -133,20 +130,16 @@ TEST_ART_BROKEN_OPTIMIZING_ARM_VIXL_RUN_TESTS := \
146-bad-interface \
150-loadlibrary \
201-built-in-except-detail-messages \
- 302-float-conversion \
304-method-tracing \
- 406-fields \
407-arrays \
410-floats \
411-optimizing-arith-mul \
412-new-array \
413-regalloc-regression \
- 414-optimizing-arith-sub \
414-static-fields \
415-optimizing-arith-neg \
416-optimizing-arith-not \
417-optimizing-arith-div \
- 419-long-parameter \
421-exceptions \
422-instanceof \
422-type-conversion \
@@ -157,7 +150,6 @@ TEST_ART_BROKEN_OPTIMIZING_ARM_VIXL_RUN_TESTS := \
427-bitwise \
427-bounds \
428-optimizing-arith-rem \
- 429-ssa-builder \
430-live-register-slow-path \
431-optimizing-arith-shifts \
431-type-propagation \
@@ -168,8 +160,6 @@ TEST_ART_BROKEN_OPTIMIZING_ARM_VIXL_RUN_TESTS := \
437-inline \
438-volatile \
439-npe \
- 439-swap-double \
- 440-stmp \
441-checker-inliner \
442-checker-constant-folding \
444-checker-nce \
@@ -201,7 +191,6 @@ TEST_ART_BROKEN_OPTIMIZING_ARM_VIXL_RUN_TESTS := \
474-fp-sub-neg \
475-regression-inliner-ids \
477-checker-bound-type \
- 477-long-2-float-convers-precision \
478-checker-clinit-check-pruning \
483-dce-block \
484-checker-register-hints \
@@ -271,7 +260,6 @@ TEST_ART_BROKEN_OPTIMIZING_ARM_VIXL_RUN_TESTS := \
550-checker-multiply-accumulate \
550-checker-regression-wide-store \
551-checker-shifter-operand \
- 551-implicit-null-checks \
551-invoke-super \
552-checker-primitive-typeprop \
552-checker-sharpening \
@@ -294,7 +282,6 @@ TEST_ART_BROKEN_OPTIMIZING_ARM_VIXL_RUN_TESTS := \
564-checker-bitcount \
564-checker-irreducible-loop \
564-checker-negbitwise \
- 565-checker-condition-liveness \
565-checker-doublenegbitwise \
565-checker-irreducible-loop \
565-checker-rotate \
@@ -314,7 +301,6 @@ TEST_ART_BROKEN_OPTIMIZING_ARM_VIXL_RUN_TESTS := \
580-checker-string-fact-intrinsics \
581-rtp \
582-checker-bce-length \
- 583-checker-zero \
584-checker-div-bool \
586-checker-null-array-get \
587-inline-class-error \
@@ -352,9 +338,7 @@ TEST_ART_BROKEN_OPTIMIZING_ARM_VIXL_RUN_TESTS := \
700-LoadArgRegs \
701-easy-div-rem \
702-LargeBranchOffset \
- 703-floating-point-div \
704-multiply-accumulate \
- 705-register-conflict \
800-smali \
802-deoptimization \
960-default-smali \
generated by cgit v1.2.3-59-g8ed1b (git 2.39.0) at 2025-12-09 20:09:17 +0000