diff options
| -rw-r--r-- | runtime/dex_instruction-inl.h | 4 | ||||
| -rw-r--r-- | runtime/dex_instruction_test.cc | 11 |
2 files changed, 13 insertions, 2 deletions
diff --git a/runtime/dex_instruction-inl.h b/runtime/dex_instruction-inl.h index 3d0fea07ad..f6ed1f03b7 100644 --- a/runtime/dex_instruction-inl.h +++ b/runtime/dex_instruction-inl.h @@ -505,11 +505,11 @@ inline uint16_t Instruction::VRegH_4rcc() const { } inline bool Instruction::HasVarArgs() const { - return FormatOf(Opcode()) == k35c; + return (FormatOf(Opcode()) == k35c) || (FormatOf(Opcode()) == k45cc); } inline void Instruction::GetVarArgs(uint32_t arg[kMaxVarArgRegs], uint16_t inst_data) const { - DCHECK_EQ(FormatOf(Opcode()), k35c); + DCHECK(HasVarArgs()); /* * Note that the fields mentioned in the spec don't appear in diff --git a/runtime/dex_instruction_test.cc b/runtime/dex_instruction_test.cc index 00c8e07a72..95e4181a8e 100644 --- a/runtime/dex_instruction_test.cc +++ b/runtime/dex_instruction_test.cc @@ -92,6 +92,15 @@ TEST(Instruction, PropertiesOf45cc) { ASSERT_TRUE(ins->HasVRegH()); ASSERT_EQ(32, ins->VRegH()); ASSERT_EQ(32, ins->VRegH_45cc()); + + ASSERT_TRUE(ins->HasVarArgs()); + + uint32_t arg_regs[Instruction::kMaxVarArgRegs]; + ins->GetVarArgs(arg_regs); + ASSERT_EQ(0xeu, arg_regs[0]); + ASSERT_EQ(0xfu, arg_regs[1]); + ASSERT_EQ(0xau, arg_regs[2]); + ASSERT_EQ(0xcu, arg_regs[3]); } TEST(Instruction, PropertiesOf4rcc) { @@ -118,6 +127,8 @@ TEST(Instruction, PropertiesOf4rcc) { ASSERT_TRUE(ins->HasVRegH()); ASSERT_EQ(32, ins->VRegH()); ASSERT_EQ(32, ins->VRegH_4rcc()); + + ASSERT_FALSE(ins->HasVarArgs()); } } // namespace art |