Merge "C++'ification of Quick compiler's casts" into dalvik-dev

30 files changed, 461 insertions, 609 deletions

diff --git a/src/compiler/codegen/arm/arm_lir.h b/src/compiler/codegen/arm/arm_lir.h
index 503fbda48e..a3c4ca1388 100644
--- a/src/compiler/codegen/arm/arm_lir.h
+++ b/src/compiler/codegen/arm/arm_lir.h
@@ -134,11 +134,11 @@ enum ArmResourceEncodingPos {
   kArmRegEnd   = 48,
 };
 
-#define ENCODE_ARM_REG_LIST(N)      ((uint64_t) N)
+#define ENCODE_ARM_REG_LIST(N)      (static_cast<uint64_t>(N))
 #define ENCODE_ARM_REG_SP           (1ULL << kArmRegSP)
 #define ENCODE_ARM_REG_LR           (1ULL << kArmRegLR)
 #define ENCODE_ARM_REG_PC           (1ULL << kArmRegPC)
-#define ENCODE_ARM_REG_FPCS_LIST(N) ((uint64_t)N << kArmFPReg16)
+#define ENCODE_ARM_REG_FPCS_LIST(N) (static_cast<uint64_t>(N) << kArmFPReg16)
 
 enum ArmNativeRegisterPool {
   r0   = 0,
@@ -232,7 +232,7 @@ enum ArmShiftEncodings {
   kArmRor = 0x3
 };
 
-#define isPseudoOpcode(opcode) ((int)(opcode) < 0)
+#define isPseudoOpcode(opcode) (static_cast<int>(opcode) < 0)
 
 /*
  * The following enum defines the list of supported Thumb instructions by the
diff --git a/src/compiler/codegen/arm/assemble_arm.cc b/src/compiler/codegen/arm/assemble_arm.cc
index 6370f6c215..d7fa05d11d 100644
--- a/src/compiler/codegen/arm/assemble_arm.cc
+++ b/src/compiler/codegen/arm/assemble_arm.cc
@@ -988,12 +988,12 @@ const ArmEncodingMap EncodingMap[kArmLast] = {
  * instruction.
  */
 AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
-                    intptr_t startAddr)
+                    uintptr_t startAddr)
 {
   LIR* lir;
   AssemblerStatus res = kSuccess;  // Assume success
 
-  for (lir = (LIR *) cUnit->firstLIRInsn; lir; lir = NEXT_LIR(lir)) {
+  for (lir = cUnit->firstLIRInsn; lir; lir = NEXT_LIR(lir)) {
 
     if (lir->opcode < 0) {
       /* 1 means padding is needed */
@@ -1031,9 +1031,9 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
          * However, if the load displacement exceeds the limit,
          * we revert to a 2-instruction materialization sequence.
          */
-        LIR *lirTarget = (LIR *) lir->target;
-        intptr_t pc = (lir->offset + 4) & ~3;
-        intptr_t target = lirTarget->offset;
+        LIR *lirTarget = lir->target;
+        uintptr_t pc = (lir->offset + 4) & ~3;
+        uintptr_t target = lirTarget->offset;
         int delta = target - pc;
         if (delta & 0x3) {
           LOG(FATAL) << "PC-rel offset not multiple of 4: " << delta;
@@ -1059,7 +1059,7 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
           // Add new Adr to generate the address
           LIR* newAdr = rawLIR(cUnit, lir->dalvikOffset, kThumb2Adr,
                      baseReg, 0, 0, 0, 0, lir->target);
-          oatInsertLIRBefore((LIR*)lir, (LIR*)newAdr);
+          oatInsertLIRBefore(lir, newAdr);
 
           // Convert to normal load
           if (lir->opcode == kThumb2LdrPcRel12) {
@@ -1080,9 +1080,9 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
           }
         }
       } else if (lir->opcode == kThumb2Cbnz || lir->opcode == kThumb2Cbz) {
-        LIR *targetLIR = (LIR *) lir->target;
-        intptr_t pc = lir->offset + 4;
-        intptr_t target = targetLIR->offset;
+        LIR *targetLIR = lir->target;
+        uintptr_t pc = lir->offset + 4;
+        uintptr_t target = targetLIR->offset;
         int delta = target - pc;
         if (delta > 126 || delta < 0) {
           /*
@@ -1093,7 +1093,7 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
             rawLIR(cUnit, lir->dalvikOffset, kThumbBCond, 0,
                    (lir->opcode == kThumb2Cbz) ? kArmCondEq : kArmCondNe,
                    0, 0, 0, lir->target);
-          oatInsertLIRAfter((LIR *)lir, (LIR *)newInst);
+          oatInsertLIRAfter(lir, newInst);
           /* Convert the cb[n]z to a cmp rx, #0 ] */
           lir->opcode = kThumbCmpRI8;
           /* operand[0] is src1 in both cb[n]z & CmpRI8 */
@@ -1128,11 +1128,11 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
           res = kRetryAll;
         }
       } else if (lir->opcode == kThumbBCond || lir->opcode == kThumb2BCond) {
-        LIR *targetLIR = (LIR *) lir->target;
+        LIR *targetLIR = lir->target;
         int delta = 0;
         DCHECK(targetLIR);
-        intptr_t pc = lir->offset + 4;
-        intptr_t target = targetLIR->offset;
+        uintptr_t pc = lir->offset + 4;
+        uintptr_t target = targetLIR->offset;
         delta = target - pc;
         if ((lir->opcode == kThumbBCond) && (delta > 254 || delta < -256)) {
           lir->opcode = kThumb2BCond;
@@ -1141,9 +1141,9 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
         }
         lir->operands[0] = delta >> 1;
       } else if (lir->opcode == kThumb2BUncond) {
-        LIR *targetLIR = (LIR *) lir->target;
-        intptr_t pc = lir->offset + 4;
-        intptr_t target = targetLIR->offset;
+        LIR *targetLIR = lir->target;
+        uintptr_t pc = lir->offset + 4;
+        uintptr_t target = targetLIR->offset;
         int delta = target - pc;
         lir->operands[0] = delta >> 1;
         if (!(cUnit->disableOpt & (1 << kSafeOptimizations)) &&
@@ -1152,9 +1152,9 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
           res = kRetryAll;
         }
       } else if (lir->opcode == kThumbBUncond) {
-        LIR *targetLIR = (LIR *) lir->target;
-        intptr_t pc = lir->offset + 4;
-        intptr_t target = targetLIR->offset;
+        LIR *targetLIR = lir->target;
+        uintptr_t pc = lir->offset + 4;
+        uintptr_t target = targetLIR->offset;
         int delta = target - pc;
         if (delta > 2046 || delta < -2048) {
           // Convert to Thumb2BCond w/ kArmCondAl
@@ -1173,8 +1173,8 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
       } else if (lir->opcode == kThumbBlx1) {
         DCHECK(NEXT_LIR(lir)->opcode == kThumbBlx2);
         /* curPC is Thumb */
-        intptr_t curPC = (startAddr + lir->offset + 4) & ~3;
-        intptr_t target = lir->operands[1];
+        uintptr_t curPC = (startAddr + lir->offset + 4) & ~3;
+        uintptr_t target = lir->operands[1];
 
         /* Match bit[1] in target with base */
         if (curPC & 0x2) {
@@ -1188,8 +1188,8 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
       } else if (lir->opcode == kThumbBl1) {
         DCHECK(NEXT_LIR(lir)->opcode == kThumbBl2);
         /* Both curPC and target are Thumb */
-        intptr_t curPC = startAddr + lir->offset + 4;
-        intptr_t target = lir->operands[1];
+        uintptr_t curPC = startAddr + lir->offset + 4;
+        uintptr_t target = lir->operands[1];
 
         int delta = target - curPC;
         DCHECK((delta >= -(1<<22)) && (delta <= ((1<<22)-2)));
@@ -1197,8 +1197,8 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
         lir->operands[0] = (delta >> 12) & 0x7ff;
         NEXT_LIR(lir)->operands[0] = (delta>> 1) & 0x7ff;
       } else if (lir->opcode == kThumb2Adr) {
-        SwitchTable *tabRec = (SwitchTable*)lir->operands[2];
-        LIR* target = (LIR*)lir->target;
+        SwitchTable *tabRec = reinterpret_cast<SwitchTable*>(lir->operands[2]);
+        LIR* target = lir->target;
         int targetDisp = tabRec ? tabRec->offset
                     : target->offset;
         int disp = targetDisp - ((lir->offset + 4) & ~3);
@@ -1208,14 +1208,14 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
           // convert to ldimm16l, ldimm16h, add tgt, pc, operands[0]
           LIR *newMov16L =
               rawLIR(cUnit, lir->dalvikOffset, kThumb2MovImm16LST,
-                     lir->operands[0], 0, (intptr_t)lir, (intptr_t)tabRec,
-                     0, lir->target);
-          oatInsertLIRBefore((LIR*)lir, (LIR*)newMov16L);
+                     lir->operands[0], 0, reinterpret_cast<uintptr_t>(lir),
+                     reinterpret_cast<uintptr_t>(tabRec), 0, lir->target);
+          oatInsertLIRBefore(lir, newMov16L);
           LIR *newMov16H =
               rawLIR(cUnit, lir->dalvikOffset, kThumb2MovImm16HST,
-                     lir->operands[0], 0, (intptr_t)lir, (intptr_t)tabRec,
-                     0, lir->target);
-          oatInsertLIRBefore((LIR*)lir, (LIR*)newMov16H);
+                     lir->operands[0], 0, reinterpret_cast<uintptr_t>(lir),
+                     reinterpret_cast<uintptr_t>(tabRec), 0, lir->target);
+          oatInsertLIRBefore(lir, newMov16H);
           lir->opcode = kThumb2AddRRR;
           lir->operands[1] = rARM_PC;
           lir->operands[2] = lir->operands[0];
@@ -1224,18 +1224,18 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
         }
       } else if (lir->opcode == kThumb2MovImm16LST) {
         // operands[1] should hold disp, [2] has add, [3] has tabRec
-        LIR *addPCInst = (LIR*)lir->operands[2];
-        SwitchTable *tabRec = (SwitchTable*)lir->operands[3];
+        LIR *addPCInst = reinterpret_cast<LIR*>(lir->operands[2]);
+        SwitchTable *tabRec = reinterpret_cast<SwitchTable*>(lir->operands[3]);
         // If tabRec is null, this is a literal load. Use target
-        LIR* target = (LIR*)lir->target;
+        LIR* target = lir->target;
         int targetDisp = tabRec ? tabRec->offset : target->offset;
         lir->operands[1] = (targetDisp - (addPCInst->offset + 4)) & 0xffff;
       } else if (lir->opcode == kThumb2MovImm16HST) {
         // operands[1] should hold disp, [2] has add, [3] has tabRec
-        LIR *addPCInst = (LIR*)lir->operands[2];
-        SwitchTable *tabRec = (SwitchTable*)lir->operands[3];
+        LIR *addPCInst = reinterpret_cast<LIR*>(lir->operands[2]);
+        SwitchTable *tabRec = reinterpret_cast<SwitchTable*>(lir->operands[3]);
         // If tabRec is null, this is a literal load. Use target
-        LIR* target = (LIR*)lir->target;
+        LIR* target = lir->target;
         int targetDisp = tabRec ? tabRec->offset : target->offset;
         lir->operands[1] =
             ((targetDisp - (addPCInst->offset + 4)) >> 16) & 0xffff;
@@ -1348,7 +1348,7 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit,
           }
           break;
         default:
-          LOG(FATAL) << "Bad fmt:" << (int)encoder->fieldLoc[i].kind;
+          LOG(FATAL) << "Bad fmt:" << encoder->fieldLoc[i].kind;
       }
     }
     if (encoder->size == 4) {
@@ -1374,9 +1374,7 @@ int oatAssignInsnOffsets(CompilationUnit* cUnit)
   LIR* armLIR;
   int offset = 0;
 
-  for (armLIR = (LIR *) cUnit->firstLIRInsn;
-     armLIR;
-     armLIR = NEXT_LIR(armLIR)) {
+  for (armLIR = cUnit->firstLIRInsn; armLIR; armLIR = NEXT_LIR(armLIR)) {
     armLIR->offset = offset;
     if (armLIR->opcode >= 0) {
       if (!armLIR->flags.isNop) {
diff --git a/src/compiler/codegen/arm/call_arm.cc b/src/compiler/codegen/arm/call_arm.cc
index 92b067c51a..acf825af9e 100644
--- a/src/compiler/codegen/arm/call_arm.cc
+++ b/src/compiler/codegen/arm/call_arm.cc
@@ -128,7 +128,7 @@ void genPrintLabel(CompilationUnit *cUnit, MIR* mir)
   /* Don't generate the SSA annotation unless verbose mode is on */
   if (cUnit->printMe && mir->ssaRep) {
     char* ssaString = oatGetSSAString(cUnit, mir->ssaRep);
-    newLIR1(cUnit, kPseudoSSARep, (int) ssaString);
+    newLIR1(cUnit, kPseudoSSARep, reinterpret_cast<uintptr_t>(ssaString));
   }
 }
 
@@ -329,13 +329,13 @@ void genSparseSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
     dumpSparseSwitchTable(table);
   }
   // Add the table to the list - we'll process it later
-  SwitchTable *tabRec = (SwitchTable *)oatNew(cUnit, sizeof(SwitchTable),
-                                              true, kAllocData);
+  SwitchTable *tabRec =
+      static_cast<SwitchTable*>(oatNew(cUnit, sizeof(SwitchTable), true, kAllocData));
   tabRec->table = table;
   tabRec->vaddr = cUnit->currentDalvikOffset;
   int size = table[1];
-  tabRec->targets = (LIR* *)oatNew(cUnit, size * sizeof(LIR*), true, kAllocLIR);
-  oatInsertGrowableList(cUnit, &cUnit->switchTables, (intptr_t)tabRec);
+  tabRec->targets = static_cast<LIR**>(oatNew(cUnit, size * sizeof(LIR*), true, kAllocLIR));
+  oatInsertGrowableList(cUnit, &cUnit->switchTables, reinterpret_cast<uintptr_t>(tabRec));
 
   // Get the switch value
   rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
@@ -350,7 +350,7 @@ void genSparseSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
     rKey = tmp;
   }
   // Materialize a pointer to the switch table
-  newLIR3(cUnit, kThumb2Adr, rBase, 0, (intptr_t)tabRec);
+  newLIR3(cUnit, kThumb2Adr, rBase, 0, reinterpret_cast<uintptr_t>(tabRec));
   // Set up rIdx
   int rIdx = oatAllocTemp(cUnit);
   loadConstant(cUnit, rIdx, size);
@@ -377,19 +377,19 @@ void genPackedSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
     dumpPackedSwitchTable(table);
   }
   // Add the table to the list - we'll process it later
-  SwitchTable *tabRec = (SwitchTable *)oatNew(cUnit, sizeof(SwitchTable),
-                                              true, kAllocData);
+  SwitchTable *tabRec =
+      static_cast<SwitchTable*>(oatNew(cUnit, sizeof(SwitchTable), true, kAllocData));
   tabRec->table = table;
   tabRec->vaddr = cUnit->currentDalvikOffset;
   int size = table[1];
-  tabRec->targets = (LIR* *)oatNew(cUnit, size * sizeof(LIR*), true, kAllocLIR);
-  oatInsertGrowableList(cUnit, &cUnit->switchTables, (intptr_t)tabRec);
+  tabRec->targets = static_cast<LIR**>(oatNew(cUnit, size * sizeof(LIR*), true, kAllocLIR));
+  oatInsertGrowableList(cUnit, &cUnit->switchTables, reinterpret_cast<uintptr_t>(tabRec));
 
   // Get the switch value
   rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
   int tableBase = oatAllocTemp(cUnit);
   // Materialize a pointer to the switch table
-  newLIR3(cUnit, kThumb2Adr, tableBase, 0, (intptr_t)tabRec);
+  newLIR3(cUnit, kThumb2Adr, tableBase, 0, reinterpret_cast<uintptr_t>(tabRec));
   int lowKey = s4FromSwitchData(&table[2]);
   int keyReg;
   // Remove the bias, if necessary
@@ -413,7 +413,7 @@ void genPackedSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
 
   /* branchOver target here */
   LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
-  branchOver->target = (LIR*)target;
+  branchOver->target = target;
 }
 
 /*
@@ -430,15 +430,15 @@ void genFillArrayData(CompilationUnit* cUnit, uint32_t tableOffset, RegLocation
 {
   const uint16_t* table = cUnit->insns + cUnit->currentDalvikOffset + tableOffset;
   // Add the table to the list - we'll process it later
-  FillArrayData *tabRec = (FillArrayData *)
-     oatNew(cUnit, sizeof(FillArrayData), true, kAllocData);
+  FillArrayData *tabRec =
+      static_cast<FillArrayData*>(oatNew(cUnit, sizeof(FillArrayData), true, kAllocData));
   tabRec->table = table;
   tabRec->vaddr = cUnit->currentDalvikOffset;
   uint16_t width = tabRec->table[1];
   uint32_t size = tabRec->table[2] | ((static_cast<uint32_t>(tabRec->table[3])) << 16);
   tabRec->size = (size * width) + 8;
 
-  oatInsertGrowableList(cUnit, &cUnit->fillArrayData, (intptr_t)tabRec);
+  oatInsertGrowableList(cUnit, &cUnit->fillArrayData, reinterpret_cast<uintptr_t>(tabRec));
 
   // Making a call - use explicit registers
   oatFlushAllRegs(cUnit);   /* Everything to home location */
@@ -446,7 +446,7 @@ void genFillArrayData(CompilationUnit* cUnit, uint32_t tableOffset, RegLocation
   loadWordDisp(cUnit, rARM_SELF, ENTRYPOINT_OFFSET(pHandleFillArrayDataFromCode),
                rARM_LR);
   // Materialize a pointer to the fill data image
-  newLIR3(cUnit, kThumb2Adr, r1, 0, (intptr_t)tabRec);
+  newLIR3(cUnit, kThumb2Adr, r1, 0, reinterpret_cast<uintptr_t>(tabRec));
   oatClobberCalleeSave(cUnit);
   LIR* callInst = opReg(cUnit, kOpBlx, rARM_LR);
   markSafepointPC(cUnit, callInst);
@@ -552,7 +552,7 @@ void markGCCard(CompilationUnit* cUnit, int valReg, int tgtAddrReg)
   storeBaseIndexed(cUnit, regCardBase, regCardNo, regCardBase, 0,
                    kUnsignedByte);
   LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
-  branchOver->target = (LIR*)target;
+  branchOver->target = target;
   oatFreeTemp(cUnit, regCardBase);
   oatFreeTemp(cUnit, regCardNo);
 }
@@ -577,7 +577,7 @@ void genEntrySequence(CompilationUnit* cUnit, RegLocation* argLocs,
    * a leaf *and* our frame size < fudge factor.
    */
   bool skipOverflowCheck = ((cUnit->attrs & METHOD_IS_LEAF) &&
-                            ((size_t)cUnit->frameSize <
+                            (static_cast<size_t>(cUnit->frameSize) <
                             Thread::kStackOverflowReservedBytes));
   newLIR0(cUnit, kPseudoMethodEntry);
   if (!skipOverflowCheck) {
diff --git a/src/compiler/codegen/arm/fp_arm.cc b/src/compiler/codegen/arm/fp_arm.cc
index 8c220500b2..70783a4c52 100644
--- a/src/compiler/codegen/arm/fp_arm.cc
+++ b/src/compiler/codegen/arm/fp_arm.cc
@@ -54,7 +54,7 @@ bool genArithOpFloat(CompilationUnit* cUnit, Instruction::Code opcode, RegLocati
   rlSrc1 = loadValue(cUnit, rlSrc1, kFPReg);
   rlSrc2 = loadValue(cUnit, rlSrc2, kFPReg);
   rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
-  newLIR3(cUnit, (ArmOpcode)op, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg);
+  newLIR3(cUnit, op, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg);
   storeValue(cUnit, rlDest, rlResult);
   return false;
 }
@@ -98,8 +98,7 @@ bool genArithOpDouble(CompilationUnit* cUnit, Instruction::Code opcode,
   rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
   DCHECK(rlDest.wide);
   DCHECK(rlResult.wide);
-  newLIR3(cUnit, (ArmOpcode)op, s2d(rlResult.lowReg, rlResult.highReg),
-          s2d(rlSrc1.lowReg, rlSrc1.highReg),
+  newLIR3(cUnit, op, s2d(rlResult.lowReg, rlResult.highReg), s2d(rlSrc1.lowReg, rlSrc1.highReg),
           s2d(rlSrc2.lowReg, rlSrc2.highReg));
   storeValueWide(cUnit, rlDest, rlResult);
   return false;
@@ -148,12 +147,11 @@ bool genConversion(CompilationUnit* cUnit, Instruction::Code opcode,
   }
   if (rlDest.wide) {
     rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
-    newLIR2(cUnit, (ArmOpcode)op, s2d(rlResult.lowReg, rlResult.highReg),
-            srcReg);
+    newLIR2(cUnit, op, s2d(rlResult.lowReg, rlResult.highReg), srcReg);
     storeValueWide(cUnit, rlDest, rlResult);
   } else {
     rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
-    newLIR2(cUnit, (ArmOpcode)op, rlResult.lowReg, srcReg);
+    newLIR2(cUnit, op, rlResult.lowReg, srcReg);
     storeValue(cUnit, rlDest, rlResult);
   }
   return false;
@@ -207,7 +205,7 @@ void genFusedFPCmpBranch(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir,
       }
       break;
     default:
-      LOG(FATAL) << "Unexpected ccode: " << (int)ccode;
+      LOG(FATAL) << "Unexpected ccode: " << ccode;
   }
   opCondBranch(cUnit, ccode, target);
 }
diff --git a/src/compiler/codegen/arm/int_arm.cc b/src/compiler/codegen/arm/int_arm.cc
index d7bd5235fc..159b329ef1 100644
--- a/src/compiler/codegen/arm/int_arm.cc
+++ b/src/compiler/codegen/arm/int_arm.cc
@@ -111,8 +111,8 @@ void genCmpLong(CompilationUnit* cUnit, RegLocation rlDest,
   storeValue(cUnit, rlDest, rlTemp);
   oatFreeTemp(cUnit, tReg);
 
-  branch1->target = (LIR*)target1;
-  branch2->target = (LIR*)target2;
+  branch1->target = target1;
+  branch2->target = target2;
   branch3->target = branch1->target;
 }
 
@@ -155,7 +155,7 @@ void genFusedLongCmpBranch(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir)
       ccode = kCondCs;
       break;
     default:
-      LOG(FATAL) << "Unexpected ccode: " << (int)ccode;
+      LOG(FATAL) << "Unexpected ccode: " << ccode;
   }
   opRegReg(cUnit, kOpCmp, rlSrc1.lowReg, rlSrc2.lowReg);
   opCondBranch(cUnit, ccode, taken);
@@ -215,7 +215,7 @@ LIR* opRegCopyNoInsert(CompilationUnit* cUnit, int rDest, int rSrc)
 LIR* opRegCopy(CompilationUnit* cUnit, int rDest, int rSrc)
 {
   LIR* res = opRegCopyNoInsert(cUnit, rDest, rSrc);
-  oatAppendLIR(cUnit, (LIR*)res);
+  oatAppendLIR(cUnit, res);
   return res;
 }
 
@@ -249,13 +249,6 @@ void opRegCopyWide(CompilationUnit* cUnit, int destLo, int destHi,
 }
 
 // Table of magic divisors
-enum DividePattern {
-  DivideNone,
-  Divide3,
-  Divide5,
-  Divide7,
-};
-
 struct MagicTable {
   uint32_t magic;
   uint32_t shift;
@@ -285,7 +278,7 @@ static const MagicTable magicTable[] = {
 bool smallLiteralDivide(CompilationUnit* cUnit, Instruction::Code dalvikOpcode,
                         RegLocation rlSrc, RegLocation rlDest, int lit)
 {
-  if ((lit < 0) || (lit >= (int)(sizeof(magicTable)/sizeof(magicTable[0])))) {
+  if ((lit < 0) || (lit >= static_cast<int>(sizeof(magicTable)/sizeof(magicTable[0])))) {
     return false;
   }
   DividePattern pattern = magicTable[lit].pattern;
@@ -321,7 +314,7 @@ bool smallLiteralDivide(CompilationUnit* cUnit, Instruction::Code dalvikOpcode,
                encodeShift(kArmAsr, magicTable[lit].shift));
       break;
     default:
-      LOG(FATAL) << "Unexpected pattern: " << (int)pattern;
+      LOG(FATAL) << "Unexpected pattern: " << pattern;
   }
   storeValue(cUnit, rlDest, rlResult);
   return true;
diff --git a/src/compiler/codegen/arm/target_arm.cc b/src/compiler/codegen/arm/target_arm.cc
index 5838ca799d..6640707f6a 100644
--- a/src/compiler/codegen/arm/target_arm.cc
+++ b/src/compiler/codegen/arm/target_arm.cc
@@ -221,10 +221,10 @@ void setupTargetResourceMasks(CompilationUnit* cUnit, LIR* lir)
   }
 }
 
-ArmConditionCode oatArmConditionEncoding(ConditionCode code)
+ArmConditionCode oatArmConditionEncoding(ConditionCode ccode)
 {
   ArmConditionCode res;
-  switch (code) {
+  switch (ccode) {
     case kCondEq: res = kArmCondEq; break;
     case kCondNe: res = kArmCondNe; break;
     case kCondCs: res = kArmCondCs; break;
@@ -242,8 +242,8 @@ ArmConditionCode oatArmConditionEncoding(ConditionCode code)
     case kCondAl: res = kArmCondAl; break;
     case kCondNv: res = kArmCondNv; break;
     default:
-      LOG(FATAL) << "Bad condition code" << (int)code;
-      res = (ArmConditionCode)0;  // Quiet gcc
+      LOG(FATAL) << "Bad condition code " << ccode;
+      res = static_cast<ArmConditionCode>(0);  // Quiet gcc
   }
   return res;
 }
@@ -352,7 +352,7 @@ std::string buildInsnString(const char* fmt, LIR* lir, unsigned char* baseAddr)
         strcpy(tbuf, "!");
       } else {
          DCHECK_LT(fmt, fmtEnd);
-         DCHECK_LT((unsigned)(nc-'0'), 4U);
+         DCHECK_LT(static_cast<unsigned>(nc-'0'), 4U);
          operand = lir->operands[nc-'0'];
          switch (*fmt++) {
            case 'H':
@@ -432,18 +432,18 @@ std::string buildInsnString(const char* fmt, LIR* lir, unsigned char* baseAddr)
              break;
            case 't':
              sprintf(tbuf,"0x%08x (L%p)",
-                 (int) baseAddr + lir->offset + 4 +
+                 reinterpret_cast<uintptr_t>(baseAddr) + lir->offset + 4 +
                  (operand << 1),
                  lir->target);
              break;
            case 'u': {
              int offset_1 = lir->operands[0];
              int offset_2 = NEXT_LIR(lir)->operands[0];
-             intptr_t target =
-                 ((((intptr_t) baseAddr + lir->offset + 4) &
+             uintptr_t target =
+                 (((reinterpret_cast<uintptr_t>(baseAddr) + lir->offset + 4) &
                  ~3) + (offset_1 << 21 >> 9) + (offset_2 << 1)) &
                  0xfffffffc;
-             sprintf(tbuf, "%p", (void *) target);
+             sprintf(tbuf, "%p", reinterpret_cast<void *>(target));
              break;
           }
 
@@ -473,11 +473,10 @@ std::string buildInsnString(const char* fmt, LIR* lir, unsigned char* baseAddr)
   return buf;
 }
 
-void oatDumpResourceMask(LIR* lir, uint64_t mask, const char* prefix)
+void oatDumpResourceMask(LIR* armLIR, uint64_t mask, const char* prefix)
 {
   char buf[256];
   buf[0] = 0;
-  LIR* armLIR = (LIR*) lir;
 
   if (mask == ENCODE_ALL) {
     strcpy(buf, "all");
@@ -520,46 +519,9 @@ void oatDumpResourceMask(LIR* lir, uint64_t mask, const char* prefix)
   }
 }
 
-/*
- * Nop any unconditional branches that go to the next instruction.
- * Note: new redundant branches may be inserted later, and we'll
- * use a check in final instruction assembly to nop those out.
- */
-void removeRedundantBranches(CompilationUnit* cUnit)
+bool branchUnconditional(LIR* lir)
 {
-  LIR* thisLIR;
-
-  for (thisLIR = (LIR*) cUnit->firstLIRInsn;
-     thisLIR != (LIR*) cUnit->lastLIRInsn;
-     thisLIR = NEXT_LIR(thisLIR)) {
-
-    /* Branch to the next instruction */
-    if ((thisLIR->opcode == kThumbBUncond) ||
-      (thisLIR->opcode == kThumb2BUncond)) {
-      LIR* nextLIR = thisLIR;
-
-      while (true) {
-        nextLIR = NEXT_LIR(nextLIR);
-
-        /*
-         * Is the branch target the next instruction?
-         */
-        if (nextLIR == (LIR*) thisLIR->target) {
-          thisLIR->flags.isNop = true;
-          break;
-        }
-
-        /*
-         * Found real useful stuff between the branch and the target.
-         * Need to explicitly check the lastLIRInsn here because it
-         * might be the last real instruction.
-         */
-        if (!isPseudoOpcode(nextLIR->opcode) ||
-          (nextLIR = (LIR*) cUnit->lastLIRInsn))
-          break;
-      }
-    }
-  }
+  return ((lir->opcode == kThumbBUncond) || (lir->opcode == kThumb2BUncond));
 }
 
 /* Common initialization routine for an architecture family */
@@ -571,7 +533,7 @@ bool oatArchInit()
     if (EncodingMap[i].opcode != i) {
       LOG(FATAL) << "Encoding order for " << EncodingMap[i].name
                  << " is wrong: expecting " << i << ", seeing "
-                 << (int)EncodingMap[i].opcode;
+                 << static_cast<int>(EncodingMap[i].opcode);
     }
   }
 
@@ -627,17 +589,15 @@ void oatInitializeRegAlloc(CompilationUnit* cUnit)
   int numTemps = sizeof(coreTemps)/sizeof(*coreTemps);
   int numFPRegs = sizeof(fpRegs)/sizeof(*fpRegs);
   int numFPTemps = sizeof(fpTemps)/sizeof(*fpTemps);
-  RegisterPool *pool = (RegisterPool *)oatNew(cUnit, sizeof(*pool), true,
-                        kAllocRegAlloc);
+  RegisterPool *pool =
+      static_cast<RegisterPool*>(oatNew(cUnit, sizeof(*pool), true, kAllocRegAlloc));
   cUnit->regPool = pool;
   pool->numCoreRegs = numRegs;
-  pool->coreRegs = (RegisterInfo *)
-      oatNew(cUnit, numRegs * sizeof(*cUnit->regPool->coreRegs),
-             true, kAllocRegAlloc);
+  pool->coreRegs = reinterpret_cast<RegisterInfo*>
+      (oatNew(cUnit, numRegs * sizeof(*cUnit->regPool->coreRegs), true, kAllocRegAlloc));
   pool->numFPRegs = numFPRegs;
-  pool->FPRegs = (RegisterInfo *)
-      oatNew(cUnit, numFPRegs * sizeof(*cUnit->regPool->FPRegs), true,
-             kAllocRegAlloc);
+  pool->FPRegs = static_cast<RegisterInfo*>
+      (oatNew(cUnit, numFPRegs * sizeof(*cUnit->regPool->FPRegs), true, kAllocRegAlloc));
   oatInitPool(pool->coreRegs, coreRegs, pool->numCoreRegs);
   oatInitPool(pool->FPRegs, fpRegs, pool->numFPRegs);
   // Keep special registers from being allocated
@@ -660,9 +620,8 @@ void oatInitializeRegAlloc(CompilationUnit* cUnit)
   pool->nextCoreReg = r2;
 
   // Construct the alias map.
-  cUnit->phiAliasMap = (int*)oatNew(cUnit, cUnit->numSSARegs *
-                                    sizeof(cUnit->phiAliasMap[0]), false,
-                                    kAllocDFInfo);
+  cUnit->phiAliasMap = static_cast<int*>
+      (oatNew(cUnit, cUnit->numSSARegs * sizeof(cUnit->phiAliasMap[0]), false, kAllocDFInfo));
   for (int i = 0; i < cUnit->numSSARegs; i++) {
     cUnit->phiAliasMap[i] = i;
   }
@@ -837,12 +796,6 @@ extern void oatFreeCallTemps(CompilationUnit* cUnit)
   oatFreeTemp(cUnit, r3);
 }
 
-/* Convert an instruction to a NOP */
-void oatNopLIR( LIR* lir)
-{
-  ((LIR*)lir)->flags.isNop = true;
-}
-
 int loadHelper(CompilationUnit* cUnit, int offset)
 {
   loadWordDisp(cUnit, rARM_SELF, offset, rARM_LR);
diff --git a/src/compiler/codegen/arm/utility_arm.cc b/src/compiler/codegen/arm/utility_arm.cc
index 90698260a8..1873c2aa37 100644
--- a/src/compiler/codegen/arm/utility_arm.cc
+++ b/src/compiler/codegen/arm/utility_arm.cc
@@ -54,8 +54,8 @@ LIR* loadFPConstantValue(CompilationUnit* cUnit, int rDest, int value)
   LIR* loadPcRel = rawLIR(cUnit, cUnit->currentDalvikOffset, kThumb2Vldrs,
                           rDest, r15pc, 0, 0, 0, dataTarget);
   setMemRefType(loadPcRel, true, kLiteral);
-  loadPcRel->aliasInfo = (intptr_t)dataTarget;
-  oatAppendLIR(cUnit, (LIR* ) loadPcRel);
+  loadPcRel->aliasInfo = reinterpret_cast<uintptr_t>(dataTarget);
+  oatAppendLIR(cUnit, loadPcRel);
   return loadPcRel;
 }
 
@@ -157,9 +157,9 @@ LIR* loadConstantNoClobber(CompilationUnit* cUnit, int rDest, int value)
   LIR* loadPcRel = rawLIR(cUnit, cUnit->currentDalvikOffset,
                           kThumb2LdrPcRel12, rDest, 0, 0, 0, 0, dataTarget);
   setMemRefType(loadPcRel, true, kLiteral);
-  loadPcRel->aliasInfo = (intptr_t)dataTarget;
+  loadPcRel->aliasInfo = reinterpret_cast<uintptr_t>(dataTarget);
   res = loadPcRel;
-  oatAppendLIR(cUnit, (LIR* ) loadPcRel);
+  oatAppendLIR(cUnit, loadPcRel);
 
   /*
    * To save space in the constant pool, we use the ADD_RRI8 instruction to
@@ -193,7 +193,7 @@ LIR* opReg(CompilationUnit* cUnit, OpKind op, int rDestSrc)
       opcode = kThumbBlxR;
       break;
     default:
-      LOG(FATAL) << "Bad opcode " << (int)op;
+      LOG(FATAL) << "Bad opcode " << op;
   }
   return newLIR1(cUnit, opcode, rDestSrc);
 }
@@ -295,7 +295,7 @@ LIR* opRegRegShift(CompilationUnit* cUnit, OpKind op, int rDestSrc1,
       DCHECK_EQ(shift, 0);
       return newLIR4(cUnit, kThumb2Ubfx, rDestSrc1, rSrc2, 0, 16);
     default:
-      LOG(FATAL) << "Bad opcode: " << (int)op;
+      LOG(FATAL) << "Bad opcode: " << op;
       break;
   }
   DCHECK_GE(static_cast<int>(opcode), 0);
@@ -374,7 +374,7 @@ LIR* opRegRegRegShift(CompilationUnit* cUnit, OpKind op, int rDest, int rSrc1,
       opcode = kThumb2RorRRR;
       break;
     default:
-      LOG(FATAL) << "Bad opcode: " << (int)op;
+      LOG(FATAL) << "Bad opcode: " << op;
       break;
   }
   DCHECK_GE(static_cast<int>(opcode), 0);
@@ -496,7 +496,7 @@ LIR* opRegRegImm(CompilationUnit* cUnit, OpKind op, int rDest, int rSrc1,
       return res;
     }
     default:
-      LOG(FATAL) << "Bad opcode: " << (int)op;
+      LOG(FATAL) << "Bad opcode: " << op;
   }
 
   if (modImm >= 0) {
@@ -611,8 +611,8 @@ LIR* loadConstantValueWide(CompilationUnit* cUnit, int rDestLo, int rDestHi,
           rawLIR(cUnit, cUnit->currentDalvikOffset, kThumb2Vldrd,
                  s2d(rDestLo, rDestHi), r15pc, 0, 0, 0, dataTarget);
       setMemRefType(loadPcRel, true, kLiteral);
-      loadPcRel->aliasInfo = (intptr_t)dataTarget;
-      oatAppendLIR(cUnit, (LIR* ) loadPcRel);
+      loadPcRel->aliasInfo = reinterpret_cast<uintptr_t>(dataTarget);
+      oatAppendLIR(cUnit, loadPcRel);
       res = loadPcRel;
     }
   } else {
@@ -681,7 +681,7 @@ LIR* loadBaseIndexed(CompilationUnit* cUnit, int rBase, int rIndex, int rDest,
       opcode = (thumbForm) ? kThumbLdrsbRRR : kThumb2LdrsbRRR;
       break;
     default:
-      LOG(FATAL) << "Bad size: " << (int)size;
+      LOG(FATAL) << "Bad size: " << size;
   }
   if (thumbForm)
     load = newLIR3(cUnit, opcode, rDest, rBase, rIndex);
@@ -742,7 +742,7 @@ LIR* storeBaseIndexed(CompilationUnit* cUnit, int rBase, int rIndex, int rSrc,
       opcode = (thumbForm) ? kThumbStrbRRR : kThumb2StrbRRR;
       break;
     default:
-      LOG(FATAL) << "Bad size: " << (int)size;
+      LOG(FATAL) << "Bad size: " << size;
   }
   if (thumbForm)
     store = newLIR3(cUnit, opcode, rSrc, rBase, rIndex);
@@ -854,7 +854,7 @@ LIR* loadBaseDispBody(CompilationUnit* cUnit, int rBase,
       }
       break;
     default:
-      LOG(FATAL) << "Bad size: " << (int)size;
+      LOG(FATAL) << "Bad size: " << size;
   }
 
   if (shortForm) {
@@ -961,7 +961,7 @@ LIR* storeBaseDispBody(CompilationUnit* cUnit, int rBase, int displacement,
       }
       break;
     default:
-      LOG(FATAL) << "Bad size: " << (int)size;
+      LOG(FATAL) << "Bad size: " << size;
   }
   if (shortForm) {
     store = res = newLIR3(cUnit, opcode, rSrc, rBase, encodedDisp);
diff --git a/src/compiler/codegen/codegen_util.cc b/src/compiler/codegen/codegen_util.cc
index 6ce48abb5c..5da552cf88 100644
--- a/src/compiler/codegen/codegen_util.cc
+++ b/src/compiler/codegen/codegen_util.cc
@@ -21,6 +21,12 @@
 
 namespace art {
 
+/* Convert an instruction to a NOP */
+void oatNopLIR( LIR* lir)
+{
+  lir->flags.isNop = true;
+}
+
 void setMemRefType(LIR* lir, bool isLoad, int memType)
 {
   uint64_t *maskPtr;
@@ -162,9 +168,8 @@ void setupResourceMasks(CompilationUnit* cUnit, LIR* lir)
 #define DUMP_SSA_REP(X)
 
 /* Pretty-print a LIR instruction */
-void oatDumpLIRInsn(CompilationUnit* cUnit, LIR* arg, unsigned char* baseAddr)
+void oatDumpLIRInsn(CompilationUnit* cUnit, LIR* lir, unsigned char* baseAddr)
 {
-  LIR* lir = (LIR*) arg;
   int offset = lir->offset;
   int dest = lir->operands[0];
   const bool dumpNop = (cUnit->enableDebug & (1 << kDebugShowNops));
@@ -182,23 +187,23 @@ void oatDumpLIRInsn(CompilationUnit* cUnit, LIR* arg, unsigned char* baseAddr)
       LOG(INFO) << "-------- BARRIER";
       break;
     case kPseudoExtended:
-      LOG(INFO) << "-------- " << (char* ) dest;
+      LOG(INFO) << "-------- " << reinterpret_cast<char*>(dest);
       break;
     case kPseudoSSARep:
-      DUMP_SSA_REP(LOG(INFO) << "-------- kMirOpPhi: " <<  (char* ) dest);
+      DUMP_SSA_REP(LOG(INFO) << "-------- kMirOpPhi: " <<  reinterpret_cast<char*>(dest));
       break;
     case kPseudoEntryBlock:
       LOG(INFO) << "-------- entry offset: 0x" << std::hex << dest;
       break;
     case kPseudoDalvikByteCodeBoundary:
       LOG(INFO) << "-------- dalvik offset: 0x" << std::hex
-                << lir->dalvikOffset << " @ " << (char* )lir->operands[0];
+                << lir->dalvikOffset << " @ " << reinterpret_cast<char*>(lir->operands[0]);
       break;
     case kPseudoExitBlock:
       LOG(INFO) << "-------- exit offset: 0x" << std::hex << dest;
       break;
     case kPseudoPseudoAlign4:
-      LOG(INFO) << (intptr_t)baseAddr + offset << " (0x" << std::hex
+      LOG(INFO) << reinterpret_cast<uintptr_t>(baseAddr) + offset << " (0x" << std::hex
                 << offset << "): .align4";
       break;
     case kPseudoEHBlockLabel:
@@ -206,16 +211,16 @@ void oatDumpLIRInsn(CompilationUnit* cUnit, LIR* arg, unsigned char* baseAddr)
       break;
     case kPseudoTargetLabel:
     case kPseudoNormalBlockLabel:
-      LOG(INFO) << "L" << (void*)lir << ":";
+      LOG(INFO) << "L" << reinterpret_cast<void*>(lir) << ":";
       break;
     case kPseudoThrowTarget:
-      LOG(INFO) << "LT" << (void*)lir << ":";
+      LOG(INFO) << "LT" << reinterpret_cast<void*>(lir) << ":";
       break;
     case kPseudoIntrinsicRetry:
-      LOG(INFO) << "IR" << (void*)lir << ":";
+      LOG(INFO) << "IR" << reinterpret_cast<void*>(lir) << ":";
       break;
     case kPseudoSuspendTarget:
-      LOG(INFO) << "LS" << (void*)lir << ":";
+      LOG(INFO) << "LS" << reinterpret_cast<void*>(lir) << ":";
       break;
     case kPseudoSafepointPC:
       LOG(INFO) << "LsafepointPC_0x" << std::hex << lir->offset << "_" << lir->dalvikOffset << ":";
@@ -224,7 +229,7 @@ void oatDumpLIRInsn(CompilationUnit* cUnit, LIR* arg, unsigned char* baseAddr)
       LOG(INFO) << "LexportedPC_0x" << std::hex << lir->offset << "_" << lir->dalvikOffset << ":";
       break;
     case kPseudoCaseLabel:
-      LOG(INFO) << "LC" << (void*)lir << ": Case target 0x"
+      LOG(INFO) << "LC" << reinterpret_cast<void*>(lir) << ": Case target 0x"
                 << std::hex << lir->operands[0] << "|" << std::dec <<
         lir->operands[0];
       break;
@@ -237,7 +242,7 @@ void oatDumpLIRInsn(CompilationUnit* cUnit, LIR* arg, unsigned char* baseAddr)
         std::string op_operands(buildInsnString(EncodingMap[lir->opcode].fmt
                                               , lir, baseAddr));
         LOG(INFO) << StringPrintf("%05x: %-9s%s%s",
-                                  (unsigned int)(baseAddr + offset),
+                                  reinterpret_cast<unsigned int>(baseAddr + offset),
                                   op_name.c_str(), op_operands.c_str(),
                                   lir->flags.isNop ? "(nop)" : "");
       }
@@ -302,7 +307,6 @@ void oatCodegenDump(CompilationUnit* cUnit)
   LOG(INFO) << "Dumping LIR insns for "
             << PrettyMethod(cUnit->method_idx, *cUnit->dex_file);
   LIR* lirInsn;
-  LIR* thisLIR;
   int insnsSize = cUnit->insnsSize;
 
   LOG(INFO) << "Regs (excluding ins) : " << cUnit->numRegs;
@@ -315,16 +319,14 @@ void oatCodegenDump(CompilationUnit* cUnit)
   LOG(INFO) << "code size is " << cUnit->totalSize <<
     " bytes, Dalvik size is " << insnsSize * 2;
   LOG(INFO) << "expansion factor: "
-            << (float)cUnit->totalSize / (float)(insnsSize * 2);
+            << static_cast<float>(cUnit->totalSize) / static_cast<float>(insnsSize * 2);
   oatDumpPromotionMap(cUnit);
   for (lirInsn = cUnit->firstLIRInsn; lirInsn; lirInsn = lirInsn->next) {
     oatDumpLIRInsn(cUnit, lirInsn, 0);
   }
   for (lirInsn = cUnit->literalList; lirInsn; lirInsn = lirInsn->next) {
-    thisLIR = (LIR*) lirInsn;
-    LOG(INFO) << StringPrintf("%x (%04x): .word (%#x)",
-                              thisLIR->offset, thisLIR->offset,
-                              thisLIR->operands[0]);
+    LOG(INFO) << StringPrintf("%x (%04x): .word (%#x)", lirInsn->offset, lirInsn->offset,
+                              lirInsn->operands[0]);
   }
 
   const DexFile::MethodId& method_id =
@@ -342,7 +344,7 @@ void oatCodegenDump(CompilationUnit* cUnit)
 LIR* rawLIR(CompilationUnit* cUnit, int dalvikOffset, int opcode, int op0,
       int op1, int op2, int op3, int op4, LIR* target)
 {
-  LIR* insn = (LIR* ) oatNew(cUnit, sizeof(LIR), true, kAllocLIR);
+  LIR* insn = static_cast<LIR*>(oatNew(cUnit, sizeof(LIR), true, kAllocLIR));
   insn->dalvikOffset = dalvikOffset;
   insn->opcode = opcode;
   insn->operands[0] = op0;
@@ -367,11 +369,11 @@ LIR* rawLIR(CompilationUnit* cUnit, int dalvikOffset, int opcode, int op0,
 LIR* newLIR0(CompilationUnit* cUnit, int opcode)
 {
   DCHECK(isPseudoOpcode(opcode) || (EncodingMap[opcode].flags & NO_OPERAND))
-      << EncodingMap[opcode].name << " " << (int)opcode << " "
+      << EncodingMap[opcode].name << " " << opcode << " "
       << PrettyMethod(cUnit->method_idx, *cUnit->dex_file) << " "
       << cUnit->currentDalvikOffset;
   LIR* insn = rawLIR(cUnit, cUnit->currentDalvikOffset, opcode);
-  oatAppendLIR(cUnit, (LIR*) insn);
+  oatAppendLIR(cUnit, insn);
   return insn;
 }
 
@@ -379,11 +381,11 @@ LIR* newLIR1(CompilationUnit* cUnit, int opcode,
                int dest)
 {
   DCHECK(isPseudoOpcode(opcode) || (EncodingMap[opcode].flags & IS_UNARY_OP))
-      << EncodingMap[opcode].name << " " << (int)opcode << " "
+      << EncodingMap[opcode].name << " " << opcode << " "
       << PrettyMethod(cUnit->method_idx, *cUnit->dex_file) << " "
       << cUnit->currentDalvikOffset;
   LIR* insn = rawLIR(cUnit, cUnit->currentDalvikOffset, opcode, dest);
-  oatAppendLIR(cUnit, (LIR*) insn);
+  oatAppendLIR(cUnit, insn);
   return insn;
 }
 
@@ -391,11 +393,11 @@ LIR* newLIR2(CompilationUnit* cUnit, int opcode,
                int dest, int src1)
 {
   DCHECK(isPseudoOpcode(opcode) || (EncodingMap[opcode].flags & IS_BINARY_OP))
-      << EncodingMap[opcode].name << " " << (int)opcode << " "
+      << EncodingMap[opcode].name << " " << opcode << " "
       << PrettyMethod(cUnit->method_idx, *cUnit->dex_file) << " "
       << cUnit->currentDalvikOffset;
   LIR* insn = rawLIR(cUnit, cUnit->currentDalvikOffset, opcode, dest, src1);
-  oatAppendLIR(cUnit, (LIR*) insn);
+  oatAppendLIR(cUnit, insn);
   return insn;
 }
 
@@ -403,12 +405,11 @@ LIR* newLIR3(CompilationUnit* cUnit, int opcode,
                int dest, int src1, int src2)
 {
   DCHECK(isPseudoOpcode(opcode) || (EncodingMap[opcode].flags & IS_TERTIARY_OP))
-      << EncodingMap[opcode].name << " " << (int)opcode << " "
+      << EncodingMap[opcode].name << " " << opcode << " "
       << PrettyMethod(cUnit->method_idx, *cUnit->dex_file) << " "
       << cUnit->currentDalvikOffset;
-  LIR* insn = rawLIR(cUnit, cUnit->currentDalvikOffset, opcode, dest, src1,
-                     src2);
-  oatAppendLIR(cUnit, (LIR*) insn);
+  LIR* insn = rawLIR(cUnit, cUnit->currentDalvikOffset, opcode, dest, src1, src2);
+  oatAppendLIR(cUnit, insn);
   return insn;
 }
 
@@ -416,12 +417,11 @@ LIR* newLIR4(CompilationUnit* cUnit, int opcode,
       int dest, int src1, int src2, int info)
 {
   DCHECK(isPseudoOpcode(opcode) || (EncodingMap[opcode].flags & IS_QUAD_OP))
-      << EncodingMap[opcode].name << " " << (int)opcode << " "
+      << EncodingMap[opcode].name << " " << opcode << " "
       << PrettyMethod(cUnit->method_idx, *cUnit->dex_file) << " "
       << cUnit->currentDalvikOffset;
-  LIR* insn = rawLIR(cUnit, cUnit->currentDalvikOffset, opcode, dest, src1,
-                     src2, info);
-  oatAppendLIR(cUnit, (LIR*) insn);
+  LIR* insn = rawLIR(cUnit, cUnit->currentDalvikOffset, opcode, dest, src1, src2, info);
+  oatAppendLIR(cUnit, insn);
   return insn;
 }
 
@@ -429,12 +429,11 @@ LIR* newLIR5(CompilationUnit* cUnit, int opcode,
        int dest, int src1, int src2, int info1, int info2)
 {
   DCHECK(isPseudoOpcode(opcode) || (EncodingMap[opcode].flags & IS_QUIN_OP))
-      << EncodingMap[opcode].name << " " << (int)opcode << " "
+      << EncodingMap[opcode].name << " " << opcode << " "
       << PrettyMethod(cUnit->method_idx, *cUnit->dex_file) << " "
       << cUnit->currentDalvikOffset;
-  LIR* insn = rawLIR(cUnit, cUnit->currentDalvikOffset, opcode, dest, src1,
-                     src2, info1, info2);
-  oatAppendLIR(cUnit, (LIR*) insn);
+  LIR* insn = rawLIR(cUnit, cUnit->currentDalvikOffset, opcode, dest, src1, src2, info1, info2);
+  oatAppendLIR(cUnit, insn);
   return insn;
 }
 
@@ -445,8 +444,8 @@ LIR* newLIR5(CompilationUnit* cUnit, int opcode,
 LIR* scanLiteralPool(LIR* dataTarget, int value, unsigned int delta)
 {
   while (dataTarget) {
-    if (((unsigned) (value - ((LIR* ) dataTarget)->operands[0])) <= delta)
-      return (LIR* ) dataTarget;
+    if ((static_cast<unsigned>(value - dataTarget->operands[0])) <= delta)
+      return dataTarget;
     dataTarget = dataTarget->next;
   }
   return NULL;
@@ -458,11 +457,11 @@ LIR* scanLiteralPoolWide(LIR* dataTarget, int valLo, int valHi)
   bool loMatch = false;
   LIR* loTarget = NULL;
   while (dataTarget) {
-    if (loMatch && (((LIR*)dataTarget)->operands[0] == valHi)) {
-      return (LIR*)loTarget;
+    if (loMatch && (dataTarget->operands[0] == valHi)) {
+      return loTarget;
     }
     loMatch = false;
-    if (((LIR*)dataTarget)->operands[0] == valLo) {
+    if (dataTarget->operands[0] == valLo) {
       loMatch = true;
       loTarget = dataTarget;
     }
@@ -481,10 +480,10 @@ LIR* addWordData(CompilationUnit* cUnit, LIR* *constantListP, int value)
 {
   /* Add the constant to the literal pool */
   if (constantListP) {
-    LIR* newValue = (LIR* ) oatNew(cUnit, sizeof(LIR), true, kAllocData);
+    LIR* newValue = static_cast<LIR*>(oatNew(cUnit, sizeof(LIR), true, kAllocData));
     newValue->operands[0] = value;
     newValue->next = *constantListP;
-    *constantListP = (LIR*) newValue;
+    *constantListP = newValue;
     return newValue;
   }
   return NULL;
@@ -564,8 +563,7 @@ void installSwitchTables(CompilationUnit* cUnit)
   GrowableListIterator iterator;
   oatGrowableListIteratorInit(&cUnit->switchTables, &iterator);
   while (true) {
-    SwitchTable* tabRec = (SwitchTable *) oatGrowableListIteratorNext(
-       &iterator);
+    SwitchTable* tabRec = reinterpret_cast<SwitchTable*>(oatGrowableListIteratorNext( &iterator));
     if (tabRec == NULL) break;
     alignBuffer(cUnit->codeBuffer, tabRec->offset);
     /*
@@ -591,7 +589,7 @@ void installSwitchTables(CompilationUnit* cUnit)
       LOG(INFO) << "Switch table for offset 0x" << std::hex << bxOffset;
     }
     if (tabRec->table[0] == Instruction::kSparseSwitchSignature) {
-      int* keys = (int*)&(tabRec->table[2]);
+      const int* keys = reinterpret_cast<const int*>(&(tabRec->table[2]));
       for (int elems = 0; elems < tabRec->table[1]; elems++) {
         int disp = tabRec->targets[elems]->offset - bxOffset;
         if (cUnit->printMe) {
@@ -624,8 +622,8 @@ void installFillArrayData(CompilationUnit* cUnit)
   GrowableListIterator iterator;
   oatGrowableListIteratorInit(&cUnit->fillArrayData, &iterator);
   while (true) {
-    FillArrayData *tabRec = (FillArrayData *) oatGrowableListIteratorNext(
-       &iterator);
+    FillArrayData *tabRec =
+        reinterpret_cast<FillArrayData*>(oatGrowableListIteratorNext( &iterator));
     if (tabRec == NULL) break;
     alignBuffer(cUnit->codeBuffer, tabRec->offset);
     for (int i = 0; i < (tabRec->size + 1) / 2; i++) {
@@ -680,7 +678,7 @@ bool verifyCatchEntries(CompilationUnit* cUnit)
 
 void createMappingTables(CompilationUnit* cUnit)
 {
-  for (LIR* tgtLIR = (LIR *) cUnit->firstLIRInsn; tgtLIR != NULL; tgtLIR = NEXT_LIR(tgtLIR)) {
+  for (LIR* tgtLIR = cUnit->firstLIRInsn; tgtLIR != NULL; tgtLIR = NEXT_LIR(tgtLIR)) {
     if (!tgtLIR->flags.isNop && (tgtLIR->opcode == kPseudoSafepointPC)) {
       cUnit->pc2dexMappingTable.push_back(tgtLIR->offset);
       cUnit->pc2dexMappingTable.push_back(tgtLIR->dalvikOffset);
@@ -820,8 +818,7 @@ int assignSwitchTablesOffset(CompilationUnit* cUnit, int offset)
   GrowableListIterator iterator;
   oatGrowableListIteratorInit(&cUnit->switchTables, &iterator);
   while (true) {
-    SwitchTable *tabRec = (SwitchTable *) oatGrowableListIteratorNext(
-       &iterator);
+    SwitchTable *tabRec = reinterpret_cast<SwitchTable*>(oatGrowableListIteratorNext(&iterator));
     if (tabRec == NULL) break;
     tabRec->offset = offset;
     if (tabRec->table[0] == Instruction::kSparseSwitchSignature) {
@@ -840,8 +837,8 @@ int assignFillArrayDataOffset(CompilationUnit* cUnit, int offset)
   GrowableListIterator iterator;
   oatGrowableListIteratorInit(&cUnit->fillArrayData, &iterator);
   while (true) {
-    FillArrayData *tabRec = (FillArrayData *) oatGrowableListIteratorNext(
-       &iterator);
+    FillArrayData *tabRec =
+        reinterpret_cast<FillArrayData*>(oatGrowableListIteratorNext(&iterator));
     if (tabRec == NULL) break;
     tabRec->offset = offset;
     offset += tabRec->size;
@@ -932,11 +929,11 @@ LIR* insertCaseLabel(CompilationUnit* cUnit, int vaddr, int keyVal)
   if (it == cUnit->boundaryMap.end()) {
     LOG(FATAL) << "Error: didn't find vaddr 0x" << std::hex << vaddr;
   }
-  LIR* newLabel = (LIR*)oatNew(cUnit, sizeof(LIR), true, kAllocLIR);
+  LIR* newLabel = static_cast<LIR*>(oatNew(cUnit, sizeof(LIR), true, kAllocLIR));
   newLabel->dalvikOffset = vaddr;
   newLabel->opcode = kPseudoCaseLabel;
   newLabel->operands[0] = keyVal;
-  oatInsertLIRAfter(it->second, (LIR*)newLabel);
+  oatInsertLIRAfter(it->second, newLabel);
   return newLabel;
 }
 
@@ -944,12 +941,11 @@ void markPackedCaseLabels(CompilationUnit* cUnit, SwitchTable *tabRec)
 {
   const uint16_t* table = tabRec->table;
   int baseVaddr = tabRec->vaddr;
-  int *targets = (int*)&table[4];
+  const int *targets = reinterpret_cast<const int*>(&table[4]);
   int entries = table[1];
   int lowKey = s4FromSwitchData(&table[2]);
   for (int i = 0; i < entries; i++) {
-    tabRec->targets[i] = insertCaseLabel(cUnit, baseVaddr + targets[i],
-                                         i + lowKey);
+    tabRec->targets[i] = insertCaseLabel(cUnit, baseVaddr + targets[i], i + lowKey);
   }
 }
 
@@ -958,11 +954,10 @@ void markSparseCaseLabels(CompilationUnit* cUnit, SwitchTable *tabRec)
   const uint16_t* table = tabRec->table;
   int baseVaddr = tabRec->vaddr;
   int entries = table[1];
-  int* keys = (int*)&table[2];
-  int* targets = &keys[entries];
+  const int* keys = reinterpret_cast<const int*>(&table[2]);
+  const int* targets = &keys[entries];
   for (int i = 0; i < entries; i++) {
-    tabRec->targets[i] = insertCaseLabel(cUnit, baseVaddr + targets[i],
-                                         keys[i]);
+    tabRec->targets[i] = insertCaseLabel(cUnit, baseVaddr + targets[i], keys[i]);
   }
 }
 
@@ -972,7 +967,7 @@ void oatProcessSwitchTables(CompilationUnit* cUnit)
   oatGrowableListIteratorInit(&cUnit->switchTables, &iterator);
   while (true) {
     SwitchTable *tabRec =
-        (SwitchTable *) oatGrowableListIteratorNext(&iterator);
+        reinterpret_cast<SwitchTable*>(oatGrowableListIteratorNext(&iterator));
     if (tabRec == NULL) break;
     if (tabRec->table[0] == Instruction::kPackedSwitchSignature) {
       markPackedCaseLabels(cUnit, tabRec);
@@ -997,8 +992,8 @@ void dumpSparseSwitchTable(const uint16_t* table)
 {
   uint16_t ident = table[0];
   int entries = table[1];
-  int* keys = (int*)&table[2];
-  int* targets = &keys[entries];
+  const int* keys = reinterpret_cast<const int*>(&table[2]);
+  const int* targets = &keys[entries];
   LOG(INFO) <<  "Sparse switch table - ident:0x" << std::hex << ident
             << ", entries: " << std::dec << entries;
   for (int i = 0; i < entries; i++) {
@@ -1018,7 +1013,7 @@ void dumpPackedSwitchTable(const uint16_t* table)
    */
 {
   uint16_t ident = table[0];
-  int* targets = (int*)&table[4];
+  const int* targets = reinterpret_cast<const int*>(&table[4]);
   int entries = table[1];
   int lowKey = s4FromSwitchData(&table[2]);
   LOG(INFO) << "Packed switch table - ident:0x" << std::hex << ident
@@ -1037,7 +1032,7 @@ void dumpPackedSwitchTable(const uint16_t* table)
  */
 LIR* markBoundary(CompilationUnit* cUnit, int offset, const char* instStr)
 {
-  LIR* res = newLIR1(cUnit, kPseudoDalvikByteCodeBoundary, (intptr_t) instStr);
+  LIR* res = newLIR1(cUnit, kPseudoDalvikByteCodeBoundary, reinterpret_cast<uintptr_t>(instStr));
   if (cUnit->boundaryMap.find(offset) == cUnit->boundaryMap.end()) {
     cUnit->boundaryMap.Put(offset, res);
   }
diff --git a/src/compiler/codegen/codegen_util.h b/src/compiler/codegen/codegen_util.h
index 49d52e8f30..c50c0f08ce 100644
--- a/src/compiler/codegen/codegen_util.h
+++ b/src/compiler/codegen/codegen_util.h
@@ -19,7 +19,7 @@
 
 namespace art {
 
-inline int32_t s4FromSwitchData(const void* switchData) { return *(int32_t*) switchData; }
+inline int32_t s4FromSwitchData(const void* switchData) { return *reinterpret_cast<const int32_t*>(switchData); }
 inline RegisterClass oatRegClassBySize(OpSize size) { return (size == kUnsignedHalf || size == kSignedHalf || size == kUnsignedByte || size == kSignedByte ) ? kCoreReg : kAnyReg; }
 void oatAssembleLIR(CompilationUnit* cUnit);
 void setMemRefType(LIR* lir, bool isLoad, int memType);
diff --git a/src/compiler/codegen/gen_common.cc b/src/compiler/codegen/gen_common.cc
index fe10fe46af..c548376eeb 100644
--- a/src/compiler/codegen/gen_common.cc
+++ b/src/compiler/codegen/gen_common.cc
@@ -177,7 +177,7 @@ void callRuntimeHelperRegLocationRegLocation(CompilationUnit* cUnit, int helperO
 void callRuntimeHelperRegReg(CompilationUnit* cUnit, int helperOffset, int arg0, int arg1,
                              bool safepointPC) {
   int rTgt = callHelperSetup(cUnit, helperOffset);
-  DCHECK_NE((int)targetReg(kArg0), arg1);  // check copy into arg0 won't clobber arg1
+  DCHECK_NE(targetReg(kArg0), arg1);  // check copy into arg0 won't clobber arg1
   opRegCopy(cUnit, targetReg(kArg0), arg0);
   opRegCopy(cUnit, targetReg(kArg1), arg1);
   oatClobberCalleeSave(cUnit);
@@ -187,7 +187,7 @@ void callRuntimeHelperRegReg(CompilationUnit* cUnit, int helperOffset, int arg0,
 void callRuntimeHelperRegRegImm(CompilationUnit* cUnit, int helperOffset, int arg0, int arg1,
                                 int arg2, bool safepointPC) {
   int rTgt = callHelperSetup(cUnit, helperOffset);
-  DCHECK_NE((int)targetReg(kArg0), arg1);  // check copy into arg0 won't clobber arg1
+  DCHECK_NE(targetReg(kArg0), arg1);  // check copy into arg0 won't clobber arg1
   opRegCopy(cUnit, targetReg(kArg0), arg0);
   opRegCopy(cUnit, targetReg(kArg1), arg1);
   loadConstant(cUnit, targetReg(kArg2), arg2);
@@ -246,7 +246,7 @@ void genBarrier(CompilationUnit* cUnit)
 LIR* opUnconditionalBranch(CompilationUnit* cUnit, LIR* target)
 {
   LIR* branch = opBranchUnconditional(cUnit, kOpUncondBr);
-  branch->target = (LIR*) target;
+  branch->target = target;
   return branch;
 }
 
@@ -260,7 +260,7 @@ LIR* genCheck(CompilationUnit* cUnit, ConditionCode cCode,
                     cUnit->currentDalvikOffset);
   LIR* branch = opCondBranch(cUnit, cCode, tgt);
   // Remember branch target - will process later
-  oatInsertGrowableList(cUnit, &cUnit->throwLaunchpads, (intptr_t)tgt);
+  oatInsertGrowableList(cUnit, &cUnit->throwLaunchpads, reinterpret_cast<uintptr_t>(tgt));
   return branch;
 }
 
@@ -276,7 +276,7 @@ LIR* genImmedCheck(CompilationUnit* cUnit, ConditionCode cCode,
     branch = opCmpImmBranch(cUnit, cCode, reg, immVal, tgt);
   }
   // Remember branch target - will process later
-  oatInsertGrowableList(cUnit, &cUnit->throwLaunchpads, (intptr_t)tgt);
+  oatInsertGrowableList(cUnit, &cUnit->throwLaunchpads, reinterpret_cast<uintptr_t>(tgt));
   return branch;
 }
 
@@ -298,7 +298,7 @@ LIR* genRegRegCheck(CompilationUnit* cUnit, ConditionCode cCode,
                     cUnit->currentDalvikOffset, reg1, reg2);
   LIR* branch = opCmpBranch(cUnit, cCode, reg1, reg2, tgt);
   // Remember branch target - will process later
-  oatInsertGrowableList(cUnit, &cUnit->throwLaunchpads, (intptr_t)tgt);
+  oatInsertGrowableList(cUnit, &cUnit->throwLaunchpads, reinterpret_cast<uintptr_t>(tgt));
   return branch;
 }
 
@@ -329,8 +329,8 @@ void genCompareAndBranch(CompilationUnit* cUnit, Instruction::Code opcode,
       cond = kCondLe;
       break;
     default:
-      cond = (ConditionCode)0;
-      LOG(FATAL) << "Unexpected opcode " << (int)opcode;
+      cond = static_cast<ConditionCode>(0);
+      LOG(FATAL) << "Unexpected opcode " << opcode;
   }
   opCmpBranch(cUnit, cond, rlSrc1.lowReg, rlSrc2.lowReg, taken);
   opUnconditionalBranch(cUnit, fallThrough);
@@ -361,8 +361,8 @@ void genCompareZeroAndBranch(CompilationUnit* cUnit, Instruction::Code opcode,
       cond = kCondLe;
       break;
     default:
-      cond = (ConditionCode)0;
-      LOG(FATAL) << "Unexpected opcode " << (int)opcode;
+      cond = static_cast<ConditionCode>(0);
+      LOG(FATAL) << "Unexpected opcode " << opcode;
   }
   if (cUnit->instructionSet == kThumb2) {
     opRegImm(cUnit, kOpCmp, rlSrc.lowReg, 0);
@@ -601,7 +601,7 @@ void genSput(CompilationUnit* cUnit, uint32_t fieldIdx, RegLocation rlSrc,
         opRegCopy(cUnit, rBase, targetReg(kRet0));
       }
       LIR* skipTarget = newLIR0(cUnit, kPseudoTargetLabel);
-      branchOver->target = (LIR*)skipTarget;
+      branchOver->target = skipTarget;
       oatFreeTemp(cUnit, rMethod);
     }
     // rBase now holds static storage base
@@ -692,7 +692,7 @@ void genSget(CompilationUnit* cUnit, uint32_t fieldIdx, RegLocation rlDest,
         opRegCopy(cUnit, rBase, targetReg(kRet0));
       }
       LIR* skipTarget = newLIR0(cUnit, kPseudoTargetLabel);
-      branchOver->target = (LIR*)skipTarget;
+      branchOver->target = skipTarget;
       oatFreeTemp(cUnit, rMethod);
     }
     // rBase now holds static storage base
@@ -736,19 +736,19 @@ void genShowTarget(CompilationUnit* cUnit)
   LIR* branchOver = opCmpImmBranch(cUnit, kCondNe, targetReg(kInvokeTgt), 0, NULL);
   loadWordDisp(cUnit, targetReg(kSelf), ENTRYPOINT_OFFSET(pDebugMe), targetReg(kInvokeTgt));
   LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
-  branchOver->target = (LIR*)target;
+  branchOver->target = target;
 }
 
 void handleSuspendLaunchpads(CompilationUnit *cUnit)
 {
-  LIR** suspendLabel = (LIR **)cUnit->suspendLaunchpads.elemList;
+  LIR** suspendLabel = reinterpret_cast<LIR**>(cUnit->suspendLaunchpads.elemList);
   int numElems = cUnit->suspendLaunchpads.numUsed;
   int helperOffset = ENTRYPOINT_OFFSET(pTestSuspendFromCode);
   for (int i = 0; i < numElems; i++) {
     oatResetRegPool(cUnit);
     oatResetDefTracking(cUnit);
     LIR* lab = suspendLabel[i];
-    LIR* resumeLab = (LIR*)lab->operands[0];
+    LIR* resumeLab = reinterpret_cast<LIR*>(lab->operands[0]);
     cUnit->currentDalvikOffset = lab->operands[1];
     oatAppendLIR(cUnit, lab);
     int rTgt = callHelperSetup(cUnit, helperOffset);
@@ -759,18 +759,18 @@ void handleSuspendLaunchpads(CompilationUnit *cUnit)
 
 void handleIntrinsicLaunchpads(CompilationUnit *cUnit)
 {
-  LIR** intrinsicLabel = (LIR **)cUnit->intrinsicLaunchpads.elemList;
+  LIR** intrinsicLabel = reinterpret_cast<LIR**>(cUnit->intrinsicLaunchpads.elemList);
   int numElems = cUnit->intrinsicLaunchpads.numUsed;
   for (int i = 0; i < numElems; i++) {
     oatResetRegPool(cUnit);
     oatResetDefTracking(cUnit);
     LIR* lab = intrinsicLabel[i];
-    CallInfo* info = (CallInfo*)lab->operands[0];
+    CallInfo* info = reinterpret_cast<CallInfo*>(lab->operands[0]);
     cUnit->currentDalvikOffset = info->offset;
     oatAppendLIR(cUnit, lab);
     // NOTE: genInvoke handles markSafepointPC
     genInvoke(cUnit, info);
-    LIR* resumeLab = (LIR*)lab->operands[2];
+    LIR* resumeLab = reinterpret_cast<LIR*>(lab->operands[2]);
     if (resumeLab != NULL) {
       opUnconditionalBranch(cUnit, resumeLab);
     }
@@ -779,7 +779,7 @@ void handleIntrinsicLaunchpads(CompilationUnit *cUnit)
 
 void handleThrowLaunchpads(CompilationUnit *cUnit)
 {
-  LIR** throwLabel = (LIR **)cUnit->throwLaunchpads.elemList;
+  LIR** throwLabel = reinterpret_cast<LIR**>(cUnit->throwLaunchpads.elemList);
   int numElems = cUnit->throwLaunchpads.numUsed;
   for (int i = 0; i < numElems; i++) {
     oatResetRegPool(cUnit);
@@ -1031,8 +1031,8 @@ void genConstClass(CompilationUnit* cUnit, uint32_t type_idx,
       oatClobberSReg(cUnit, rlDest.sRegLow);
       // Rejoin code paths
       LIR* target2 = newLIR0(cUnit, kPseudoTargetLabel);
-      branch1->target = (LIR*)target1;
-      branch2->target = (LIR*)target2;
+      branch1->target = target1;
+      branch2->target = target2;
     } else {
       // Fast path, we're done - just store result
       storeValue(cUnit, rlDest, rlResult);
@@ -1172,7 +1172,7 @@ void genInstanceof(CompilationUnit* cUnit, uint32_t type_idx, RegLocation rlDest
       loadValueDirectFixed(cUnit, rlSrc, targetReg(kArg0));  /* reload Ref */
       // Rejoin code paths
       LIR* hopTarget = newLIR0(cUnit, kPseudoTargetLabel);
-      hopBranch->target = (LIR*)hopTarget;
+      hopBranch->target = hopTarget;
     }
   }
   /* kArg0 is ref, kArg2 is class. If ref==null, use directly as bool result */
@@ -1257,7 +1257,7 @@ void genCheckCast(CompilationUnit* cUnit, uint32_t type_idx, RegLocation rlSrc)
       opRegCopy(cUnit, classReg, targetReg(kRet0)); // Align usage with fast path
       // Rejoin code paths
       LIR* hopTarget = newLIR0(cUnit, kPseudoTargetLabel);
-      hopBranch->target = (LIR*)hopTarget;
+      hopBranch->target = hopTarget;
     }
   }
   // At this point, classReg (kArg2) has class
@@ -1705,8 +1705,7 @@ bool genArithOpInt(CompilationUnit* cUnit, Instruction::Code opcode, RegLocation
       op = kOpLsr;
       break;
     default:
-      LOG(FATAL) << "Invalid word arith op: " <<
-        (int)opcode;
+      LOG(FATAL) << "Invalid word arith op: " << opcode;
   }
   if (!isDivRem) {
     if (unary) {
@@ -1901,7 +1900,7 @@ bool genArithOpIntLit(CompilationUnit* cUnit, Instruction::Code opcode,
                       RegLocation rlDest, RegLocation rlSrc, int lit)
 {
   RegLocation rlResult;
-  OpKind op = (OpKind)0;    /* Make gcc happy */
+  OpKind op = static_cast<OpKind>(0);    /* Make gcc happy */
   int shiftOp = false;
   bool isDiv = false;
 
@@ -2296,9 +2295,9 @@ void genSuspendTest(CompilationUnit* cUnit, int optFlags)
   LIR* branch = opTestSuspend(cUnit, NULL);
   LIR* retLab = newLIR0(cUnit, kPseudoTargetLabel);
   LIR* target = rawLIR(cUnit, cUnit->currentDalvikOffset, kPseudoSuspendTarget,
-                       (intptr_t)retLab, cUnit->currentDalvikOffset);
-  branch->target = (LIR*)target;
-  oatInsertGrowableList(cUnit, &cUnit->suspendLaunchpads, (intptr_t)target);
+                       reinterpret_cast<uintptr_t>(retLab), cUnit->currentDalvikOffset);
+  branch->target = target;
+  oatInsertGrowableList(cUnit, &cUnit->suspendLaunchpads, reinterpret_cast<uintptr_t>(target));
 }
 
 /* Check if we need to check for pending suspend request */
@@ -2309,11 +2308,12 @@ void genSuspendTestAndBranch(CompilationUnit* cUnit, int optFlags, LIR* target)
     return;
   }
   opTestSuspend(cUnit, target);
-  LIR* launchPad = rawLIR(cUnit, cUnit->currentDalvikOffset, kPseudoSuspendTarget, (intptr_t)target,
-                          cUnit->currentDalvikOffset);
+  LIR* launchPad =
+      rawLIR(cUnit, cUnit->currentDalvikOffset, kPseudoSuspendTarget,
+             reinterpret_cast<uintptr_t>(target), cUnit->currentDalvikOffset);
   oatFlushAllRegs(cUnit);
   opUnconditionalBranch(cUnit, launchPad);
-  oatInsertGrowableList(cUnit, &cUnit->suspendLaunchpads, (intptr_t)launchPad);
+  oatInsertGrowableList(cUnit, &cUnit->suspendLaunchpads, reinterpret_cast<uintptr_t>(launchPad));
 }
 
 }  // namespace art
diff --git a/src/compiler/codegen/gen_invoke.cc b/src/compiler/codegen/gen_invoke.cc
index bac6a76762..fbab59f118 100644
--- a/src/compiler/codegen/gen_invoke.cc
+++ b/src/compiler/codegen/gen_invoke.cc
@@ -113,13 +113,13 @@ void scanMethodLiteralPool(CompilationUnit* cUnit, LIR** methodTarget, LIR** cod
   LIR* curTarget = cUnit->methodLiteralList;
   LIR* nextTarget = curTarget != NULL ? curTarget->next : NULL;
   while (curTarget != NULL && nextTarget != NULL) {
-    if (curTarget->operands[0] == (int)dexFile &&
-      nextTarget->operands[0] == (int)dexMethodIdx) {
+    if (curTarget->operands[0] == reinterpret_cast<intptr_t>(dexFile) &&
+      nextTarget->operands[0] == static_cast<int>(dexMethodIdx)) {
     *codeTarget = curTarget;
     *methodTarget = nextTarget;
     DCHECK((*codeTarget)->next == *methodTarget);
-    DCHECK_EQ((*codeTarget)->operands[0], (int)dexFile);
-    DCHECK_EQ((*methodTarget)->operands[0], (int)dexMethodIdx);
+    DCHECK_EQ((*codeTarget)->operands[0], reinterpret_cast<intptr_t>(dexFile));
+    DCHECK_EQ((*methodTarget)->operands[0], static_cast<int>(dexMethodIdx));
     break;
     }
     curTarget = nextTarget->next;
@@ -144,7 +144,7 @@ int nextSDCallInsn(CompilationUnit* cUnit, CallInfo* info,
   if (directCode != 0 && directMethod != 0) {
     switch (state) {
     case 0:  // Get the current Method* [sets kArg0]
-      if (directCode != (uintptr_t)-1) {
+      if (directCode != static_cast<unsigned int>(-1)) {
         loadConstant(cUnit, targetReg(kInvokeTgt), directCode);
       } else {
         LIR* dataTarget = scanLiteralPool(cUnit->codeLiteralList, dexIdx, 0);
@@ -154,9 +154,9 @@ int nextSDCallInsn(CompilationUnit* cUnit, CallInfo* info,
         }
         LIR* loadPcRel = opPcRelLoad(cUnit, targetReg(kInvokeTgt), dataTarget);
         oatAppendLIR(cUnit, loadPcRel);
-        DCHECK_EQ(cUnit->instructionSet, kThumb2) << (void*)dataTarget;
+        DCHECK_EQ(cUnit->instructionSet, kThumb2) << reinterpret_cast<void*>(dataTarget);
       }
-      if (directMethod != (uintptr_t)-1) {
+      if (directMethod != static_cast<unsigned int>(-1)) {
         loadConstant(cUnit, targetReg(kArg0), directMethod);
       } else {
         LIR* dataTarget = scanLiteralPool(cUnit->methodLiteralList, dexIdx, 0);
@@ -166,7 +166,7 @@ int nextSDCallInsn(CompilationUnit* cUnit, CallInfo* info,
         }
         LIR* loadPcRel = opPcRelLoad(cUnit, targetReg(kArg0), dataTarget);
         oatAppendLIR(cUnit, loadPcRel);
-        DCHECK_EQ(cUnit->instructionSet, kThumb2) << (void*)dataTarget;
+        DCHECK_EQ(cUnit->instructionSet, kThumb2) << reinterpret_cast<void*>(dataTarget);
       }
       break;
     default:
@@ -183,7 +183,7 @@ int nextSDCallInsn(CompilationUnit* cUnit, CallInfo* info,
         AbstractMethod::DexCacheResolvedMethodsOffset().Int32Value(), targetReg(kArg0));
       // Set up direct code if known.
       if (directCode != 0) {
-        if (directCode != (uintptr_t)-1) {
+        if (directCode != static_cast<unsigned int>(-1)) {
           loadConstant(cUnit, targetReg(kInvokeTgt), directCode);
         } else {
           LIR* dataTarget = scanLiteralPool(cUnit->codeLiteralList, dexIdx, 0);
@@ -193,7 +193,7 @@ int nextSDCallInsn(CompilationUnit* cUnit, CallInfo* info,
           }
           LIR* loadPcRel = opPcRelLoad(cUnit, targetReg(kInvokeTgt), dataTarget);
           oatAppendLIR(cUnit, loadPcRel);
-          DCHECK_EQ(cUnit->instructionSet, kThumb2) << (void*)dataTarget;
+          DCHECK_EQ(cUnit->instructionSet, kThumb2) << reinterpret_cast<void*>(dataTarget);
         }
       }
       break;
@@ -287,7 +287,7 @@ int nextInterfaceCallInsn(CompilationUnit* cUnit, CallInfo* info, int state,
           loadWordDisp(cUnit, targetReg(kSelf), trampoline, targetReg(kInvokeTgt));
         }
         // Get the interface Method* [sets kArg0]
-        if (directMethod != (uintptr_t)-1) {
+        if (directMethod != static_cast<unsigned int>(-1)) {
           loadConstant(cUnit, targetReg(kArg0), directMethod);
         } else {
           LIR* dataTarget = scanLiteralPool(cUnit->methodLiteralList, dexIdx, 0);
@@ -297,7 +297,7 @@ int nextInterfaceCallInsn(CompilationUnit* cUnit, CallInfo* info, int state,
           }
           LIR* loadPcRel = opPcRelLoad(cUnit, targetReg(kArg0), dataTarget);
           oatAppendLIR(cUnit, loadPcRel);
-          DCHECK_EQ(cUnit->instructionSet, kThumb2) << (void*)dataTarget;
+          DCHECK_EQ(cUnit->instructionSet, kThumb2) << reinterpret_cast<void*>(dataTarget);
         }
         break;
       default:
@@ -509,8 +509,7 @@ int genDalvikArgsNoRange(CompilationUnit* cUnit, CallInfo* info,
                           type, skipThis);
 
   if (pcrLabel) {
-    *pcrLabel = genNullCheck(cUnit, info->args[0].sRegLow, targetReg(kArg1),
-                             info->optFlags);
+    *pcrLabel = genNullCheck(cUnit, info->args[0].sRegLow, targetReg(kArg1), info->optFlags);
   }
   return callState;
 }
@@ -677,9 +676,9 @@ bool genInlinedCharAt(CompilationUnit* cUnit, CallInfo* info)
     loadWordDisp(cUnit, rlObj.lowReg, valueOffset, regPtr);
     if (rangeCheck) {
       // Set up a launch pad to allow retry in case of bounds violation */
-      launchPad = rawLIR(cUnit, 0, kPseudoIntrinsicRetry, (uintptr_t)info);
+      launchPad = rawLIR(cUnit, 0, kPseudoIntrinsicRetry, reinterpret_cast<uintptr_t>(info));
       oatInsertGrowableList(cUnit, &cUnit->intrinsicLaunchpads,
-                            (intptr_t)launchPad);
+                            reinterpret_cast<uintptr_t>(launchPad));
       opRegReg(cUnit, kOpCmp, rlIdx.lowReg, regMax);
       oatFreeTemp(cUnit, regMax);
       opCondBranch(cUnit, kCondCs, launchPad);
@@ -689,9 +688,9 @@ bool genInlinedCharAt(CompilationUnit* cUnit, CallInfo* info)
       regMax = oatAllocTemp(cUnit);
       loadWordDisp(cUnit, rlObj.lowReg, countOffset, regMax);
       // Set up a launch pad to allow retry in case of bounds violation */
-      launchPad = rawLIR(cUnit, 0, kPseudoIntrinsicRetry, (uintptr_t)info);
+      launchPad = rawLIR(cUnit, 0, kPseudoIntrinsicRetry, reinterpret_cast<uintptr_t>(info));
       oatInsertGrowableList(cUnit, &cUnit->intrinsicLaunchpads,
-                            (intptr_t)launchPad);
+                            reinterpret_cast<uintptr_t>(launchPad));
       opRegReg(cUnit, kOpCmp, rlIdx.lowReg, regMax);
       oatFreeTemp(cUnit, regMax);
       opCondBranch(cUnit, kCondCc, launchPad);
@@ -865,9 +864,8 @@ bool genInlinedIndexOf(CompilationUnit* cUnit, CallInfo* info,
   }
   int rTgt = (cUnit->instructionSet != kX86) ? loadHelper(cUnit, ENTRYPOINT_OFFSET(pIndexOf)) : 0;
   genNullCheck(cUnit, rlObj.sRegLow, regPtr, info->optFlags);
-  LIR* launchPad = rawLIR(cUnit, 0, kPseudoIntrinsicRetry, (uintptr_t)info);
-  oatInsertGrowableList(cUnit, &cUnit->intrinsicLaunchpads,
-              (intptr_t)launchPad);
+  LIR* launchPad = rawLIR(cUnit, 0, kPseudoIntrinsicRetry, reinterpret_cast<uintptr_t>(info));
+  oatInsertGrowableList(cUnit, &cUnit->intrinsicLaunchpads, reinterpret_cast<uintptr_t>(launchPad));
   opCmpImmBranch(cUnit, kCondGt, regChar, 0xFFFF, launchPad);
   // NOTE: not a safepoint
   if (cUnit->instructionSet != kX86) {
@@ -876,7 +874,7 @@ bool genInlinedIndexOf(CompilationUnit* cUnit, CallInfo* info,
     opThreadMem(cUnit, kOpBlx, ENTRYPOINT_OFFSET(pIndexOf));
   }
   LIR* resumeTgt = newLIR0(cUnit, kPseudoTargetLabel);
-  launchPad->operands[2] = (uintptr_t)resumeTgt;
+  launchPad->operands[2] = reinterpret_cast<uintptr_t>(resumeTgt);
   // Record that we've already inlined & null checked
   info->optFlags |= (MIR_INLINED | MIR_IGNORE_NULL_CHECK);
   RegLocation rlReturn = oatGetReturn(cUnit, false);
@@ -905,9 +903,8 @@ bool genInlinedStringCompareTo(CompilationUnit* cUnit, CallInfo* info)
       loadHelper(cUnit, ENTRYPOINT_OFFSET(pStringCompareTo)) : 0;
   genNullCheck(cUnit, rlThis.sRegLow, regThis, info->optFlags);
   //TUNING: check if rlCmp.sRegLow is already null checked
-  LIR* launchPad = rawLIR(cUnit, 0, kPseudoIntrinsicRetry, (uintptr_t)info);
-  oatInsertGrowableList(cUnit, &cUnit->intrinsicLaunchpads,
-                        (intptr_t)launchPad);
+  LIR* launchPad = rawLIR(cUnit, 0, kPseudoIntrinsicRetry, reinterpret_cast<uintptr_t>(info));
+  oatInsertGrowableList(cUnit, &cUnit->intrinsicLaunchpads, reinterpret_cast<uintptr_t>(launchPad));
   opCmpImmBranch(cUnit, kCondEq, regCmp, 0, launchPad);
   // NOTE: not a safepoint
   if (cUnit->instructionSet != kX86) {
diff --git a/src/compiler/codegen/gen_loadstore.cc b/src/compiler/codegen/gen_loadstore.cc
index 600b324841..b5802ae231 100644
--- a/src/compiler/codegen/gen_loadstore.cc
+++ b/src/compiler/codegen/gen_loadstore.cc
@@ -166,11 +166,11 @@ void storeValue(CompilationUnit* cUnit, RegLocation rlDest, RegLocation rlSrc)
   oatResetDefLoc(cUnit, rlDest);
   if (oatIsDirty(cUnit, rlDest.lowReg) &&
       oatLiveOut(cUnit, rlDest.sRegLow)) {
-    defStart = (LIR* )cUnit->lastLIRInsn;
+    defStart = cUnit->lastLIRInsn;
     storeBaseDisp(cUnit, targetReg(kSp), oatSRegOffset(cUnit, rlDest.sRegLow),
                   rlDest.lowReg, kWord);
     oatMarkClean(cUnit, rlDest);
-    defEnd = (LIR* )cUnit->lastLIRInsn;
+    defEnd = cUnit->lastLIRInsn;
     oatMarkDef(cUnit, rlDest, defStart, defEnd);
   }
 }
@@ -245,13 +245,13 @@ void storeValueWide(CompilationUnit* cUnit, RegLocation rlDest,
       oatIsDirty(cUnit, rlDest.highReg)) &&
       (oatLiveOut(cUnit, rlDest.sRegLow) ||
       oatLiveOut(cUnit, oatSRegHi(rlDest.sRegLow)))) {
-    defStart = (LIR*)cUnit->lastLIRInsn;
+    defStart = cUnit->lastLIRInsn;
     DCHECK_EQ((SRegToVReg(cUnit, rlDest.sRegLow)+1),
               SRegToVReg(cUnit, oatSRegHi(rlDest.sRegLow)));
     storeBaseDispWide(cUnit, targetReg(kSp), oatSRegOffset(cUnit, rlDest.sRegLow),
                       rlDest.lowReg, rlDest.highReg);
     oatMarkClean(cUnit, rlDest);
-    defEnd = (LIR*)cUnit->lastLIRInsn;
+    defEnd = cUnit->lastLIRInsn;
     oatMarkDefWide(cUnit, rlDest, defStart, defEnd);
   }
 }
diff --git a/src/compiler/codegen/local_optimizations.cc b/src/compiler/codegen/local_optimizations.cc
index e485f03a36..03f9463324 100644
--- a/src/compiler/codegen/local_optimizations.cc
+++ b/src/compiler/codegen/local_optimizations.cc
@@ -50,7 +50,7 @@ void convertMemOpIntoMove(CompilationUnit* cUnit, LIR* origLIR, int dest,
    * will need to be re-checked (eg the new dest clobbers the src used in
    * thisLIR).
    */
-  oatInsertLIRAfter((LIR*) origLIR, (LIR*) moveLIR);
+  oatInsertLIRAfter(origLIR, moveLIR);
 }
 
 /*
@@ -240,15 +240,14 @@ void applyLoadStoreElimination(CompilationUnit* cUnit, LIR* headLIR,
         DEBUG_OPT(dumpDependentInsnPair(thisLIR, checkLIR, "REG CLOBBERED"));
         /* Only sink store instructions */
         if (sinkDistance && !isThisLIRLoad) {
-          LIR* newStoreLIR =
-              (LIR* ) oatNew(cUnit, sizeof(LIR), true, kAllocLIR);
+          LIR* newStoreLIR = static_cast<LIR*>(oatNew(cUnit, sizeof(LIR), true, kAllocLIR));
           *newStoreLIR = *thisLIR;
           /*
            * Stop point found - insert *before* the checkLIR
            * since the instruction list is scanned in the
            * top-down order.
            */
-          oatInsertLIRBefore((LIR*) checkLIR, (LIR*) newStoreLIR);
+          oatInsertLIRBefore(checkLIR, newStoreLIR);
           thisLIR->flags.isNop = true;
         }
         break;
@@ -429,14 +428,13 @@ void applyLoadHoisting(CompilationUnit* cUnit, LIR* headLIR, LIR* tailLIR)
       /* Found a slot to hoist to */
       if (slot >= 0) {
         LIR* curLIR = prevInstList[slot];
-        LIR* newLoadLIR = (LIR* ) oatNew(cUnit, sizeof(LIR),
-                             true, kAllocLIR);
+        LIR* newLoadLIR = static_cast<LIR*>(oatNew(cUnit, sizeof(LIR), true, kAllocLIR));
         *newLoadLIR = *thisLIR;
         /*
          * Insertion is guaranteed to succeed since checkLIR
          * is never the first LIR on the list
          */
-        oatInsertLIRBefore((LIR*) curLIR, (LIR*) newLoadLIR);
+        oatInsertLIRBefore(curLIR, newLoadLIR);
         thisLIR->flags.isNop = true;
       }
     }
@@ -447,11 +445,49 @@ void oatApplyLocalOptimizations(CompilationUnit* cUnit, LIR* headLIR,
                     LIR* tailLIR)
 {
   if (!(cUnit->disableOpt & (1 << kLoadStoreElimination))) {
-    applyLoadStoreElimination(cUnit, (LIR* ) headLIR,
-                  (LIR* ) tailLIR);
+    applyLoadStoreElimination(cUnit, headLIR, tailLIR);
   }
   if (!(cUnit->disableOpt & (1 << kLoadHoisting))) {
-    applyLoadHoisting(cUnit, (LIR* ) headLIR, (LIR* ) tailLIR);
+    applyLoadHoisting(cUnit, headLIR, tailLIR);
+  }
+}
+
+/*
+ * Nop any unconditional branches that go to the next instruction.
+ * Note: new redundant branches may be inserted later, and we'll
+ * use a check in final instruction assembly to nop those out.
+ */
+void removeRedundantBranches(CompilationUnit* cUnit)
+{
+  LIR* thisLIR;
+
+  for (thisLIR = cUnit->firstLIRInsn; thisLIR != cUnit->lastLIRInsn; thisLIR = NEXT_LIR(thisLIR)) {
+
+    /* Branch to the next instruction */
+    if (branchUnconditional(thisLIR)) {
+      LIR* nextLIR = thisLIR;
+
+      while (true) {
+        nextLIR = NEXT_LIR(nextLIR);
+
+        /*
+         * Is the branch target the next instruction?
+         */
+        if (nextLIR == thisLIR->target) {
+          thisLIR->flags.isNop = true;
+          break;
+        }
+
+        /*
+         * Found real useful stuff between the branch and the target.
+         * Need to explicitly check the lastLIRInsn here because it
+         * might be the last real instruction.
+         */
+        if (!isPseudoOpcode(nextLIR->opcode) ||
+          (nextLIR == cUnit->lastLIRInsn))
+          break;
+      }
+    }
   }
 }
 
diff --git a/src/compiler/codegen/local_optimizations.h b/src/compiler/codegen/local_optimizations.h
index 440090f27a..5f0c17b901 100644
--- a/src/compiler/codegen/local_optimizations.h
+++ b/src/compiler/codegen/local_optimizations.h
@@ -20,6 +20,7 @@
 namespace art {
 
 void oatApplyLocalOptimizations(CompilationUnit* cUnit, LIR* headLIR, LIR* tailLIR);
+void removeRedundantBranches(CompilationUnit* cUnit);
 
 }  // namespace art
 
diff --git a/src/compiler/codegen/method_bitcode.cc b/src/compiler/codegen/method_bitcode.cc
index d6f1ae9034..2996e9a29f 100644
--- a/src/compiler/codegen/method_bitcode.cc
+++ b/src/compiler/codegen/method_bitcode.cc
@@ -46,7 +46,7 @@ llvm::BasicBlock* getLLVMBlock(CompilationUnit* cUnit, int id)
 
 llvm::Value* getLLVMValue(CompilationUnit* cUnit, int sReg)
 {
-  return (llvm::Value*)oatGrowableListGetElement(&cUnit->llvmValues, sReg);
+  return reinterpret_cast<llvm::Value*>(oatGrowableListGetElement(&cUnit->llvmValues, sReg));
 }
 
 // Replace the placeholder value with the real definition
@@ -60,7 +60,7 @@ void defineValue(CompilationUnit* cUnit, llvm::Value* val, int sReg)
   }
   placeholder->replaceAllUsesWith(val);
   val->takeName(placeholder);
-  cUnit->llvmValues.elemList[sReg] = (intptr_t)val;
+  cUnit->llvmValues.elemList[sReg] = reinterpret_cast<uintptr_t>(val);
   llvm::Instruction* inst = llvm::dyn_cast<llvm::Instruction>(placeholder);
   DCHECK(inst != NULL);
   inst->eraseFromParent();
@@ -173,10 +173,9 @@ void createLocFromValue(CompilationUnit* cUnit, llvm::Value* val)
 
   if (cUnit->printMe && loc.home) {
     if (loc.wide) {
-      LOG(INFO) << "Promoted wide " << s << " to regs " << static_cast<int>(loc.lowReg)
-                << "/" << loc.highReg;
+      LOG(INFO) << "Promoted wide " << s << " to regs " << loc.lowReg << "/" << loc.highReg;
     } else {
-      LOG(INFO) << "Promoted " << s << " to reg " << static_cast<int>(loc.lowReg);
+      LOG(INFO) << "Promoted " << s << " to reg " << loc.lowReg;
     }
   }
   cUnit->locMap.Put(val, loc);
@@ -638,8 +637,8 @@ void convertInvoke(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir,
   if (info->result.location != kLocInvalid) {
     defineValue(cUnit, res, info->result.origSReg);
     if (info->result.ref) {
-      setShadowFrameEntry(cUnit, (llvm::Value*)
-                          cUnit->llvmValues.elemList[info->result.origSReg]);
+      setShadowFrameEntry(cUnit, reinterpret_cast<llvm::Value*>
+                          (cUnit->llvmValues.elemList[info->result.origSReg]));
     }
   }
 }
@@ -866,6 +865,7 @@ bool convertMIRNode(CompilationUnit* cUnit, MIR* mir, BasicBlock* bb,
   RegLocation rlSrc[3];
   RegLocation rlDest = badLoc;
   Instruction::Code opcode = mir->dalvikInsn.opcode;
+  int opVal = opcode;
   uint32_t vB = mir->dalvikInsn.vB;
   uint32_t vC = mir->dalvikInsn.vC;
   int optFlags = mir->optimizationFlags;
@@ -873,11 +873,10 @@ bool convertMIRNode(CompilationUnit* cUnit, MIR* mir, BasicBlock* bb,
   bool objectDefinition = false;
 
   if (cUnit->printMe) {
-    if ((int)opcode < kMirOpFirst) {
-      LOG(INFO) << ".. " << Instruction::Name(opcode) << " 0x"
-                << std::hex << (int)opcode;
+    if (opVal < kMirOpFirst) {
+      LOG(INFO) << ".. " << Instruction::Name(opcode) << " 0x" << std::hex << opVal;
     } else {
-      LOG(INFO) << ".. opcode 0x" << std::hex << (int)opcode;
+      LOG(INFO) << extendedMIROpNames[opVal - kMirOpFirst] << " 0x" << std::hex << opVal;
     }
   }
 
@@ -1679,8 +1678,8 @@ bool convertMIRNode(CompilationUnit* cUnit, MIR* mir, BasicBlock* bb,
       res = true;
   }
   if (objectDefinition) {
-    setShadowFrameEntry(cUnit, (llvm::Value*)
-                        cUnit->llvmValues.elemList[rlDest.origSReg]);
+    setShadowFrameEntry(cUnit, reinterpret_cast<llvm::Value*>
+                        (cUnit->llvmValues.elemList[rlDest.origSReg]));
   }
   return res;
 }
@@ -1690,7 +1689,7 @@ void convertExtendedMIR(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir,
                         llvm::BasicBlock* llvmBB)
 {
 
-  switch ((ExtendedMIROpcode)mir->dalvikInsn.opcode) {
+  switch (static_cast<ExtendedMIROpcode>(mir->dalvikInsn.opcode)) {
     case kMirOpPhi: {
       RegLocation rlDest = cUnit->regLocation[mir->ssaRep->defs[0]];
       /*
@@ -1703,7 +1702,7 @@ void convertExtendedMIR(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir,
       if (rlDest.highWord) {
         return;  // No Phi node - handled via low word
       }
-      int* incoming = (int*)mir->dalvikInsn.vB;
+      int* incoming = reinterpret_cast<int*>(mir->dalvikInsn.vB);
       llvm::Type* phiType =
           llvmTypeFromLocRec(cUnit, rlDest);
       llvm::PHINode* phi = cUnit->irb->CreatePHI(phiType, mir->ssaRep->numUses);
@@ -1823,9 +1822,8 @@ bool methodBlockBitcodeConversion(CompilationUnit* cUnit, BasicBlock* bb)
 
   if (bb->blockType == kEntryBlock) {
     setMethodInfo(cUnit);
-    bool *canBeRef = (bool*)  oatNew(cUnit, sizeof(bool) *
-                                     cUnit->numDalvikRegisters, true,
-                                     kAllocMisc);
+    bool *canBeRef = static_cast<bool*>(oatNew(cUnit, sizeof(bool) * cUnit->numDalvikRegisters,
+                                               true, kAllocMisc));
     for (int i = 0; i < cUnit->numSSARegs; i++) {
       int vReg = SRegToVReg(cUnit, i);
       if (vReg > SSA_METHOD_BASEREG) {
@@ -1838,9 +1836,8 @@ bool methodBlockBitcodeConversion(CompilationUnit* cUnit, BasicBlock* bb)
       }
     }
     if (cUnit->numShadowFrameEntries > 0) {
-      cUnit->shadowMap = (int*) oatNew(cUnit, sizeof(int) *
-                                       cUnit->numShadowFrameEntries, true,
-                                       kAllocMisc);
+      cUnit->shadowMap = static_cast<int*>(oatNew(cUnit, sizeof(int) * cUnit->numShadowFrameEntries,
+                                                  true, kAllocMisc));
       for (int i = 0, j = 0; i < cUnit->numDalvikRegisters; i++) {
         if (canBeRef[i]) {
           cUnit->shadowMap[j++] = i;
@@ -1902,7 +1899,7 @@ bool methodBlockBitcodeConversion(CompilationUnit* cUnit, BasicBlock* bb)
                                      bb->successorBlockList.blocks.numUsed);
         while (true) {
           SuccessorBlockInfo *successorBlockInfo =
-              (SuccessorBlockInfo *) oatGrowableListIteratorNext(&iter);
+              reinterpret_cast<SuccessorBlockInfo*>(oatGrowableListIteratorNext(&iter));
           if (successorBlockInfo == NULL) break;
           llvm::BasicBlock *target =
               getLLVMBlock(cUnit, successorBlockInfo->block->id);
@@ -2077,11 +2074,11 @@ void oatMethodMIR2Bitcode(CompilationUnit* cUnit)
          cUnit->irb->GetJLong(0) : cUnit->irb->GetJInt(0);
       val = emitConst(cUnit, immValue, cUnit->regLocation[i]);
       val->setName(llvmSSAName(cUnit, i));
-      oatInsertGrowableList(cUnit, &cUnit->llvmValues, (intptr_t)val);
+      oatInsertGrowableList(cUnit, &cUnit->llvmValues, reinterpret_cast<uintptr_t>(val));
     } else {
       // Recover previously-created argument values
       llvm::Value* argVal = arg_iter++;
-      oatInsertGrowableList(cUnit, &cUnit->llvmValues, (intptr_t)argVal);
+      oatInsertGrowableList(cUnit, &cUnit->llvmValues, reinterpret_cast<uintptr_t>(argVal));
     }
   }
 
@@ -2835,8 +2832,7 @@ void cvtSwitch(CompilationUnit* cUnit, llvm::Instruction* inst)
 void cvtInvoke(CompilationUnit* cUnit, llvm::CallInst* callInst,
                bool isVoid, bool isFilledNewArray)
 {
-  CallInfo* info = (CallInfo*)oatNew(cUnit, sizeof(CallInfo), true,
-                                         kAllocMisc);
+  CallInfo* info = static_cast<CallInfo*>(oatNew(cUnit, sizeof(CallInfo), true, kAllocMisc));
   if (isVoid) {
     info->result.location = kLocInvalid;
   } else {
@@ -2859,8 +2855,8 @@ void cvtInvoke(CompilationUnit* cUnit, llvm::CallInst* callInst,
     RegLocation tLoc = getLoc(cUnit, callInst->getArgOperand(i));
     info->numArgWords += tLoc.wide ? 2 : 1;
   }
-  info->args = (info->numArgWords == 0) ? NULL : (RegLocation*)
-      oatNew(cUnit, sizeof(RegLocation) * info->numArgWords, false, kAllocMisc);
+  info->args = (info->numArgWords == 0) ? NULL : static_cast<RegLocation*>
+      (oatNew(cUnit, sizeof(RegLocation) * info->numArgWords, false, kAllocMisc));
   // Now, fill in the location records, synthesizing high loc of wide vals
   for (int i = 3, next = 0; next < info->numArgWords;) {
     info->args[next] = getLoc(cUnit, callInst->getArgOperand(i++));
@@ -2933,8 +2929,8 @@ bool methodBitcodeBlockCodeGen(CompilationUnit* cUnit, llvm::BasicBlock* bb)
     oatClobberAllRegs(cUnit);
 
     if (isEntry) {
-      RegLocation* argLocs = (RegLocation*)
-          oatNew(cUnit, sizeof(RegLocation) * cUnit->numIns, true, kAllocMisc);
+      RegLocation* argLocs = static_cast<RegLocation*>
+          (oatNew(cUnit, sizeof(RegLocation) * cUnit->numIns, true, kAllocMisc));
       llvm::Function::arg_iterator it(cUnit->func->arg_begin());
       llvm::Function::arg_iterator it_end(cUnit->func->arg_end());
       // Skip past Method*
@@ -3301,8 +3297,7 @@ bool methodBitcodeBlockCodeGen(CompilationUnit* cUnit, llvm::BasicBlock* bb)
                 break;
 
               default:
-                LOG(FATAL) << "Unexpected intrinsic " << (int)id << ", "
-                           << cUnit->intrinsic_helper->GetName(id);
+                LOG(FATAL) << "Unexpected intrinsic " << cUnit->intrinsic_helper->GetName(id);
             }
           }
           break;
@@ -3409,7 +3404,7 @@ void oatMethodBitcode2LIR(CompilationUnit* cUnit)
   int numBasicBlocks = func->getBasicBlockList().size();
   // Allocate a list for LIR basic block labels
   cUnit->blockLabelList =
-    (LIR*)oatNew(cUnit, sizeof(LIR) * numBasicBlocks, true, kAllocLIR);
+    static_cast<LIR*>(oatNew(cUnit, sizeof(LIR) * numBasicBlocks, true, kAllocLIR));
   LIR* labelList = cUnit->blockLabelList;
   int nextLabel = 0;
   for (llvm::Function::iterator i = func->begin(),
diff --git a/src/compiler/codegen/method_codegen_driver.cc b/src/compiler/codegen/method_codegen_driver.cc
index 4ca06b70da..b41bd830ba 100644
--- a/src/compiler/codegen/method_codegen_driver.cc
+++ b/src/compiler/codegen/method_codegen_driver.cc
@@ -184,8 +184,7 @@ void genInvoke(CompilationUnit* cUnit, CallInfo* info)
 CallInfo* oatNewCallInfo(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir,
                          InvokeType type, bool isRange)
 {
-  CallInfo* info = (CallInfo*)oatNew(cUnit, sizeof(CallInfo), true,
-                                         kAllocMisc);
+  CallInfo* info = static_cast<CallInfo*>(oatNew(cUnit, sizeof(CallInfo), true, kAllocMisc));
   MIR* moveResultMIR = oatFindMoveResult(cUnit, bb, mir);
   if (moveResultMIR == NULL) {
     info->result.location = kLocInvalid;
@@ -194,8 +193,8 @@ CallInfo* oatNewCallInfo(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir,
     moveResultMIR->dalvikInsn.opcode = Instruction::NOP;
   }
   info->numArgWords = mir->ssaRep->numUses;
-  info->args = (info->numArgWords == 0) ? NULL : (RegLocation*)
-      oatNew(cUnit, sizeof(RegLocation) * info->numArgWords, false, kAllocMisc);
+  info->args = (info->numArgWords == 0) ? NULL : static_cast<RegLocation*>
+      (oatNew(cUnit, sizeof(RegLocation) * info->numArgWords, false, kAllocMisc));
   for (int i = 0; i < info->numArgWords; i++) {
     info->args[i] = oatGetRawSrc(cUnit, mir, i);
   }
@@ -794,41 +793,26 @@ bool compileDalvikInstruction(CompilationUnit* cUnit, MIR* mir,
   return res;
 }
 
-const char* extendedMIROpNames[kMirOpLast - kMirOpFirst] = {
-  "kMirOpPhi",
-  "kMirOpCopy",
-  "kMirFusedCmplFloat",
-  "kMirFusedCmpgFloat",
-  "kMirFusedCmplDouble",
-  "kMirFusedCmpgDouble",
-  "kMirFusedCmpLong",
-  "kMirNop",
-  "kMirOpNullCheck",
-  "kMirOpRangeCheck",
-  "kMirOpDivZeroCheck",
-  "kMirOpCheck",
-};
-
 /* Extended MIR instructions like PHI */
 void handleExtendedMethodMIR(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir)
 {
   int opOffset = mir->dalvikInsn.opcode - kMirOpFirst;
   char* msg = NULL;
   if (cUnit->printMe) {
-    msg = (char*)oatNew(cUnit, strlen(extendedMIROpNames[opOffset]) + 1,
-                        false, kAllocDebugInfo);
+    msg = static_cast<char*>(oatNew(cUnit, strlen(extendedMIROpNames[opOffset]) + 1,
+                                    false, kAllocDebugInfo));
     strcpy(msg, extendedMIROpNames[opOffset]);
   }
-  LIR* op = newLIR1(cUnit, kPseudoExtended, (int) msg);
+  LIR* op = newLIR1(cUnit, kPseudoExtended, reinterpret_cast<uintptr_t>(msg));
 
-  switch ((ExtendedMIROpcode)mir->dalvikInsn.opcode) {
+  switch (static_cast<ExtendedMIROpcode>(mir->dalvikInsn.opcode)) {
     case kMirOpPhi: {
       char* ssaString = NULL;
       if (cUnit->printMe) {
         ssaString = oatGetSSAString(cUnit, mir->ssaRep);
       }
       op->flags.isNop = true;
-      newLIR1(cUnit, kPseudoSSARep, (int) ssaString);
+      newLIR1(cUnit, kPseudoSSARep, reinterpret_cast<uintptr_t>(ssaString));
       break;
     }
     case kMirOpCopy: {
@@ -871,7 +855,7 @@ bool methodBlockCodeGen(CompilationUnit* cUnit, BasicBlock* bb)
 
   /* Insert the block label */
   labelList[blockId].opcode = kPseudoNormalBlockLabel;
-  oatAppendLIR(cUnit, (LIR*) &labelList[blockId]);
+  oatAppendLIR(cUnit, &labelList[blockId]);
 
   LIR* headLIR = NULL;
 
@@ -928,7 +912,7 @@ bool methodBlockCodeGen(CompilationUnit* cUnit, BasicBlock* bb)
     /* Don't generate the SSA annotation unless verbose mode is on */
     if (cUnit->printMe && mir->ssaRep) {
       char* ssaString = oatGetSSAString(cUnit, mir->ssaRep);
-      newLIR1(cUnit, kPseudoSSARep, (int) ssaString);
+      newLIR1(cUnit, kPseudoSSARep, reinterpret_cast<uintptr_t>(ssaString));
     }
 
     if (opcode == kMirOpCheck) {
@@ -960,7 +944,7 @@ bool methodBlockCodeGen(CompilationUnit* cUnit, BasicBlock* bb)
      * Eliminate redundant loads/stores and delay stores into later
      * slots
      */
-    oatApplyLocalOptimizations(cUnit, (LIR*) headLIR, cUnit->lastLIRInsn);
+    oatApplyLocalOptimizations(cUnit, headLIR, cUnit->lastLIRInsn);
 
     /*
      * Generate an unconditional branch to the fallthrough block.
@@ -994,7 +978,7 @@ void oatSpecialMIR2LIR(CompilationUnit* cUnit, SpecialCaseHandler specialCase)
   BasicBlock*bb = NULL;
   for (int idx = 0; idx < numReachableBlocks; idx++) {
     int dfsIndex = cUnit->dfsOrder.elemList[idx];
-    bb = (BasicBlock*)oatGrowableListGetElement(blockList, dfsIndex);
+    bb = reinterpret_cast<BasicBlock*>(oatGrowableListGetElement(blockList, dfsIndex));
     if (bb->blockType == kDalvikByteCode) {
       break;
     }
@@ -1020,7 +1004,7 @@ void oatMethodMIR2LIR(CompilationUnit* cUnit)
 {
   /* Used to hold the labels of each block */
   cUnit->blockLabelList =
-      (LIR*) oatNew(cUnit, sizeof(LIR) * cUnit->numBlocks, true, kAllocLIR);
+      static_cast<LIR*>(oatNew(cUnit, sizeof(LIR) * cUnit->numBlocks, true, kAllocLIR));
 
   oatDataFlowAnalysisDispatcher(cUnit, methodBlockCodeGen,
                                 kPreOrderDFSTraversal, false /* Iterative */);
diff --git a/src/compiler/codegen/mips/assemble_mips.cc b/src/compiler/codegen/mips/assemble_mips.cc
index 1fa3a6b645..79259fbe28 100644
--- a/src/compiler/codegen/mips/assemble_mips.cc
+++ b/src/compiler/codegen/mips/assemble_mips.cc
@@ -479,7 +479,7 @@ void convertShortToLongBranch(CompilationUnit* cUnit, LIR* lir)
     case kMipsBltz: opcode = kMipsBgez; break;
     case kMipsBnez: opcode = kMipsBeqz; break;
     default:
-      LOG(FATAL) << "Unexpected branch kind " << (int)opcode;
+      LOG(FATAL) << "Unexpected branch kind " << opcode;
   }
   LIR* hopTarget = NULL;
   if (!unconditional) {
@@ -492,11 +492,11 @@ void convertShortToLongBranch(CompilationUnit* cUnit, LIR* lir)
   oatInsertLIRBefore(lir, currPC);
   LIR* anchor = rawLIR(cUnit, dalvikOffset, kPseudoTargetLabel);
   LIR* deltaHi = rawLIR(cUnit, dalvikOffset, kMipsDeltaHi, r_AT, 0,
-                        (uintptr_t)anchor, 0, 0, lir->target);
+                        reinterpret_cast<uintptr_t>(anchor), 0, 0, lir->target);
   oatInsertLIRBefore(lir, deltaHi);
   oatInsertLIRBefore(lir, anchor);
   LIR* deltaLo = rawLIR(cUnit, dalvikOffset, kMipsDeltaLo, r_AT, 0,
-                        (uintptr_t)anchor, 0, 0, lir->target);
+                        reinterpret_cast<uintptr_t>(anchor), 0, 0, lir->target);
   oatInsertLIRBefore(lir, deltaLo);
   LIR* addu = rawLIR(cUnit, dalvikOffset, kMipsAddu, r_AT, r_AT, r_RA);
   oatInsertLIRBefore(lir, addu);
@@ -515,12 +515,12 @@ void convertShortToLongBranch(CompilationUnit* cUnit, LIR* lir)
  * sequence or request that the trace be shortened and retried.
  */
 AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit,
-                    intptr_t startAddr)
+                    uintptr_t startAddr)
 {
   LIR *lir;
   AssemblerStatus res = kSuccess;  // Assume success
 
-  for (lir = (LIR *) cUnit->firstLIRInsn; lir; lir = NEXT_LIR(lir)) {
+  for (lir = cUnit->firstLIRInsn; lir; lir = NEXT_LIR(lir)) {
     if (lir->opcode < 0) {
       continue;
     }
@@ -542,8 +542,8 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit,
          * and is found in lir->target.  If operands[3] is non-NULL,
          * then it is a Switch/Data table.
          */
-        int offset1 = ((LIR*)lir->operands[2])->offset;
-        SwitchTable *tabRec = (SwitchTable*)lir->operands[3];
+        int offset1 = (reinterpret_cast<LIR*>(lir->operands[2]))->offset;
+        SwitchTable *tabRec = reinterpret_cast<SwitchTable*>(lir->operands[3]);
         int offset2 = tabRec ? tabRec->offset : lir->target->offset;
         int delta = offset2 - offset1;
         if ((delta & 0xffff) == delta && ((delta & 0x8000) == 0)) {
@@ -555,35 +555,35 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit,
               rawLIR(cUnit, lir->dalvikOffset, kMipsDeltaHi,
                      lir->operands[0], 0, lir->operands[2],
                      lir->operands[3], 0, lir->target);
-          oatInsertLIRBefore((LIR*)lir, (LIR*)newDeltaHi);
+          oatInsertLIRBefore(lir, newDeltaHi);
           LIR *newDeltaLo =
               rawLIR(cUnit, lir->dalvikOffset, kMipsDeltaLo,
                      lir->operands[0], 0, lir->operands[2],
                      lir->operands[3], 0, lir->target);
-          oatInsertLIRBefore((LIR*)lir, (LIR*)newDeltaLo);
+          oatInsertLIRBefore(lir, newDeltaLo);
           LIR *newAddu =
               rawLIR(cUnit, lir->dalvikOffset, kMipsAddu,
                      lir->operands[0], lir->operands[0], r_RA);
-          oatInsertLIRBefore((LIR*)lir, (LIR*)newAddu);
+          oatInsertLIRBefore(lir, newAddu);
           lir->flags.isNop = true;
           res = kRetryAll;
         }
       } else if (lir->opcode == kMipsDeltaLo) {
-        int offset1 = ((LIR*)lir->operands[2])->offset;
-        SwitchTable *tabRec = (SwitchTable*)lir->operands[3];
+        int offset1 = (reinterpret_cast<LIR*>(lir->operands[2]))->offset;
+        SwitchTable *tabRec = reinterpret_cast<SwitchTable*>(lir->operands[3]);
         int offset2 = tabRec ? tabRec->offset : lir->target->offset;
         int delta = offset2 - offset1;
         lir->operands[1] = delta & 0xffff;
       } else if (lir->opcode == kMipsDeltaHi) {
-        int offset1 = ((LIR*)lir->operands[2])->offset;
-        SwitchTable *tabRec = (SwitchTable*)lir->operands[3];
+        int offset1 = (reinterpret_cast<LIR*>(lir->operands[2]))->offset;
+        SwitchTable *tabRec = reinterpret_cast<SwitchTable*>(lir->operands[3]);
         int offset2 = tabRec ? tabRec->offset : lir->target->offset;
         int delta = offset2 - offset1;
         lir->operands[1] = (delta >> 16) & 0xffff;
       } else if (lir->opcode == kMipsB || lir->opcode == kMipsBal) {
-        LIR *targetLIR = (LIR *) lir->target;
-        intptr_t pc = lir->offset + 4;
-        intptr_t target = targetLIR->offset;
+        LIR *targetLIR = lir->target;
+        uintptr_t pc = lir->offset + 4;
+        uintptr_t target = targetLIR->offset;
         int delta = target - pc;
         if (delta & 0x3) {
           LOG(FATAL) << "PC-rel offset not multiple of 4: " << delta;
@@ -595,9 +595,9 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit,
           lir->operands[0] = delta >> 2;
         }
       } else if (lir->opcode >= kMipsBeqz && lir->opcode <= kMipsBnez) {
-        LIR *targetLIR = (LIR *) lir->target;
-        intptr_t pc = lir->offset + 4;
-        intptr_t target = targetLIR->offset;
+        LIR *targetLIR = lir->target;
+        uintptr_t pc = lir->offset + 4;
+        uintptr_t target = targetLIR->offset;
         int delta = target - pc;
         if (delta & 0x3) {
           LOG(FATAL) << "PC-rel offset not multiple of 4: " << delta;
@@ -609,9 +609,9 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit,
           lir->operands[1] = delta >> 2;
         }
       } else if (lir->opcode == kMipsBeq || lir->opcode == kMipsBne) {
-        LIR *targetLIR = (LIR *) lir->target;
-        intptr_t pc = lir->offset + 4;
-        intptr_t target = targetLIR->offset;
+        LIR *targetLIR = lir->target;
+        uintptr_t pc = lir->offset + 4;
+        uintptr_t target = targetLIR->offset;
         int delta = target - pc;
         if (delta & 0x3) {
           LOG(FATAL) << "PC-rel offset not multiple of 4: " << delta;
@@ -623,8 +623,8 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit,
           lir->operands[2] = delta >> 2;
         }
       } else if (lir->opcode == kMipsJal) {
-        intptr_t curPC = (startAddr + lir->offset + 4) & ~3;
-        intptr_t target = lir->operands[0];
+        uintptr_t curPC = (startAddr + lir->offset + 4) & ~3;
+        uintptr_t target = lir->operands[0];
         /* ensure PC-region branch can be used */
         DCHECK_EQ((curPC & 0xF0000000), (target & 0xF0000000));
         if (target & 0x3) {
@@ -632,12 +632,12 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit,
         }
         lir->operands[0] =  target >> 2;
       } else if (lir->opcode == kMipsLahi) { /* ld address hi (via lui) */
-        LIR *targetLIR = (LIR *) lir->target;
-        intptr_t target = startAddr + targetLIR->offset;
+        LIR *targetLIR = lir->target;
+        uintptr_t target = startAddr + targetLIR->offset;
         lir->operands[1] = target >> 16;
       } else if (lir->opcode == kMipsLalo) { /* ld address lo (via ori) */
-        LIR *targetLIR = (LIR *) lir->target;
-        intptr_t target = startAddr + targetLIR->offset;
+        LIR *targetLIR = lir->target;
+        uintptr_t target = startAddr + targetLIR->offset;
         lir->operands[2] = lir->operands[2] + target;
       }
     }
@@ -689,8 +689,7 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit,
           bits |= value;
           break;
         default:
-          LOG(FATAL) << "Bad encoder format: "
-                     << (int)encoder->fieldLoc[i].kind;
+          LOG(FATAL) << "Bad encoder format: " << encoder->fieldLoc[i].kind;
       }
     }
     // We only support little-endian MIPS.
@@ -724,9 +723,7 @@ int oatAssignInsnOffsets(CompilationUnit* cUnit)
   LIR* mipsLIR;
   int offset = 0;
 
-  for (mipsLIR = (LIR *) cUnit->firstLIRInsn;
-    mipsLIR;
-    mipsLIR = NEXT_LIR(mipsLIR)) {
+  for (mipsLIR = cUnit->firstLIRInsn; mipsLIR; mipsLIR = NEXT_LIR(mipsLIR)) {
     mipsLIR->offset = offset;
     if (mipsLIR->opcode >= 0) {
       if (!mipsLIR->flags.isNop) {
diff --git a/src/compiler/codegen/mips/call_mips.cc b/src/compiler/codegen/mips/call_mips.cc
index bf67b42645..1db4eee53b 100644
--- a/src/compiler/codegen/mips/call_mips.cc
+++ b/src/compiler/codegen/mips/call_mips.cc
@@ -65,14 +65,14 @@ void genSparseSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
     dumpSparseSwitchTable(table);
   }
   // Add the table to the list - we'll process it later
-  SwitchTable *tabRec = (SwitchTable *)oatNew(cUnit, sizeof(SwitchTable),
-                                              true, kAllocData);
+  SwitchTable *tabRec =
+      static_cast<SwitchTable*>(oatNew(cUnit, sizeof(SwitchTable), true, kAllocData));
   tabRec->table = table;
   tabRec->vaddr = cUnit->currentDalvikOffset;
   int elements = table[1];
-  tabRec->targets = (LIR* *)oatNew(cUnit, elements * sizeof(LIR*), true,
-                                   kAllocLIR);
-  oatInsertGrowableList(cUnit, &cUnit->switchTables, (intptr_t)tabRec);
+  tabRec->targets =
+      static_cast<LIR**>(oatNew(cUnit, elements * sizeof(LIR*), true, kAllocLIR));
+  oatInsertGrowableList(cUnit, &cUnit->switchTables, reinterpret_cast<uintptr_t>(tabRec));
 
   // The table is composed of 8-byte key/disp pairs
   int byteSize = elements * 8;
@@ -100,7 +100,8 @@ void genSparseSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
   // Remember base label so offsets can be computed later
   tabRec->anchor = baseLabel;
   int rBase = oatAllocTemp(cUnit);
-  newLIR4(cUnit, kMipsDelta, rBase, 0, (intptr_t)baseLabel, (intptr_t)tabRec);
+  newLIR4(cUnit, kMipsDelta, rBase, 0, reinterpret_cast<uintptr_t>(baseLabel),
+          reinterpret_cast<uintptr_t>(tabRec));
   opRegRegReg(cUnit, kOpAdd, rEnd, rEnd, rBase);
 
   // Grab switch test value
@@ -144,14 +145,13 @@ void genPackedSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
     dumpPackedSwitchTable(table);
   }
   // Add the table to the list - we'll process it later
-  SwitchTable *tabRec = (SwitchTable *)oatNew(cUnit, sizeof(SwitchTable),
-                        true, kAllocData);
+  SwitchTable *tabRec =
+      static_cast<SwitchTable*>(oatNew(cUnit, sizeof(SwitchTable), true, kAllocData));
   tabRec->table = table;
   tabRec->vaddr = cUnit->currentDalvikOffset;
   int size = table[1];
-  tabRec->targets = (LIR* *)oatNew(cUnit, size * sizeof(LIR*), true,
-                    kAllocLIR);
-  oatInsertGrowableList(cUnit, &cUnit->switchTables, (intptr_t)tabRec);
+  tabRec->targets = static_cast<LIR**>(oatNew(cUnit, size * sizeof(LIR*), true, kAllocLIR));
+  oatInsertGrowableList(cUnit, &cUnit->switchTables, reinterpret_cast<uintptr_t>(tabRec));
 
   // Get the switch value
   rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
@@ -195,7 +195,8 @@ void genPackedSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
 
   // Materialize the table base pointer
   int rBase = oatAllocTemp(cUnit);
-  newLIR4(cUnit, kMipsDelta, rBase, 0, (intptr_t)baseLabel, (intptr_t)tabRec);
+  newLIR4(cUnit, kMipsDelta, rBase, 0, reinterpret_cast<uintptr_t>(baseLabel),
+          reinterpret_cast<uintptr_t>(tabRec));
 
   // Load the displacement from the switch table
   int rDisp = oatAllocTemp(cUnit);
@@ -207,7 +208,7 @@ void genPackedSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
 
   /* branchOver target here */
   LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
-  branchOver->target = (LIR*)target;
+  branchOver->target = target;
 }
 
 /*
@@ -225,15 +226,15 @@ void genFillArrayData(CompilationUnit* cUnit, uint32_t tableOffset,
 {
   const uint16_t* table = cUnit->insns + cUnit->currentDalvikOffset + tableOffset;
   // Add the table to the list - we'll process it later
-  FillArrayData *tabRec = (FillArrayData *)
-     oatNew(cUnit, sizeof(FillArrayData), true, kAllocData);
+  FillArrayData *tabRec =
+      reinterpret_cast<FillArrayData*>(oatNew(cUnit, sizeof(FillArrayData), true, kAllocData));
   tabRec->table = table;
   tabRec->vaddr = cUnit->currentDalvikOffset;
   uint16_t width = tabRec->table[1];
   uint32_t size = tabRec->table[2] | ((static_cast<uint32_t>(tabRec->table[3])) << 16);
   tabRec->size = (size * width) + 8;
 
-  oatInsertGrowableList(cUnit, &cUnit->fillArrayData, (intptr_t)tabRec);
+  oatInsertGrowableList(cUnit, &cUnit->fillArrayData, reinterpret_cast<uintptr_t>(tabRec));
 
   // Making a call - use explicit registers
   oatFlushAllRegs(cUnit);   /* Everything to home location */
@@ -251,7 +252,8 @@ void genFillArrayData(CompilationUnit* cUnit, uint32_t tableOffset,
   LIR* baseLabel = newLIR0(cUnit, kPseudoTargetLabel);
 
   // Materialize a pointer to the fill data image
-  newLIR4(cUnit, kMipsDelta, rMIPS_ARG1, 0, (intptr_t)baseLabel, (intptr_t)tabRec);
+  newLIR4(cUnit, kMipsDelta, rMIPS_ARG1, 0, reinterpret_cast<uintptr_t>(baseLabel),
+          reinterpret_cast<uintptr_t>(tabRec));
 
   // And go...
   oatClobberCalleeSave(cUnit);
@@ -304,7 +306,7 @@ void markGCCard(CompilationUnit* cUnit, int valReg, int tgtAddrReg)
   storeBaseIndexed(cUnit, regCardBase, regCardNo, regCardBase, 0,
                    kUnsignedByte);
   LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
-  branchOver->target = (LIR*)target;
+  branchOver->target = target;
   oatFreeTemp(cUnit, regCardBase);
   oatFreeTemp(cUnit, regCardNo);
 }
@@ -328,7 +330,7 @@ void genEntrySequence(CompilationUnit* cUnit, RegLocation* argLocs,
    * a leaf *and* our frame size < fudge factor.
    */
   bool skipOverflowCheck = ((cUnit->attrs & METHOD_IS_LEAF) &&
-      ((size_t)cUnit->frameSize < Thread::kStackOverflowReservedBytes));
+      (static_cast<size_t>(cUnit->frameSize) < Thread::kStackOverflowReservedBytes));
   newLIR0(cUnit, kPseudoMethodEntry);
   int checkReg = oatAllocTemp(cUnit);
   int newSP = oatAllocTemp(cUnit);
diff --git a/src/compiler/codegen/mips/fp_mips.cc b/src/compiler/codegen/mips/fp_mips.cc
index 5ee5de451e..19548242a1 100644
--- a/src/compiler/codegen/mips/fp_mips.cc
+++ b/src/compiler/codegen/mips/fp_mips.cc
@@ -57,8 +57,7 @@ bool genArithOpFloat(CompilationUnit *cUnit, Instruction::Code opcode, RegLocati
   rlSrc1 = loadValue(cUnit, rlSrc1, kFPReg);
   rlSrc2 = loadValue(cUnit, rlSrc2, kFPReg);
   rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
-  newLIR3(cUnit, (MipsOpCode)op, rlResult.lowReg, rlSrc1.lowReg,
-          rlSrc2.lowReg);
+  newLIR3(cUnit, op, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg);
   storeValue(cUnit, rlDest, rlResult);
 
   return false;
@@ -106,8 +105,7 @@ bool genArithOpDouble(CompilationUnit *cUnit, Instruction::Code opcode,
   rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
   DCHECK(rlDest.wide);
   DCHECK(rlResult.wide);
-  newLIR3(cUnit, (MipsOpCode)op, s2d(rlResult.lowReg, rlResult.highReg),
-          s2d(rlSrc1.lowReg, rlSrc1.highReg),
+  newLIR3(cUnit, op, s2d(rlResult.lowReg, rlResult.highReg), s2d(rlSrc1.lowReg, rlSrc1.highReg),
           s2d(rlSrc2.lowReg, rlSrc2.highReg));
   storeValueWide(cUnit, rlDest, rlResult);
   return false;
@@ -155,12 +153,11 @@ bool genConversion(CompilationUnit *cUnit, Instruction::Code opcode, RegLocation
   }
   if (rlDest.wide) {
     rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
-    newLIR2(cUnit, (MipsOpCode)op, s2d(rlResult.lowReg, rlResult.highReg),
-            srcReg);
+    newLIR2(cUnit, op, s2d(rlResult.lowReg, rlResult.highReg), srcReg);
     storeValueWide(cUnit, rlDest, rlResult);
   } else {
     rlResult = oatEvalLoc(cUnit, rlDest, kFPReg, true);
-    newLIR2(cUnit, (MipsOpCode)op, rlResult.lowReg, srcReg);
+    newLIR2(cUnit, op, rlResult.lowReg, srcReg);
     storeValue(cUnit, rlDest, rlResult);
   }
   return false;
diff --git a/src/compiler/codegen/mips/int_mips.cc b/src/compiler/codegen/mips/int_mips.cc
index 0e1ae626e9..82ac547b6e 100644
--- a/src/compiler/codegen/mips/int_mips.cc
+++ b/src/compiler/codegen/mips/int_mips.cc
@@ -54,7 +54,7 @@ void genCmpLong(CompilationUnit* cUnit, RegLocation rlDest,
   oatFreeTemp(cUnit, t0);
   oatFreeTemp(cUnit, t1);
   LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
-  branch->target = (LIR*)target;
+  branch->target = target;
   storeValue(cUnit, rlDest, rlResult);
 }
 
@@ -107,7 +107,7 @@ LIR* opCmpBranch(CompilationUnit* cUnit, ConditionCode cond, int src1,
       swapped = true;
       break;
     default:
-      LOG(FATAL) << "No support for ConditionCode: " << (int) cond;
+      LOG(FATAL) << "No support for ConditionCode: " << cond;
       return NULL;
   }
   if (cmpZero) {
@@ -177,7 +177,7 @@ LIR* opRegCopyNoInsert(CompilationUnit *cUnit, int rDest, int rSrc)
 LIR* opRegCopy(CompilationUnit *cUnit, int rDest, int rSrc)
 {
   LIR *res = opRegCopyNoInsert(cUnit, rDest, rSrc);
-  oatAppendLIR(cUnit, (LIR*)res);
+  oatAppendLIR(cUnit, res);
   return res;
 }
 
diff --git a/src/compiler/codegen/mips/mips_lir.h b/src/compiler/codegen/mips/mips_lir.h
index 4b604d2ab8..b6f686d388 100644
--- a/src/compiler/codegen/mips/mips_lir.h
+++ b/src/compiler/codegen/mips/mips_lir.h
@@ -163,7 +163,7 @@ enum MipsResourceEncodingPos {
   kMipsRegEnd   = 51,
 };
 
-#define ENCODE_MIPS_REG_LIST(N)      ((uint64_t) N)
+#define ENCODE_MIPS_REG_LIST(N)      (static_cast<uint64_t>(N))
 #define ENCODE_MIPS_REG_SP           (1ULL << kMipsRegSP)
 #define ENCODE_MIPS_REG_LR           (1ULL << kMipsRegLR)
 #define ENCODE_MIPS_REG_PC           (1ULL << kMipsRegPC)
@@ -303,7 +303,7 @@ enum MipsShiftEncodings {
 #define kST kSYNC0
 #define kSY kSYNC0
 
-#define isPseudoOpcode(opCode) ((int)(opCode) < 0)
+#define isPseudoOpcode(opCode) (static_cast<int>(opCode) < 0)
 
 /*
  * The following enum defines the list of supported Thumb instructions by the
diff --git a/src/compiler/codegen/mips/target_mips.cc b/src/compiler/codegen/mips/target_mips.cc
index a5a8d7edfe..e15776032c 100644
--- a/src/compiler/codegen/mips/target_mips.cc
+++ b/src/compiler/codegen/mips/target_mips.cc
@@ -199,7 +199,7 @@ std::string buildInsnString(const char *fmt, LIR *lir, unsigned char* baseAddr)
         strcpy(tbuf, "!");
       } else {
          DCHECK_LT(fmt, fmtEnd);
-         DCHECK_LT((unsigned)(nc-'0'), 4u);
+         DCHECK_LT(static_cast<unsigned>(nc-'0'), 4u);
          operand = lir->operands[nc-'0'];
          switch (*fmt++) {
            case 'b':
@@ -233,19 +233,19 @@ std::string buildInsnString(const char *fmt, LIR *lir, unsigned char* baseAddr)
              sprintf(tbuf,"%d", operand*2);
              break;
            case 't':
-             sprintf(tbuf,"0x%08x (L%p)", (int) baseAddr + lir->offset + 4 +
+             sprintf(tbuf,"0x%08x (L%p)", reinterpret_cast<uintptr_t>(baseAddr) + lir->offset + 4 +
                      (operand << 2), lir->target);
              break;
            case 'T':
-             sprintf(tbuf,"0x%08x", (int) (operand << 2));
+             sprintf(tbuf,"0x%08x", operand << 2);
              break;
            case 'u': {
              int offset_1 = lir->operands[0];
              int offset_2 = NEXT_LIR(lir)->operands[0];
-             intptr_t target =
-                 ((((intptr_t) baseAddr + lir->offset + 4) & ~3) +
+             uintptr_t target =
+                 (((reinterpret_cast<uintptr_t>(baseAddr) + lir->offset + 4) & ~3) +
                  (offset_1 << 21 >> 9) + (offset_2 << 1)) & 0xfffffffc;
-             sprintf(tbuf, "%p", (void *) target);
+             sprintf(tbuf, "%p", reinterpret_cast<void*>(target));
              break;
           }
 
@@ -275,11 +275,10 @@ std::string buildInsnString(const char *fmt, LIR *lir, unsigned char* baseAddr)
 }
 
 // FIXME: need to redo resource maps for MIPS - fix this at that time
-void oatDumpResourceMask(LIR *lir, uint64_t mask, const char *prefix)
+void oatDumpResourceMask(LIR *mipsLIR, uint64_t mask, const char *prefix)
 {
   char buf[256];
   buf[0] = 0;
-  LIR *mipsLIR = (LIR *) lir;
 
   if (mask == ENCODE_ALL) {
     strcpy(buf, "all");
@@ -467,12 +466,6 @@ extern void oatFreeCallTemps(CompilationUnit* cUnit)
   oatFreeTemp(cUnit, rMIPS_ARG3);
 }
 
-/* Convert an instruction to a NOP */
-void oatNopLIR( LIR* lir)
-{
-  ((LIR*)lir)->flags.isNop = true;
-}
-
 /*
  * Determine the initial instruction set to be used for this trace.
  * Later components may decide to change this.
@@ -544,17 +537,15 @@ void oatInitializeRegAlloc(CompilationUnit* cUnit)
   int numFPRegs = 0;
   int numFPTemps = 0;
 #endif
-  RegisterPool *pool = (RegisterPool *)oatNew(cUnit, sizeof(*pool), true,
-                        kAllocRegAlloc);
+  RegisterPool *pool =
+      static_cast<RegisterPool*>(oatNew(cUnit, sizeof(*pool), true, kAllocRegAlloc));
   cUnit->regPool = pool;
   pool->numCoreRegs = numRegs;
-  pool->coreRegs = (RegisterInfo *)
-      oatNew(cUnit, numRegs * sizeof(*cUnit->regPool->coreRegs),
-             true, kAllocRegAlloc);
+  pool->coreRegs = static_cast<RegisterInfo*>
+     (oatNew(cUnit, numRegs * sizeof(*cUnit->regPool->coreRegs), true, kAllocRegAlloc));
   pool->numFPRegs = numFPRegs;
-  pool->FPRegs = (RegisterInfo *)
-      oatNew(cUnit, numFPRegs * sizeof(*cUnit->regPool->FPRegs), true,
-             kAllocRegAlloc);
+  pool->FPRegs = static_cast<RegisterInfo*>
+      (oatNew(cUnit, numFPRegs * sizeof(*cUnit->regPool->FPRegs), true, kAllocRegAlloc));
   oatInitPool(pool->coreRegs, coreRegs, pool->numCoreRegs);
   oatInitPool(pool->FPRegs, fpRegs, pool->numFPRegs);
   // Keep special registers from being allocated
@@ -573,9 +564,8 @@ void oatInitializeRegAlloc(CompilationUnit* cUnit)
     oatMarkTemp(cUnit, fpTemps[i]);
   }
   // Construct the alias map.
-  cUnit->phiAliasMap = (int*)oatNew(cUnit, cUnit->numSSARegs *
-                                    sizeof(cUnit->phiAliasMap[0]), false,
-                                    kAllocDFInfo);
+  cUnit->phiAliasMap = static_cast<int*>
+      (oatNew(cUnit, cUnit->numSSARegs * sizeof(cUnit->phiAliasMap[0]), false, kAllocDFInfo));
   for (int i = 0; i < cUnit->numSSARegs; i++) {
     cUnit->phiAliasMap[i] = i;
   }
@@ -645,48 +635,11 @@ void unSpillCoreRegs(CompilationUnit* cUnit)
   opRegImm(cUnit, kOpAdd, rMIPS_SP, cUnit->frameSize);
 }
 
-/*
- * Nop any unconditional branches that go to the next instruction.
- * Note: new redundant branches may be inserted later, and we'll
- * use a check in final instruction assembly to nop those out.
- */
-void removeRedundantBranches(CompilationUnit* cUnit)
-{
-  LIR* thisLIR;
-
-  for (thisLIR = (LIR*) cUnit->firstLIRInsn;
-     thisLIR != (LIR*) cUnit->lastLIRInsn;
-     thisLIR = NEXT_LIR(thisLIR)) {
-
-    /* Branch to the next instruction */
-    if (thisLIR->opcode == kMipsB) {
-      LIR* nextLIR = thisLIR;
-
-      while (true) {
-        nextLIR = NEXT_LIR(nextLIR);
-
-        /*
-         * Is the branch target the next instruction?
-         */
-        if (nextLIR == (LIR*) thisLIR->target) {
-          thisLIR->flags.isNop = true;
-          break;
-        }
-
-        /*
-         * Found real useful stuff between the branch and the target.
-         * Need to explicitly check the lastLIRInsn here because it
-         * might be the last real instruction.
-         */
-        if (!isPseudoOpcode(nextLIR->opcode) ||
-          (nextLIR = (LIR*) cUnit->lastLIRInsn))
-          break;
-      }
-    }
-  }
+bool branchUnconditional(LIR* lir)
+{
+  return (lir->opcode == kMipsB);
 }
 
-
 /* Common initialization routine for an architecture family */
 bool oatArchInit()
 {
@@ -695,8 +648,7 @@ bool oatArchInit()
   for (i = 0; i < kMipsLast; i++) {
     if (EncodingMap[i].opcode != i) {
       LOG(FATAL) << "Encoding order for " << EncodingMap[i].name <<
-         " is wrong: expecting " << i << ", seeing " <<
-         (int)EncodingMap[i].opcode;
+         " is wrong: expecting " << i << ", seeing " << static_cast<int>(EncodingMap[i].opcode);
     }
   }
 
diff --git a/src/compiler/codegen/ralloc_util.cc b/src/compiler/codegen/ralloc_util.cc
index 4b66ddf286..efdbd32daa 100644
--- a/src/compiler/codegen/ralloc_util.cc
+++ b/src/compiler/codegen/ralloc_util.cc
@@ -67,8 +67,8 @@ void dumpRegPool(RegisterInfo* p, int numRegs)
     LOG(INFO) << StringPrintf(
         "R[%d]: T:%d, U:%d, P:%d, p:%d, LV:%d, D:%d, SR:%d, ST:%x, EN:%x",
         p[i].reg, p[i].isTemp, p[i].inUse, p[i].pair, p[i].partner,
-        p[i].live, p[i].dirty, p[i].sReg,(int)p[i].defStart,
-        (int)p[i].defEnd);
+        p[i].live, p[i].dirty, p[i].sReg, reinterpret_cast<uintptr_t>(p[i].defStart),
+        reinterpret_cast<uintptr_t>(p[i].defEnd));
   }
   LOG(INFO) << "================================================";
 }
@@ -1077,8 +1077,8 @@ void oatCountRefs(CompilationUnit *cUnit, BasicBlock* bb,
 /* qsort callback function, sort descending */
 int oatSortCounts(const void *val1, const void *val2)
 {
-  const RefCounts* op1 = (const RefCounts*)val1;
-  const RefCounts* op2 = (const RefCounts*)val2;
+  const RefCounts* op1 = reinterpret_cast<const RefCounts*>(val1);
+  const RefCounts* op2 = reinterpret_cast<const RefCounts*>(val2);
   return (op1->count == op2->count) ? 0 : (op1->count < op2->count ? 1 : -1);
 }
 
@@ -1115,10 +1115,10 @@ extern void oatDoPromotion(CompilationUnit* cUnit)
    * TUNING: replace with linear scan once we have the ability
    * to describe register live ranges for GC.
    */
-  RefCounts *coreRegs = (RefCounts *)
-      oatNew(cUnit, sizeof(RefCounts) * numRegs, true, kAllocRegAlloc);
-  RefCounts *fpRegs = (RefCounts *)
-      oatNew(cUnit, sizeof(RefCounts) * numRegs, true, kAllocRegAlloc);
+  RefCounts *coreRegs = static_cast<RefCounts*>(oatNew(cUnit, sizeof(RefCounts) * numRegs,
+                                                       true, kAllocRegAlloc));
+  RefCounts *fpRegs = static_cast<RefCounts *>(oatNew(cUnit, sizeof(RefCounts) * numRegs,
+                                                      true, kAllocRegAlloc));
   // Set ssa names for original Dalvik registers
   for (int i = 0; i < dalvikRegs; i++) {
     coreRegs[i].sReg = fpRegs[i].sReg = i;
@@ -1128,7 +1128,7 @@ extern void oatDoPromotion(CompilationUnit* cUnit)
   fpRegs[dalvikRegs].sReg = cUnit->methodSReg;  // For consistecy
   // Set ssa names for compilerTemps
   for (int i = 1; i <= cUnit->numCompilerTemps; i++) {
-    CompilerTemp* ct = (CompilerTemp*)cUnit->compilerTemps.elemList[i];
+    CompilerTemp* ct = reinterpret_cast<CompilerTemp*>(cUnit->compilerTemps.elemList[i]);
     coreRegs[dalvikRegs + i].sReg = ct->sReg;
     fpRegs[dalvikRegs + i].sReg = ct->sReg;
   }
@@ -1137,7 +1137,7 @@ extern void oatDoPromotion(CompilationUnit* cUnit)
   oatGrowableListIteratorInit(&cUnit->blockList, &iterator);
   while (true) {
     BasicBlock* bb;
-    bb = (BasicBlock*)oatGrowableListIteratorNext(&iterator);
+    bb = reinterpret_cast<BasicBlock*>(oatGrowableListIteratorNext(&iterator));
     if (bb == NULL) break;
     oatCountRefs(cUnit, bb, coreRegs, fpRegs);
   }
diff --git a/src/compiler/codegen/target_list.h b/src/compiler/codegen/target_list.h
index 2ada0737aa..dba00f5c9b 100644
--- a/src/compiler/codegen/target_list.h
+++ b/src/compiler/codegen/target_list.h
@@ -1,5 +1,5 @@
 ArmConditionCode oatArmConditionEncoding(ConditionCode code);
-AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit, intptr_t startAddr);
+AssemblerStatus oatAssembleInstructions(CompilationUnit* cUnit, uintptr_t startAddr);
 bool doubleReg(int reg);
 bool fpReg(int reg);
 bool genAddLong(CompilationUnit* cUnit, RegLocation rlDest, RegLocation rlSrc1, RegLocation rlSrc2);
@@ -136,7 +136,7 @@ void opLea(CompilationUnit* cUnit, int rBase, int reg1, int reg2, int scale, int
 void opRegCopyWide(CompilationUnit* cUnit, int destLo, int destHi, int srcLo, int srcHi);
 void opRegThreadMem(CompilationUnit* cUnit, OpKind op, int rDest, int threadOffset);
 void opTlsCmp(CompilationUnit* cUnit, int offset, int val);
-void removeRedundantBranches(CompilationUnit* cUnit);
+bool branchUnconditional(LIR* lir);
 void setupTargetResourceMasks(CompilationUnit* cUnit, LIR* lir);
 void spillCoreRegs(CompilationUnit* cUnit);
 void unSpillCoreRegs(CompilationUnit* cUnit);
diff --git a/src/compiler/codegen/x86/assemble_x86.cc b/src/compiler/codegen/x86/assemble_x86.cc
index 63d2b83a34..0c2ff0d0d7 100644
--- a/src/compiler/codegen/x86/assemble_x86.cc
+++ b/src/compiler/codegen/x86/assemble_x86.cc
@@ -557,7 +557,7 @@ static void emitOpReg(CompilationUnit* cUnit, const X86EncodingMap* entry, uint8
     reg = reg & X86_FP_REG_MASK;
   }
   if (reg >= 4) {
-    DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << (int) reg
+    DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << static_cast<int>(reg)
         << " in " << PrettyMethod(cUnit->method_idx, *cUnit->dex_file);
   }
   DCHECK_LT(reg, 8);
@@ -614,7 +614,7 @@ static void emitMemReg(CompilationUnit* cUnit, const X86EncodingMap* entry,
     reg = reg & X86_FP_REG_MASK;
   }
   if (reg >= 4) {
-    DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << (int) reg
+    DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << static_cast<int>(reg)
         << " in " << PrettyMethod(cUnit->method_idx, *cUnit->dex_file);
   }
   DCHECK_LT(reg, 8);
@@ -705,7 +705,7 @@ static void emitRegThread(CompilationUnit* cUnit, const X86EncodingMap* entry,
     reg = reg & X86_FP_REG_MASK;
   }
   if (reg >= 4) {
-    DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << (int) reg
+    DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << static_cast<int>(reg)
         << " in " << PrettyMethod(cUnit->method_idx, *cUnit->dex_file);
   }
   DCHECK_LT(reg, 8);
@@ -958,7 +958,7 @@ static void emitShiftRegImm(CompilationUnit* cUnit, const X86EncodingMap* entry,
     DCHECK_EQ(0, entry->skeleton.extra_opcode2);
   }
   if (reg >= 4) {
-    DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << (int) reg
+    DCHECK(strchr(entry->name, '8') == NULL) << entry->name << " " << static_cast<int>(reg)
         << " in " << PrettyMethod(cUnit->method_idx, *cUnit->dex_file);
   }
   DCHECK_LT(reg, 8);
@@ -1118,11 +1118,11 @@ static void emitPcRel(CompilationUnit* cUnit, const X86EncodingMap* entry, uint8
                       int base_or_table, uint8_t index, int scale, int table_or_disp) {
   int disp;
   if (entry->opcode == kX86PcRelLoadRA) {
-    SwitchTable *tabRec = (SwitchTable*)table_or_disp;
+    SwitchTable *tabRec = reinterpret_cast<SwitchTable*>(table_or_disp);
     disp = tabRec->offset;
   } else {
     DCHECK(entry->opcode == kX86PcRelAdr);
-    FillArrayData *tabRec = (FillArrayData *)base_or_table;
+    FillArrayData *tabRec = reinterpret_cast<FillArrayData*>(base_or_table);
     disp = tabRec->offset;
   }
   if (entry->skeleton.prefix1 != 0) {
@@ -1189,12 +1189,12 @@ void emitUnimplemented(CompilationUnit* cUnit, const X86EncodingMap* entry, LIR*
  * instruction.  In those cases we will try to substitute a new code
  * sequence or request that the trace be shortened and retried.
  */
-AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit, intptr_t startAddr) {
+AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit, uintptr_t startAddr) {
   LIR *lir;
   AssemblerStatus res = kSuccess;  // Assume success
 
   const bool kVerbosePcFixup = false;
-  for (lir = (LIR *) cUnit->firstLIRInsn; lir; lir = NEXT_LIR(lir)) {
+  for (lir = cUnit->firstLIRInsn; lir; lir = NEXT_LIR(lir)) {
     if (lir->opcode < 0) {
       continue;
     }
@@ -1209,13 +1209,13 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit, intptr_t startAd
           LIR *targetLIR = lir->target;
           DCHECK(targetLIR != NULL);
           int delta = 0;
-          intptr_t pc;
+          uintptr_t pc;
           if (IS_SIMM8(lir->operands[0])) {
             pc = lir->offset + 2 /* opcode + rel8 */;
           } else {
             pc = lir->offset + 6 /* 2 byte opcode + rel32 */;
           }
-          intptr_t target = targetLIR->offset;
+          uintptr_t target = targetLIR->offset;
           delta = target - pc;
           if (IS_SIMM8(delta) != IS_SIMM8(lir->operands[0])) {
             if (kVerbosePcFixup) {
@@ -1239,8 +1239,8 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit, intptr_t startAd
         case kX86Jcc32: {
           LIR *targetLIR = lir->target;
           DCHECK(targetLIR != NULL);
-          intptr_t pc = lir->offset + 6 /* 2 byte opcode + rel32 */;
-          intptr_t target = targetLIR->offset;
+          uintptr_t pc = lir->offset + 6 /* 2 byte opcode + rel32 */;
+          uintptr_t target = targetLIR->offset;
           int delta = target - pc;
           if (kVerbosePcFixup) {
             LOG(INFO) << "Source:";
@@ -1256,13 +1256,13 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit, intptr_t startAd
           LIR *targetLIR = lir->target;
           DCHECK(targetLIR != NULL);
           int delta = 0;
-          intptr_t pc;
+          uintptr_t pc;
           if (IS_SIMM8(lir->operands[0])) {
             pc = lir->offset + 2 /* opcode + rel8 */;
           } else {
             pc = lir->offset + 5 /* opcode + rel32 */;
           }
-          intptr_t target = targetLIR->offset;
+          uintptr_t target = targetLIR->offset;
           delta = target - pc;
           if (!(cUnit->disableOpt & (1 << kSafeOptimizations)) && delta == 0) {
             // Useless branch
@@ -1285,8 +1285,8 @@ AssemblerStatus oatAssembleInstructions(CompilationUnit *cUnit, intptr_t startAd
         case kX86Jmp32: {
           LIR *targetLIR = lir->target;
           DCHECK(targetLIR != NULL);
-          intptr_t pc = lir->offset + 5 /* opcode + rel32 */;
-          intptr_t target = targetLIR->offset;
+          uintptr_t pc = lir->offset + 5 /* opcode + rel32 */;
+          uintptr_t target = targetLIR->offset;
           int delta = target - pc;
           lir->operands[0] = delta;
           break;
@@ -1423,9 +1423,7 @@ int oatAssignInsnOffsets(CompilationUnit* cUnit)
     LIR* x86LIR;
     int offset = 0;
 
-    for (x86LIR = (LIR *) cUnit->firstLIRInsn;
-        x86LIR;
-        x86LIR = NEXT_LIR(x86LIR)) {
+    for (x86LIR = cUnit->firstLIRInsn; x86LIR; x86LIR = NEXT_LIR(x86LIR)) {
         x86LIR->offset = offset;
         if (x86LIR->opcode >= 0) {
             if (!x86LIR->flags.isNop) {
diff --git a/src/compiler/codegen/x86/call_x86.cc b/src/compiler/codegen/x86/call_x86.cc
index 2b52270724..c2b456f4d3 100644
--- a/src/compiler/codegen/x86/call_x86.cc
+++ b/src/compiler/codegen/x86/call_x86.cc
@@ -38,8 +38,8 @@ void genSparseSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
     dumpSparseSwitchTable(table);
   }
   int entries = table[1];
-  int* keys = (int*)&table[2];
-  int* targets = &keys[entries];
+  const int* keys = reinterpret_cast<const int*>(&table[2]);
+  const int* targets = &keys[entries];
   rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
   for (int i = 0; i < entries; i++) {
     int key = keys[i];
@@ -76,14 +76,13 @@ void genPackedSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
     dumpPackedSwitchTable(table);
   }
   // Add the table to the list - we'll process it later
-  SwitchTable *tabRec = (SwitchTable *)oatNew(cUnit, sizeof(SwitchTable),
-                                              true, kAllocData);
+  SwitchTable *tabRec =
+      static_cast<SwitchTable *>(oatNew(cUnit, sizeof(SwitchTable), true, kAllocData));
   tabRec->table = table;
   tabRec->vaddr = cUnit->currentDalvikOffset;
   int size = table[1];
-  tabRec->targets = (LIR* *)oatNew(cUnit, size * sizeof(LIR*), true,
-                                   kAllocLIR);
-  oatInsertGrowableList(cUnit, &cUnit->switchTables, (intptr_t)tabRec);
+  tabRec->targets = static_cast<LIR**>(oatNew(cUnit, size * sizeof(LIR*), true, kAllocLIR));
+  oatInsertGrowableList(cUnit, &cUnit->switchTables, reinterpret_cast<uintptr_t>(tabRec));
 
   // Get the switch value
   rlSrc = loadValue(cUnit, rlSrc, kCoreReg);
@@ -107,7 +106,7 @@ void genPackedSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
   // Load the displacement from the switch table
   int dispReg = oatAllocTemp(cUnit);
   newLIR5(cUnit, kX86PcRelLoadRA, dispReg, startOfMethodReg, keyReg, 2,
-          (intptr_t)tabRec);
+          reinterpret_cast<uintptr_t>(tabRec));
   // Add displacement to start of method
   opRegReg(cUnit, kOpAdd, startOfMethodReg, dispReg);
   // ..and go!
@@ -116,7 +115,7 @@ void genPackedSwitch(CompilationUnit* cUnit, uint32_t tableOffset,
 
   /* branchOver target here */
   LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
-  branchOver->target = (LIR*)target;
+  branchOver->target = target;
 }
 
 void callRuntimeHelperRegReg(CompilationUnit* cUnit, int helperOffset,
@@ -136,25 +135,25 @@ void genFillArrayData(CompilationUnit* cUnit, uint32_t tableOffset,
 {
   const uint16_t* table = cUnit->insns + cUnit->currentDalvikOffset + tableOffset;
   // Add the table to the list - we'll process it later
-  FillArrayData *tabRec = (FillArrayData *)oatNew(cUnit, sizeof(FillArrayData),
-      true, kAllocData);
+  FillArrayData *tabRec =
+      static_cast<FillArrayData*>(oatNew(cUnit, sizeof(FillArrayData), true, kAllocData));
   tabRec->table = table;
   tabRec->vaddr = cUnit->currentDalvikOffset;
   uint16_t width = tabRec->table[1];
   uint32_t size = tabRec->table[2] | ((static_cast<uint32_t>(tabRec->table[3])) << 16);
   tabRec->size = (size * width) + 8;
 
-  oatInsertGrowableList(cUnit, &cUnit->fillArrayData, (intptr_t)tabRec);
+  oatInsertGrowableList(cUnit, &cUnit->fillArrayData, reinterpret_cast<uintptr_t>(tabRec));
 
   // Making a call - use explicit registers
   oatFlushAllRegs(cUnit);   /* Everything to home location */
   loadValueDirectFixed(cUnit, rlSrc, rX86_ARG0);
   // Materialize a pointer to the fill data image
   newLIR1(cUnit, kX86StartOfMethod, rX86_ARG2);
-  newLIR2(cUnit, kX86PcRelAdr, rX86_ARG1, (intptr_t)tabRec);
+  newLIR2(cUnit, kX86PcRelAdr, rX86_ARG1, reinterpret_cast<uintptr_t>(tabRec));
   newLIR2(cUnit, kX86Add32RR, rX86_ARG1, rX86_ARG2);
-  callRuntimeHelperRegReg(cUnit, ENTRYPOINT_OFFSET(pHandleFillArrayDataFromCode), rX86_ARG0, rX86_ARG1,
-                          true);
+  callRuntimeHelperRegReg(cUnit, ENTRYPOINT_OFFSET(pHandleFillArrayDataFromCode), rX86_ARG0,
+                          rX86_ARG1, true);
 }
 
 void genMonitorEnter(CompilationUnit* cUnit, int optFlags, RegLocation rlSrc)
@@ -209,7 +208,7 @@ void markGCCard(CompilationUnit* cUnit, int valReg, int tgtAddrReg)
   storeBaseIndexed(cUnit, regCardBase, regCardNo, regCardBase, 0,
                    kUnsignedByte);
   LIR* target = newLIR0(cUnit, kPseudoTargetLabel);
-  branchOver->target = (LIR*)target;
+  branchOver->target = target;
   oatFreeTemp(cUnit, regCardBase);
   oatFreeTemp(cUnit, regCardNo);
 }
@@ -235,7 +234,7 @@ void genEntrySequence(CompilationUnit* cUnit, RegLocation* argLocs,
    * a leaf *and* our frame size < fudge factor.
    */
   bool skipOverflowCheck = ((cUnit->attrs & METHOD_IS_LEAF) &&
-                ((size_t)cUnit->frameSize <
+                (static_cast<size_t>(cUnit->frameSize) <
                 Thread::kStackOverflowReservedBytes));
   newLIR0(cUnit, kPseudoMethodEntry);
   /* Spill core callee saves */
@@ -248,7 +247,7 @@ void genEntrySequence(CompilationUnit* cUnit, RegLocation* argLocs,
     opRegThreadMem(cUnit, kOpCmp, rX86_SP, Thread::StackEndOffset().Int32Value());
     opCondBranch(cUnit, kCondUlt, tgt);
     // Remember branch target - will process later
-    oatInsertGrowableList(cUnit, &cUnit->throwLaunchpads, (intptr_t)tgt);
+    oatInsertGrowableList(cUnit, &cUnit->throwLaunchpads, reinterpret_cast<uintptr_t>(tgt));
   }
 
   flushIns(cUnit, argLocs, rlMethod);
diff --git a/src/compiler/codegen/x86/fp_x86.cc b/src/compiler/codegen/x86/fp_x86.cc
index 411bd1e381..37e9168b25 100644
--- a/src/compiler/codegen/x86/fp_x86.cc
+++ b/src/compiler/codegen/x86/fp_x86.cc
@@ -324,7 +324,7 @@ void genFusedFPCmpBranch(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir,
       ccode = kCondCc;
       break;
     default:
-      LOG(FATAL) << "Unexpected ccode: " << (int)ccode;
+      LOG(FATAL) << "Unexpected ccode: " << ccode;
   }
   opCondBranch(cUnit, ccode, taken);
 }
diff --git a/src/compiler/codegen/x86/int_x86.cc b/src/compiler/codegen/x86/int_x86.cc
index 1673b55fdf..bcb51c42d3 100644
--- a/src/compiler/codegen/x86/int_x86.cc
+++ b/src/compiler/codegen/x86/int_x86.cc
@@ -29,7 +29,7 @@ LIR* genRegMemCheck(CompilationUnit* cUnit, ConditionCode cCode,
   opRegMem(cUnit, kOpCmp, reg1, base, offset);
   LIR* branch = opCondBranch(cUnit, cCode, tgt);
   // Remember branch target - will process later
-  oatInsertGrowableList(cUnit, &cUnit->throwLaunchpads, (intptr_t)tgt);
+  oatInsertGrowableList(cUnit, &cUnit->throwLaunchpads, reinterpret_cast<uintptr_t>(tgt));
   return branch;
 }
 
@@ -208,7 +208,7 @@ void genFusedLongCmpBranch(CompilationUnit* cUnit, BasicBlock* bb, MIR* mir) {
     case kCondGe:
       break;
     default:
-      LOG(FATAL) << "Unexpected ccode: " << (int)ccode;
+      LOG(FATAL) << "Unexpected ccode: " << ccode;
   }
   opCondBranch(cUnit, ccode, taken);
 }
diff --git a/src/compiler/codegen/x86/target_x86.cc b/src/compiler/codegen/x86/target_x86.cc
index a254876e60..b6440a759d 100644
--- a/src/compiler/codegen/x86/target_x86.cc
+++ b/src/compiler/codegen/x86/target_x86.cc
@@ -281,11 +281,10 @@ std::string buildInsnString(const char *fmt, LIR *lir, unsigned char* baseAddr)
   return buf;
 }
 
-void oatDumpResourceMask(LIR *lir, uint64_t mask, const char *prefix)
+void oatDumpResourceMask(LIR *x86LIR, uint64_t mask, const char *prefix)
 {
   char buf[256];
   buf[0] = 0;
-  LIR *x86LIR = (LIR *) lir;
 
   if (mask == ENCODE_ALL) {
     strcpy(buf, "all");
@@ -437,12 +436,6 @@ extern void oatFreeCallTemps(CompilationUnit* cUnit)
   oatFreeTemp(cUnit, rX86_ARG3);
 }
 
-/* Convert an instruction to a NOP */
-void oatNopLIR( LIR* lir)
-{
-  ((LIR*)lir)->flags.isNop = true;
-}
-
 /*
  * Determine the initial instruction set to be used for this trace.
  * Later components may decide to change this.
@@ -502,17 +495,17 @@ void oatInitializeRegAlloc(CompilationUnit* cUnit) {
   int numTemps = sizeof(coreTemps)/sizeof(*coreTemps);
   int numFPRegs = sizeof(fpRegs)/sizeof(*fpRegs);
   int numFPTemps = sizeof(fpTemps)/sizeof(*fpTemps);
-  RegisterPool *pool = (RegisterPool *)oatNew(cUnit, sizeof(*pool), true,
-                                              kAllocRegAlloc);
+  RegisterPool *pool =
+      static_cast<RegisterPool*>(oatNew(cUnit, sizeof(*pool), true, kAllocRegAlloc));
   cUnit->regPool = pool;
   pool->numCoreRegs = numRegs;
-  pool->coreRegs = (RegisterInfo *)
-      oatNew(cUnit, numRegs * sizeof(*cUnit->regPool->coreRegs), true,
-             kAllocRegAlloc);
+  pool->coreRegs =
+      static_cast<RegisterInfo*>(oatNew(cUnit, numRegs * sizeof(*cUnit->regPool->coreRegs),
+                                             true, kAllocRegAlloc));
   pool->numFPRegs = numFPRegs;
-  pool->FPRegs = (RegisterInfo *)
-      oatNew(cUnit, numFPRegs * sizeof(*cUnit->regPool->FPRegs), true,
-             kAllocRegAlloc);
+  pool->FPRegs =
+      static_cast<RegisterInfo *>(oatNew(cUnit, numFPRegs * sizeof(*cUnit->regPool->FPRegs),
+                                              true, kAllocRegAlloc));
   oatInitPool(pool->coreRegs, coreRegs, pool->numCoreRegs);
   oatInitPool(pool->FPRegs, fpRegs, pool->numFPRegs);
   // Keep special registers from being allocated
@@ -527,9 +520,8 @@ void oatInitializeRegAlloc(CompilationUnit* cUnit) {
     oatMarkTemp(cUnit, fpTemps[i]);
   }
   // Construct the alias map.
-  cUnit->phiAliasMap = (int*)oatNew(cUnit, cUnit->numSSARegs *
-                                    sizeof(cUnit->phiAliasMap[0]), false,
-                                    kAllocDFInfo);
+  cUnit->phiAliasMap = static_cast<int*>
+      (oatNew(cUnit, cUnit->numSSARegs * sizeof(cUnit->phiAliasMap[0]), false, kAllocDFInfo));
   for (int i = 0; i < cUnit->numSSARegs; i++) {
     cUnit->phiAliasMap[i] = i;
   }
@@ -586,44 +578,9 @@ void unSpillCoreRegs(CompilationUnit* cUnit) {
   }
 }
 
-/*
- * Nop any unconditional branches that go to the next instruction.
- * Note: new redundant branches may be inserted later, and we'll
- * use a check in final instruction assembly to nop those out.
- */
-void removeRedundantBranches(CompilationUnit* cUnit) {
-  LIR* thisLIR;
-
-  for (thisLIR = (LIR*) cUnit->firstLIRInsn;
-    thisLIR != (LIR*) cUnit->lastLIRInsn;
-    thisLIR = NEXT_LIR(thisLIR)) {
-
-  /* Branch to the next instruction */
-  if (thisLIR->opcode == kX86Jmp8 || thisLIR->opcode == kX86Jmp32) {
-    LIR* nextLIR = thisLIR;
-
-    while (true) {
-      nextLIR = NEXT_LIR(nextLIR);
-
-      /*
-       * Is the branch target the next instruction?
-       */
-      if (nextLIR == (LIR*) thisLIR->target) {
-        thisLIR->flags.isNop = true;
-        break;
-      }
-
-      /*
-       * Found real useful stuff between the branch and the target.
-       * Need to explicitly check the lastLIRInsn here because it
-       * might be the last real instruction.
-       */
-      if (!isPseudoOpcode(nextLIR->opcode) ||
-          (nextLIR = (LIR*) cUnit->lastLIRInsn))
-        break;
-      }
-    }
-  }
+bool branchUnconditional(LIR* lir)
+{
+  return (lir->opcode == kX86Jmp8 || lir->opcode == kX86Jmp32);
 }
 
 /* Common initialization routine for an architecture family */
@@ -634,7 +591,7 @@ bool oatArchInit() {
     if (EncodingMap[i].opcode != i) {
       LOG(FATAL) << "Encoding order for " << EncodingMap[i].name
                  << " is wrong: expecting " << i << ", seeing "
-                 << (int)EncodingMap[i].opcode;
+                 << static_cast<int>(EncodingMap[i].opcode);
     }
   }
 
diff --git a/src/compiler/codegen/x86/x86_lir.h b/src/compiler/codegen/x86/x86_lir.h
index 3008bc259c..9f29d081a0 100644
--- a/src/compiler/codegen/x86/x86_lir.h
+++ b/src/compiler/codegen/x86/x86_lir.h
@@ -220,7 +220,7 @@ enum X86NativeRegisterPool {
 #define rX86_COUNT rCX
 #define rX86_PC INVALID_REG
 
-#define isPseudoOpcode(opCode) ((int)(opCode) < 0)
+#define isPseudoOpcode(opCode) (static_cast<int>(opCode) < 0)
 
 /*
  * The following enum defines the list of supported X86 instructions by the