diff options
| author | 2012-04-09 16:29:25 -0700 | |
|---|---|---|
| committer | 2012-04-09 19:45:49 -0700 | |
| commit | d36c52ea6bc22883ef381f6da1ac05ef7524f63a (patch) | |
| tree | cc184142b857a666d4aca5d049852f123fa80dae /src/compiler/codegen/x86 | |
| parent | 82914b6164fd0109531391975389e4f0ff6832c8 (diff) | |
Check for null array assignments inline. Tidy asm macros.
Tidy/fix array object stores to not pass incremented register to card
mark. Fix x86 register allocator clobbers. Clean runtime support
assembler macros to be more macrotized. Extra X86 shift assert.
Add X86 thread suspension down call.
Change-Id: Ida765dcba32404519fe7eb478f5628d46caf41f7
Diffstat (limited to 'src/compiler/codegen/x86')
| -rw-r--r-- | src/compiler/codegen/x86/X86/Factory.cc | 8 | ||||
| -rw-r--r-- | src/compiler/codegen/x86/X86RallocUtil.cc | 2 |
2 files changed, 7 insertions, 3 deletions
diff --git a/src/compiler/codegen/x86/X86/Factory.cc b/src/compiler/codegen/x86/X86/Factory.cc index 9421744f69..2bd5b42458 100644 --- a/src/compiler/codegen/x86/X86/Factory.cc +++ b/src/compiler/codegen/x86/X86/Factory.cc @@ -173,6 +173,7 @@ LIR *opRegImm(CompilationUnit *cUnit, OpKind op, int rDestSrc1, int value) { LIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1, int rSrc2) { X86OpCode opcode = kX86Nop; + bool src2_must_be_cx = false; switch (op) { // X86 unary opcodes case kOpMvn: @@ -184,9 +185,9 @@ LIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1, int rSrc2) // X86 binary opcodes case kOpSub: opcode = kX86Sub32RR; break; case kOpSbc: opcode = kX86Sbb32RR; break; - case kOpLsl: opcode = kX86Sal32RC; break; - case kOpLsr: opcode = kX86Shr32RC; break; - case kOpAsr: opcode = kX86Sar32RC; break; + case kOpLsl: opcode = kX86Sal32RC; src2_must_be_cx = true; break; + case kOpLsr: opcode = kX86Shr32RC; src2_must_be_cx = true; break; + case kOpAsr: opcode = kX86Sar32RC; src2_must_be_cx = true; break; case kOpMov: opcode = kX86Mov32RR; break; case kOpCmp: opcode = kX86Cmp32RR; break; case kOpAdd: opcode = kX86Add32RR; break; @@ -202,6 +203,7 @@ LIR *opRegReg(CompilationUnit *cUnit, OpKind op, int rDestSrc1, int rSrc2) LOG(FATAL) << "Bad case in opRegReg " << op; break; } + CHECK(!src2_must_be_cx || rSrc2 == rCX); return newLIR2(cUnit, opcode, rDestSrc1, rSrc2); } diff --git a/src/compiler/codegen/x86/X86RallocUtil.cc b/src/compiler/codegen/x86/X86RallocUtil.cc index 297163250b..a85cb8af63 100644 --- a/src/compiler/codegen/x86/X86RallocUtil.cc +++ b/src/compiler/codegen/x86/X86RallocUtil.cc @@ -134,6 +134,7 @@ extern void oatLockCallTemps(CompilationUnit* cUnit) oatLockTemp(cUnit, rARG0); oatLockTemp(cUnit, rARG1); oatLockTemp(cUnit, rARG2); + oatLockTemp(cUnit, rARG3); } /* To be used when explicitly managing register use */ @@ -142,6 +143,7 @@ extern void oatFreeCallTemps(CompilationUnit* cUnit) oatFreeTemp(cUnit, rARG0); oatFreeTemp(cUnit, rARG1); oatFreeTemp(cUnit, rARG2); + oatFreeTemp(cUnit, rARG3); } /* Convert an instruction to a NOP */ |