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author buzbee <buzbee@google.com> 2012-11-13 12:13:16 -0800
committer buzbee <buzbee@google.com> 2012-11-13 13:13:40 -0800
commitec13743da80a80c1817cf6660c28917fc28846bc (patch)
treef551225a325636dc56e0a3c01c55a59316e9e829 /src/compiler/codegen/x86/ArchUtility.cc
parentf42b6f912dd390808bbd5c025d773ebb02a06ed7 (diff)
Revert "Revert "Refactor codegen resource masks""
This reverts commit 4b39c9f1b77ff32cf5760e6bf77c189678e2c9a6. The problem with the original commit was failure to widen a couple of local variables to hold the newly widenened to 64-bits EncodingMap flag field - thus we lost some high-order resource attributes and broke instruction scheduling for x86. Change-Id: I04d7caf79e2cc802c39369ca04666629218ccaea
Diffstat (limited to 'src/compiler/codegen/x86/ArchUtility.cc')
-rw-r--r--src/compiler/codegen/x86/ArchUtility.cc42
1 files changed, 40 insertions, 2 deletions
diff --git a/src/compiler/codegen/x86/ArchUtility.cc b/src/compiler/codegen/x86/ArchUtility.cc
index 4c28b35e03..953ce4a899 100644
--- a/src/compiler/codegen/x86/ArchUtility.cc
+++ b/src/compiler/codegen/x86/ArchUtility.cc
@@ -22,12 +22,50 @@
namespace art {
+/*
+ * Decode the register id.
+ */
+u8 getRegMaskCommon(CompilationUnit* cUnit, int reg)
+{
+ u8 seed;
+ int shift;
+ int regId;
+
+ regId = reg & 0xf;
+ /* Double registers in x86 are just a single FP register */
+ seed = 1;
+ /* FP register starts at bit position 16 */
+ shift = FPREG(reg) ? kX86FPReg0 : 0;
+ /* Expand the double register id into single offset */
+ shift += regId;
+ return (seed << shift);
+}
+
+uint64_t getPCUseDefEncoding()
+{
+ /*
+ * FIXME: might make sense to use a virtual resource encoding bit for pc. Might be
+ * able to clean up some of the x86/Arm_Mips differences
+ */
+ LOG(FATAL) << "Unexpected call to getPCUseDefEncoding for x86";
+ return 0ULL;
+}
+
void setupTargetResourceMasks(CompilationUnit* cUnit, LIR* lir)
{
DCHECK_EQ(cUnit->instructionSet, kX86);
// X86-specific resource map setup here.
- int flags = EncodingMap[lir->opcode].flags;
+ uint64_t flags = EncodingMap[lir->opcode].flags;
+
+ if (flags & REG_USE_SP) {
+ lir->useMask |= ENCODE_X86_REG_SP;
+ }
+
+ if (flags & REG_DEF_SP) {
+ lir->defMask |= ENCODE_X86_REG_SP;
+ }
+
if (flags & REG_DEFA) {
oatSetupRegMask(cUnit, &lir->defMask, rAX);
}
@@ -147,7 +185,7 @@ void oatDumpResourceMask(LIR *lir, u8 mask, const char *prefix)
char num[8];
int i;
- for (i = 0; i < kRegEnd; i++) {
+ for (i = 0; i < kX86RegEnd; i++) {
if (mask & (1ULL << i)) {
sprintf(num, "%d ", i);
strcat(buf, num);