diff options
| author | 2012-03-07 20:18:49 -0800 | |
|---|---|---|
| committer | 2012-03-07 20:18:49 -0800 | |
| commit | 680b1bdd7e5d112ba4b95d6c81a43b65119b3b9c (patch) | |
| tree | 21514b638db9b28cf26b4b452c3e5f9449568812 /src/compiler/codegen/mips | |
| parent | d8af8bd46c13347ca15558999db4da85dbc31818 (diff) | |
Unify branch flags, pretty printer for OpKind.
LIR operand 0 is always an offset for a branch. This is clear in
conditional branches that are binary and have the 2nd operand as the
condition codes of the branch. This changes unconditional branches to be
unary and therefore more intention revealing that the 1st operand will
be used by the assembler to hold an offset.
A << operator for OpKind allows easy pretty printing.
Change-Id: I933b8e0bf43f5be3eff13f93c3fc1539ae526840
Diffstat (limited to 'src/compiler/codegen/mips')
| -rw-r--r-- | src/compiler/codegen/mips/Assemble.cc | 4 | ||||
| -rw-r--r-- | src/compiler/codegen/mips/Mips32/Factory.cc | 15 |
2 files changed, 5 insertions, 14 deletions
diff --git a/src/compiler/codegen/mips/Assemble.cc b/src/compiler/codegen/mips/Assemble.cc index b487602701..359ec428d2 100644 --- a/src/compiler/codegen/mips/Assemble.cc +++ b/src/compiler/codegen/mips/Assemble.cc @@ -106,11 +106,11 @@ MipsEncodingMap EncodingMap[kMipsLast] = { "andi", "!0r,!1r,0x!2h(!2d)", 4), ENCODING_MAP(kMipsB, 0x10000000, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1, - kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH | NEEDS_FIXUP, + kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | NEEDS_FIXUP, "b", "!0t!0N", 8), ENCODING_MAP(kMipsBal, 0x04110000, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1, - kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH | REG_DEF_LR | + kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_DEF_LR | NEEDS_FIXUP, "bal", "!0t!0N", 8), ENCODING_MAP(kMipsBeq, 0x10000000, kFmtBitBlt, 25, 21, kFmtBitBlt, 20, 16, kFmtBitBlt, 15, 0, diff --git a/src/compiler/codegen/mips/Mips32/Factory.cc b/src/compiler/codegen/mips/Mips32/Factory.cc index 360fbb7c0f..286871054a 100644 --- a/src/compiler/codegen/mips/Mips32/Factory.cc +++ b/src/compiler/codegen/mips/Mips32/Factory.cc @@ -127,19 +127,10 @@ LIR *loadConstantNoClobber(CompilationUnit *cUnit, int rDest, return res; } -LIR *opNone(CompilationUnit *cUnit, OpKind op) +LIR *opBranchUnconditional(CompilationUnit *cUnit, OpKind op) { - LIR *res; - MipsOpCode opcode = kMipsNop; - switch (op) { - case kOpUncondBr: - opcode = kMipsB; - break; - default: - LOG(FATAL) << "Bad case in opNone"; - } - res = newLIR0(cUnit, opcode); - return res; + DCHECK_EQ(op, kOpUncondBr); + return newLIR1(cUnit, kMipsB, 0 /* offset to be patched */ ); } LIR *loadMultiple(CompilationUnit *cUnit, int rBase, int rMask); |