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author buzbee <buzbee@google.com> 2012-11-15 14:51:41 -0800
committer buzbee <buzbee@google.com> 2012-11-16 16:48:09 -0800
commiteaf09bc65f9a10d12befcdb239156938c9bceef2 (patch)
treee3b85c241b24aa058a413363e4f9c94f4c76d4d6 /src/compiler/codegen/gen_common.cc
parentefc6369224b036a1fb77849f7ae65b3492c832c0 (diff)
Quick compiler: more refactoring
Focus on header file cleanup here. Note: target_list.h is transitional, and upcoming CLs will do additional header file reorganization. Change-Id: If86e1a8c1c43305762fe37b157a9d3c17d911ea7
Diffstat (limited to 'src/compiler/codegen/gen_common.cc')
-rw-r--r--src/compiler/codegen/gen_common.cc8
1 files changed, 3 insertions, 5 deletions
diff --git a/src/compiler/codegen/gen_common.cc b/src/compiler/codegen/gen_common.cc
index bc61c54f1f..fe10fe46af 100644
--- a/src/compiler/codegen/gen_common.cc
+++ b/src/compiler/codegen/gen_common.cc
@@ -18,14 +18,14 @@
namespace art {
+//TODO: remove decl.
+void genInvoke(CompilationUnit* cUnit, CallInfo* info);
+
/*
* This source files contains "gen" codegen routines that should
* be applicable to most targets. Only mid-level support utilities
* and "op" calls may be used here.
*/
-void genInvoke(CompilationUnit* cUnit, CallInfo* info);
-bool smallLiteralDivide(CompilationUnit* cUnit, Instruction::Code dalvikOpcode,
- RegLocation rlSrc, RegLocation rlDest, int lit);
void markSafepointPC(CompilationUnit* cUnit, LIR* inst)
{
@@ -2161,7 +2161,6 @@ bool genConversionCall(CompilationUnit* cUnit, int funcOffset,
return false;
}
-void genNegFloat(CompilationUnit* cUnit, RegLocation rlDest, RegLocation rlSrc);
bool genArithOpFloatPortable(CompilationUnit* cUnit, Instruction::Code opcode,
RegLocation rlDest, RegLocation rlSrc1,
RegLocation rlSrc2)
@@ -2204,7 +2203,6 @@ bool genArithOpFloatPortable(CompilationUnit* cUnit, Instruction::Code opcode,
return false;
}
-void genNegDouble(CompilationUnit* cUnit, RegLocation rlDst, RegLocation rlSrc);
bool genArithOpDoublePortable(CompilationUnit* cUnit, Instruction::Code opcode,
RegLocation rlDest, RegLocation rlSrc1,
RegLocation rlSrc2)