diff options
| author | 2012-01-31 17:01:43 -0800 | |
|---|---|---|
| committer | 2012-02-02 15:56:41 -0800 | |
| commit | 5abfa3ea35781464df8fae60aaf03f48a295e965 (patch) | |
| tree | 3db19d0ecfc1031f86d77964de636ec45d4ba690 /src/compiler/codegen/arm | |
| parent | 6c7d244058b74cdd61533968dd6cddd7003d2671 (diff) | |
Compiler tuning
Significant reduction in memory usage by the compiler.
o Estimated sizes of growable lists to avoid waste
o Changed basic block predecessor structure from a growable bitmap
to a growable list.
o Conditionalized code which produced disassembly strings.
o Avoided generating some dataflow-related structures when compiling
in dataflow-disabled mode.
o Added memory usage statistics
o Eliminated floating point usage as a barrier to disabling expensive
dataflow analysis for very large init routines.
o Because iterating through sparse bit maps is much less of a concern now,
removed earlier hack that remembered runs of leading and trailing
zeroes.
Also, some general tuning.
o Minor tweaks to register utilties
o Speed up the assembly loop
o Rewrite of the bit vector iterator
Our previous worst-case method originally consumed 360 megabytes, but through
earlier changes was whittled down to 113 megabytes. Now it consumes 12 (which
so far appears to close to the highest compiler heap usage of anything
I've seen).
Post-wipe cold boot time is now less than 7 minutes.
Installation time for our application test cases also shows a large
gain - typically 25% to 40% speedup.
Single-threaded host compilation of core.jar down to <3.0s, boot.oat builds
in 17.2s. Next up: multi-threaded compilation.
Change-Id: I493d0d584c4145a6deccdd9bff344473023deb46
Diffstat (limited to 'src/compiler/codegen/arm')
| -rw-r--r-- | src/compiler/codegen/arm/ArchFactory.cc | 6 | ||||
| -rw-r--r-- | src/compiler/codegen/arm/ArmLIR.h | 5 | ||||
| -rw-r--r-- | src/compiler/codegen/arm/ArmRallocUtil.cc | 4 | ||||
| -rw-r--r-- | src/compiler/codegen/arm/Assemble.cc | 507 | ||||
| -rw-r--r-- | src/compiler/codegen/arm/CodegenCommon.cc | 16 | ||||
| -rw-r--r-- | src/compiler/codegen/arm/LocalOptimizations.cc | 4 | ||||
| -rw-r--r-- | src/compiler/codegen/arm/MethodCodegenDriver.cc | 20 | ||||
| -rw-r--r-- | src/compiler/codegen/arm/Thumb2/Factory.cc | 11 | ||||
| -rw-r--r-- | src/compiler/codegen/arm/Thumb2/Gen.cc | 28 |
9 files changed, 316 insertions, 285 deletions
diff --git a/src/compiler/codegen/arm/ArchFactory.cc b/src/compiler/codegen/arm/ArchFactory.cc index 14758b8af8..484a22d51a 100644 --- a/src/compiler/codegen/arm/ArchFactory.cc +++ b/src/compiler/codegen/arm/ArchFactory.cc @@ -56,7 +56,7 @@ STATIC int loadCurrMethod(CompilationUnit *cUnit) STATIC ArmLIR* genCheck(CompilationUnit* cUnit, ArmConditionCode cCode, MIR* mir, ArmThrowKind kind) { - ArmLIR* tgt = (ArmLIR*)oatNew(sizeof(ArmLIR), true); + ArmLIR* tgt = (ArmLIR*)oatNew(sizeof(ArmLIR), true, kAllocLIR); tgt->opcode = kArmPseudoThrowTarget; tgt->operands[0] = kind; tgt->operands[1] = mir ? mir->offset : 0; @@ -69,7 +69,7 @@ STATIC ArmLIR* genCheck(CompilationUnit* cUnit, ArmConditionCode cCode, STATIC ArmLIR* genImmedCheck(CompilationUnit* cUnit, ArmConditionCode cCode, int reg, int immVal, MIR* mir, ArmThrowKind kind) { - ArmLIR* tgt = (ArmLIR*)oatNew(sizeof(ArmLIR), true); + ArmLIR* tgt = (ArmLIR*)oatNew(sizeof(ArmLIR), true, kAllocLIR); tgt->opcode = kArmPseudoThrowTarget; tgt->operands[0] = kind; tgt->operands[1] = mir->offset; @@ -100,7 +100,7 @@ STATIC ArmLIR* genNullCheck(CompilationUnit* cUnit, int sReg, int mReg, STATIC TGT_LIR* genRegRegCheck(CompilationUnit* cUnit, ArmConditionCode cCode, int reg1, int reg2, MIR* mir, ArmThrowKind kind) { - ArmLIR* tgt = (ArmLIR*)oatNew(sizeof(ArmLIR), true); + ArmLIR* tgt = (ArmLIR*)oatNew(sizeof(ArmLIR), true, kAllocLIR); tgt->opcode = kArmPseudoThrowTarget; tgt->operands[0] = kind; tgt->operands[1] = mir ? mir->offset : 0; diff --git a/src/compiler/codegen/arm/ArmLIR.h b/src/compiler/codegen/arm/ArmLIR.h index e77bed3d3a..3c5daad990 100644 --- a/src/compiler/codegen/arm/ArmLIR.h +++ b/src/compiler/codegen/arm/ArmLIR.h @@ -739,6 +739,7 @@ typedef enum ArmOpFeatureFlags { kUsesCCodes, kMemLoad, kMemStore, + kPCRelFixup, } ArmOpFeatureFlags; #define IS_LOAD (1 << kMemLoad) @@ -770,6 +771,7 @@ typedef enum ArmOpFeatureFlags { #define IS_IT (1 << kIsIT) #define SETS_CCODES (1 << kSetsCCodes) #define USES_CCODES (1 << kUsesCCodes) +#define NEEDS_FIXUP (1 << kPCRelFixup) /* Common combo register usage patterns */ #define REG_USE01 (REG_USE0 | REG_USE1) @@ -844,9 +846,10 @@ typedef struct ArmLIR { bool isNop:1; // LIR is optimized away bool insertWrapper:1; // insert branch to emulate memory accesses bool squashed:1; // Eliminated def + bool pcRelFixup:1; // May need pc-relative fixup unsigned int age:4; // default is 0, set lazily by the optimizer unsigned int size:3; // bytes (2 for thumb, 2/4 for thumb2) - unsigned int unused:22; + unsigned int unused:21; } flags; int aliasInfo; // For Dalvik register & litpool disambiguation u8 useMask; // Resource mask for use diff --git a/src/compiler/codegen/arm/ArmRallocUtil.cc b/src/compiler/codegen/arm/ArmRallocUtil.cc index a193a7c7f9..d5400076c1 100644 --- a/src/compiler/codegen/arm/ArmRallocUtil.cc +++ b/src/compiler/codegen/arm/ArmRallocUtil.cc @@ -132,9 +132,9 @@ extern void oatDoPromotion(CompilationUnit* cUnit) * reg. */ RefCounts *coreRegs = (RefCounts *) - oatNew(sizeof(RefCounts) * numRegs, true); + oatNew(sizeof(RefCounts) * numRegs, true, kAllocRegAlloc); RefCounts *fpRegs = (RefCounts *) - oatNew(sizeof(RefCounts) * numRegs, true); + oatNew(sizeof(RefCounts) * numRegs, true, kAllocRegAlloc); for (int i = 0; i < numRegs; i++) { coreRegs[i].sReg = fpRegs[i].sReg = i; } diff --git a/src/compiler/codegen/arm/Assemble.cc b/src/compiler/codegen/arm/Assemble.cc index 83c7a6cc47..685dd4c645 100644 --- a/src/compiler/codegen/arm/Assemble.cc +++ b/src/compiler/codegen/arm/Assemble.cc @@ -118,7 +118,7 @@ ArmEncodingMap EncodingMap[kArmLast] = { "add", "!0C, !1C", 1), ENCODING_MAP(kThumbAddPcRel, 0xa000, kFmtBitBlt, 10, 8, kFmtBitBlt, 7, 0, kFmtUnused, -1, -1, - kFmtUnused, -1, -1, IS_TERTIARY_OP | IS_BRANCH, + kFmtUnused, -1, -1, IS_TERTIARY_OP | IS_BRANCH | NEEDS_FIXUP, "add", "!0C, pc, #!1E", 1), ENCODING_MAP(kThumbAddSpRel, 0xa800, kFmtBitBlt, 10, 8, kFmtUnused, -1, -1, kFmtBitBlt, 7, 0, @@ -145,11 +145,11 @@ ArmEncodingMap EncodingMap[kArmLast] = { "asrs", "!0C, !1C", 1), ENCODING_MAP(kThumbBCond, 0xd000, kFmtBitBlt, 7, 0, kFmtBitBlt, 11, 8, kFmtUnused, -1, -1, - kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | USES_CCODES, - "b!1c", "!0t", 1), + kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | USES_CCODES | + NEEDS_FIXUP, "b!1c", "!0t", 1), ENCODING_MAP(kThumbBUncond, 0xe000, kFmtBitBlt, 10, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1, - kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH, + kFmtUnused, -1, -1, NO_OPERAND | IS_BRANCH | NEEDS_FIXUP, "b", "!0t", 1), ENCODING_MAP(kThumbBicRR, 0x4380, kFmtBitBlt, 2, 0, kFmtBitBlt, 5, 3, kFmtUnused, -1, -1, @@ -162,12 +162,12 @@ ArmEncodingMap EncodingMap[kArmLast] = { "bkpt", "!0d", 1), ENCODING_MAP(kThumbBlx1, 0xf000, kFmtBitBlt, 10, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1, - kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_DEF_LR, - "blx_1", "!0u", 1), + kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_DEF_LR | + NEEDS_FIXUP, "blx_1", "!0u", 1), ENCODING_MAP(kThumbBlx2, 0xe800, kFmtBitBlt, 10, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1, - kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_DEF_LR, - "blx_2", "!0v", 1), + kFmtUnused, -1, -1, IS_BINARY_OP | IS_BRANCH | REG_DEF_LR | + NEEDS_FIXUP, "blx_2", "!0v", 1), ENCODING_MAP(kThumbBl1, 0xf000, kFmtBitBlt, 10, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1, kFmtUnused, -1, -1, IS_UNARY_OP | IS_BRANCH | REG_DEF_LR, @@ -230,7 +230,7 @@ ArmEncodingMap EncodingMap[kArmLast] = { ENCODING_MAP(kThumbLdrPcRel, 0x4800, kFmtBitBlt, 10, 8, kFmtBitBlt, 7, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0 | REG_USE_PC - | IS_LOAD, "ldr", "!0C, [pc, #!1E]", 1), + | IS_LOAD | NEEDS_FIXUP, "ldr", "!0C, [pc, #!1E]", 1), ENCODING_MAP(kThumbLdrSpRel, 0x9800, kFmtBitBlt, 10, 8, kFmtUnused, -1, -1, kFmtBitBlt, 7, 0, kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0 | REG_USE_SP @@ -405,11 +405,11 @@ ArmEncodingMap EncodingMap[kArmLast] = { ENCODING_MAP(kThumb2Vldrs, 0xed900a00, kFmtSfp, 22, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 7, 0, kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD | - REG_DEF_LR, "vldr", "!0s, [!1C, #!2E]", 2), + REG_DEF_LR | NEEDS_FIXUP, "vldr", "!0s, [!1C, #!2E]", 2), ENCODING_MAP(kThumb2Vldrd, 0xed900b00, kFmtDfp, 22, 12, kFmtBitBlt, 19, 16, kFmtBitBlt, 7, 0, kFmtUnused, -1, -1, IS_TERTIARY_OP | REG_DEF0_USE1 | IS_LOAD | - REG_DEF_LR, "vldr", "!0S, [!1C, #!2E]", 2), + REG_DEF_LR | NEEDS_FIXUP, "vldr", "!0S, [!1C, #!2E]", 2), ENCODING_MAP(kThumb2Vmuls, 0xee200a00, kFmtSfp, 22, 12, kFmtSfp, 7, 16, kFmtSfp, 5, 0, kFmtUnused, -1, -1, @@ -509,12 +509,12 @@ ArmEncodingMap EncodingMap[kArmLast] = { "ldr", "!0C, [!1C, #-!2d]", 2), ENCODING_MAP(kThumb2Cbnz, 0xb900, /* Note: does not affect flags */ kFmtBitBlt, 2, 0, kFmtImm6, -1, -1, kFmtUnused, -1, -1, - kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | IS_BRANCH, - "cbnz", "!0C,!1t", 1), + kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | IS_BRANCH | + NEEDS_FIXUP, "cbnz", "!0C,!1t", 1), ENCODING_MAP(kThumb2Cbz, 0xb100, /* Note: does not affect flags */ kFmtBitBlt, 2, 0, kFmtImm6, -1, -1, kFmtUnused, -1, -1, - kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | IS_BRANCH, - "cbz", "!0C,!1t", 1), + kFmtUnused, -1, -1, IS_BINARY_OP | REG_USE0 | IS_BRANCH | + NEEDS_FIXUP, "cbz", "!0C,!1t", 1), ENCODING_MAP(kThumb2AddRRI12, 0xf2000000, kFmtBitBlt, 11, 8, kFmtBitBlt, 19, 16, kFmtImm12, -1, -1, kFmtUnused, -1, -1, @@ -644,12 +644,12 @@ ArmEncodingMap EncodingMap[kArmLast] = { kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1, kFmtUnused, -1, -1, IS_UNARY_OP | REG_DEF_SP | REG_USE_SP | REG_DEF_LIST0 - | IS_LOAD, "pop", "<!0R>", 2), + | IS_LOAD | NEEDS_FIXUP, "pop", "<!0R>", 2), ENCODING_MAP(kThumb2Push, 0xe92d0000, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1, kFmtUnused, -1, -1, IS_UNARY_OP | REG_DEF_SP | REG_USE_SP | REG_USE_LIST0 - | IS_STORE, "push", "<!0R>", 2), + | IS_STORE | NEEDS_FIXUP, "push", "<!0R>", 2), ENCODING_MAP(kThumb2CmpRI8, 0xf1b00f00, kFmtBitBlt, 19, 16, kFmtModImm, -1, -1, kFmtUnused, -1, -1, kFmtUnused, -1, -1, @@ -791,12 +791,12 @@ ArmEncodingMap EncodingMap[kArmLast] = { ENCODING_MAP(kThumb2LdrPcRel12, 0xf8df0000, kFmtBitBlt, 15, 12, kFmtBitBlt, 11, 0, kFmtUnused, -1, -1, kFmtUnused, -1, -1, - IS_TERTIARY_OP | REG_DEF0 | REG_USE_PC | IS_LOAD, + IS_TERTIARY_OP | REG_DEF0 | REG_USE_PC | IS_LOAD | NEEDS_FIXUP, "ldr", "!0C, [r15pc, #!1d]", 2), ENCODING_MAP(kThumb2BCond, 0xf0008000, kFmtBrOffset, -1, -1, kFmtBitBlt, 25, 22, kFmtUnused, -1, -1, kFmtUnused, -1, -1, - IS_BINARY_OP | IS_BRANCH | USES_CCODES, + IS_BINARY_OP | IS_BRANCH | USES_CCODES | NEEDS_FIXUP, "b!1c", "!0t", 2), ENCODING_MAP(kThumb2Vmovd_RR, 0xeeb00b40, kFmtDfp, 22, 12, kFmtDfp, 5, 0, kFmtUnused, -1, -1, @@ -931,15 +931,16 @@ ArmEncodingMap EncodingMap[kArmLast] = { ENCODING_MAP(kThumb2Adr, 0xf20f0000, kFmtBitBlt, 11, 8, kFmtImm12, -1, -1, kFmtUnused, -1, -1, kFmtUnused, -1, -1, - IS_TERTIARY_OP | REG_DEF0,/* Note: doesn't affect flags */ + /* Note: doesn't affect flags */ + IS_TERTIARY_OP | REG_DEF0 | NEEDS_FIXUP, "adr", "!0C,#!1d", 2), ENCODING_MAP(kThumb2MovImm16LST, 0xf2400000, kFmtBitBlt, 11, 8, kFmtImm16, -1, -1, kFmtUnused, -1, -1, - kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0, + kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0 | NEEDS_FIXUP, "mov", "!0C, #!1M", 2), ENCODING_MAP(kThumb2MovImm16HST, 0xf2c00000, kFmtBitBlt, 11, 8, kFmtImm16, -1, -1, kFmtUnused, -1, -1, - kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0, + kFmtUnused, -1, -1, IS_BINARY_OP | REG_DEF0 | NEEDS_FIXUP, "movh", "!0C, #!1M", 2), ENCODING_MAP(kThumb2LdmiaWB, 0xe8b00000, kFmtBitBlt, 19, 16, kFmtBitBlt, 15, 0, kFmtUnused, -1, -1, @@ -1067,6 +1068,7 @@ STATIC AssemblerStatus assembleInstructions(CompilationUnit* cUnit, AssemblerStatus res = kSuccess; // Assume success for (lir = (ArmLIR *) cUnit->firstLIRInsn; lir; lir = NEXT_LIR(lir)) { + if (lir->opcode < 0) { if ((lir->opcode == kArmPseudoPseudoAlign4) && /* 1 means padding is needed */ @@ -1091,244 +1093,249 @@ STATIC AssemblerStatus assembleInstructions(CompilationUnit* cUnit, * Of course, the patching itself may cause new overflows so this * is an iterative process. */ - - if (lir->opcode == kThumbLdrPcRel || - lir->opcode == kThumb2LdrPcRel12 || - lir->opcode == kThumbAddPcRel || - ((lir->opcode == kThumb2Vldrd) && (lir->operands[1] == r15pc)) || - ((lir->opcode == kThumb2Vldrs) && (lir->operands[1] == r15pc))) { - /* - * PC-relative loads are mostly used to load immediates - * that are too large to materialize directly in one shot. - * However, if the load displacement exceeds the limit, - * we revert to a 2-instruction materialization sequence. - */ - ArmLIR *lirTarget = (ArmLIR *) lir->generic.target; - intptr_t pc = (lir->generic.offset + 4) & ~3; - intptr_t target = lirTarget->generic.offset; - int delta = target - pc; - if (delta & 0x3) { - LOG(FATAL) << "PC-rel offset not multiple of 4: " << delta; - } - // First, a sanity check for cases we shouldn't see now - if (((lir->opcode == kThumbAddPcRel) && (delta > 1020)) || - ((lir->opcode == kThumbLdrPcRel) && (delta > 1020))) { - // Shouldn't happen in current codegen. - LOG(FATAL) << "Unexpected pc-rel offset " << delta; - } - // Now, check for the two difficult cases - if (((lir->opcode == kThumb2LdrPcRel12) && (delta > 4091)) || - ((lir->opcode == kThumb2Vldrs) && (delta > 1020)) || - ((lir->opcode == kThumb2Vldrd) && (delta > 1020))) { + if (lir->flags.pcRelFixup) { + if (lir->opcode == kThumbLdrPcRel || + lir->opcode == kThumb2LdrPcRel12 || + lir->opcode == kThumbAddPcRel || + ((lir->opcode == kThumb2Vldrd) && (lir->operands[1] == r15pc)) || + ((lir->opcode == kThumb2Vldrs) && (lir->operands[1] == r15pc))) { /* - * Note: because rLR may be used to fix up out-of-range - * vldrs/vldrd we include REG_DEF_LR in the resource - * masks for these instructions. + * PC-relative loads are mostly used to load immediates + * that are too large to materialize directly in one shot. + * However, if the load displacement exceeds the limit, + * we revert to a 2-instruction materialization sequence. */ - int baseReg = (lir->opcode == kThumb2LdrPcRel12) ? - lir->operands[0] : rLR; + ArmLIR *lirTarget = (ArmLIR *) lir->generic.target; + intptr_t pc = (lir->generic.offset + 4) & ~3; + intptr_t target = lirTarget->generic.offset; + int delta = target - pc; + if (delta & 0x3) { + LOG(FATAL) << "PC-rel offset not multiple of 4: " << delta; + } + // First, a sanity check for cases we shouldn't see now + if (((lir->opcode == kThumbAddPcRel) && (delta > 1020)) || + ((lir->opcode == kThumbLdrPcRel) && (delta > 1020))) { + // Shouldn't happen in current codegen. + LOG(FATAL) << "Unexpected pc-rel offset " << delta; + } + // Now, check for the two difficult cases + if (((lir->opcode == kThumb2LdrPcRel12) && (delta > 4091)) || + ((lir->opcode == kThumb2Vldrs) && (delta > 1020)) || + ((lir->opcode == kThumb2Vldrd) && (delta > 1020))) { + /* + * Note: because rLR may be used to fix up out-of-range + * vldrs/vldrd we include REG_DEF_LR in the resource + * masks for these instructions. + */ + int baseReg = (lir->opcode == kThumb2LdrPcRel12) ? + lir->operands[0] : rLR; - // Add new Adr to generate the address - ArmLIR *newAdr = - (ArmLIR *)oatNew(sizeof(ArmLIR), true); - newAdr->generic.dalvikOffset = lir->generic.dalvikOffset; - newAdr->generic.target = lir->generic.target; - newAdr->opcode = kThumb2Adr; - newAdr->operands[0] = baseReg; - oatSetupResourceMasks(newAdr); - oatInsertLIRBefore((LIR*)lir, (LIR*)newAdr); + // Add new Adr to generate the address + ArmLIR *newAdr = + (ArmLIR *)oatNew(sizeof(ArmLIR), true, kAllocLIR); + newAdr->generic.dalvikOffset = lir->generic.dalvikOffset; + newAdr->generic.target = lir->generic.target; + newAdr->opcode = kThumb2Adr; + newAdr->operands[0] = baseReg; + oatSetupResourceMasks(newAdr); + oatInsertLIRBefore((LIR*)lir, (LIR*)newAdr); - // Convert to normal load - if (lir->opcode == kThumb2LdrPcRel12) { - lir->opcode = kThumb2LdrRRI12; + // Convert to normal load + if (lir->opcode == kThumb2LdrPcRel12) { + lir->opcode = kThumb2LdrRRI12; + } + // Change the load to be relative to the new Adr base + lir->operands[1] = baseReg; + lir->operands[2] = 0; + oatSetupResourceMasks(lir); + res = kRetryAll; + } else { + if ((lir->opcode == kThumb2Vldrs) || + (lir->opcode == kThumb2Vldrd)) { + lir->operands[2] = delta >> 2; + } else { + lir->operands[1] = (lir->opcode == kThumb2LdrPcRel12) ? + delta : delta >> 2; + } } - // Change the load to be relative to the new Adr base - lir->operands[1] = baseReg; - lir->operands[2] = 0; - oatSetupResourceMasks(lir); - res = kRetryAll; - } else { - if ((lir->opcode == kThumb2Vldrs) || - (lir->opcode == kThumb2Vldrd)) { - lir->operands[2] = delta >> 2; + } else if (lir->opcode == kThumb2Cbnz || lir->opcode == kThumb2Cbz) { + ArmLIR *targetLIR = (ArmLIR *) lir->generic.target; + intptr_t pc = lir->generic.offset + 4; + intptr_t target = targetLIR->generic.offset; + int delta = target - pc; + if (delta > 126 || delta < 0) { + /* Convert to cmp rx,#0 / b[eq/ne] tgt pair */ + ArmLIR *newInst = + (ArmLIR *)oatNew(sizeof(ArmLIR), true, kAllocLIR); + /* Make new branch instruction and insert after */ + newInst->generic.dalvikOffset = lir->generic.dalvikOffset; + newInst->opcode = kThumbBCond; + newInst->operands[0] = 0; + newInst->operands[1] = (lir->opcode == kThumb2Cbz) ? + kArmCondEq : kArmCondNe; + newInst->generic.target = lir->generic.target; + oatSetupResourceMasks(newInst); + oatInsertLIRAfter((LIR *)lir, (LIR *)newInst); + /* Convert the cb[n]z to a cmp rx, #0 ] */ + lir->opcode = kThumbCmpRI8; + /* operand[0] is src1 in both cb[n]z & CmpRI8 */ + lir->operands[1] = 0; + lir->generic.target = 0; + oatSetupResourceMasks(lir); + res = kRetryAll; } else { - lir->operands[1] = (lir->opcode == kThumb2LdrPcRel12) ? - delta : delta >> 2; + lir->operands[1] = delta >> 1; } - } - } else if (lir->opcode == kThumb2Cbnz || lir->opcode == kThumb2Cbz) { - ArmLIR *targetLIR = (ArmLIR *) lir->generic.target; - intptr_t pc = lir->generic.offset + 4; - intptr_t target = targetLIR->generic.offset; - int delta = target - pc; - if (delta > 126 || delta < 0) { - /* Convert to cmp rx,#0 / b[eq/ne] tgt pair */ - ArmLIR *newInst = - (ArmLIR *)oatNew(sizeof(ArmLIR), true); - /* Make new branch instruction and insert after */ - newInst->generic.dalvikOffset = lir->generic.dalvikOffset; - newInst->opcode = kThumbBCond; - newInst->operands[0] = 0; - newInst->operands[1] = (lir->opcode == kThumb2Cbz) ? - kArmCondEq : kArmCondNe; - newInst->generic.target = lir->generic.target; - oatSetupResourceMasks(newInst); - oatInsertLIRAfter((LIR *)lir, (LIR *)newInst); - /* Convert the cb[n]z to a cmp rx, #0 ] */ - lir->opcode = kThumbCmpRI8; - /* operand[0] is src1 in both cb[n]z & CmpRI8 */ - lir->operands[1] = 0; - lir->generic.target = 0; - oatSetupResourceMasks(lir); - res = kRetryAll; - } else { - lir->operands[1] = delta >> 1; - } - } else if (lir->opcode == kThumb2Push || - lir->opcode == kThumb2Pop) { - if (__builtin_popcount(lir->operands[0]) == 1) { - /* - * The standard push/pop multiple instruction - * requires at least two registers in the list. - * If we've got just one, switch to the single-reg - * encoding. - */ - lir->opcode = (lir->opcode == kThumb2Push) - ? kThumb2Push1 : kThumb2Pop1; - int reg = 0; - while (lir->operands[0]) { - if (lir->operands[0] & 0x1) { - break; - } else { - reg++; - lir->operands[0] >>= 1; + } else if (lir->opcode == kThumb2Push || + lir->opcode == kThumb2Pop) { + if (__builtin_popcount(lir->operands[0]) == 1) { + /* + * The standard push/pop multiple instruction + * requires at least two registers in the list. + * If we've got just one, switch to the single-reg + * encoding. + */ + lir->opcode = (lir->opcode == kThumb2Push) + ? kThumb2Push1 : kThumb2Pop1; + int reg = 0; + while (lir->operands[0]) { + if (lir->operands[0] & 0x1) { + break; + } else { + reg++; + lir->operands[0] >>= 1; + } } + lir->operands[0] = reg; + oatSetupResourceMasks(lir); + res = kRetryAll; } - lir->operands[0] = reg; - oatSetupResourceMasks(lir); - res = kRetryAll; - } - } else if (lir->opcode == kThumbBCond || - lir->opcode == kThumb2BCond) { - ArmLIR *targetLIR = (ArmLIR *) lir->generic.target; - int delta = 0; - DCHECK(targetLIR); - intptr_t pc = lir->generic.offset + 4; - intptr_t target = targetLIR->generic.offset; - delta = target - pc; - if ((lir->opcode == kThumbBCond) && (delta > 254 || delta < -256)) { - lir->opcode = kThumb2BCond; - oatSetupResourceMasks(lir); - res = kRetryAll; - } - lir->operands[0] = delta >> 1; - } else if (lir->opcode == kThumb2BUncond) { - ArmLIR *targetLIR = (ArmLIR *) lir->generic.target; - intptr_t pc = lir->generic.offset + 4; - intptr_t target = targetLIR->generic.offset; - int delta = target - pc; - lir->operands[0] = delta >> 1; - if (lir->operands[0] == 0) { // Useless branch? - lir->flags.isNop = true; - res = kRetryAll; - } - } else if (lir->opcode == kThumbBUncond) { - ArmLIR *targetLIR = (ArmLIR *) lir->generic.target; - intptr_t pc = lir->generic.offset + 4; - intptr_t target = targetLIR->generic.offset; - int delta = target - pc; - if (delta > 2046 || delta < -2048) { - // Convert to Thumb2BCond w/ kArmCondAl - lir->opcode = kThumb2BUncond; - lir->operands[0] = 0; - oatSetupResourceMasks(lir); - res = kRetryAll; - } - lir->operands[0] = delta >> 1; - if ((lir->operands[0] == 0) || - (lir->operands[0] == -1)) { // Useless branch? - lir->flags.isNop = true; - res = kRetryAll; - } - } else if (lir->opcode == kThumbBlx1) { - DCHECK(NEXT_LIR(lir)->opcode == kThumbBlx2); - /* curPC is Thumb */ - intptr_t curPC = (startAddr + lir->generic.offset + 4) & ~3; - intptr_t target = lir->operands[1]; + } else if (lir->opcode == kThumbBCond || + lir->opcode == kThumb2BCond) { + ArmLIR *targetLIR = (ArmLIR *) lir->generic.target; + int delta = 0; + DCHECK(targetLIR); + intptr_t pc = lir->generic.offset + 4; + intptr_t target = targetLIR->generic.offset; + delta = target - pc; + if ((lir->opcode == kThumbBCond) && + (delta > 254 || delta < -256)) { + lir->opcode = kThumb2BCond; + oatSetupResourceMasks(lir); + res = kRetryAll; + } + lir->operands[0] = delta >> 1; + } else if (lir->opcode == kThumb2BUncond) { + ArmLIR *targetLIR = (ArmLIR *) lir->generic.target; + intptr_t pc = lir->generic.offset + 4; + intptr_t target = targetLIR->generic.offset; + int delta = target - pc; + lir->operands[0] = delta >> 1; + if (lir->operands[0] == 0) { // Useless branch? + lir->flags.isNop = true; + res = kRetryAll; + } + } else if (lir->opcode == kThumbBUncond) { + ArmLIR *targetLIR = (ArmLIR *) lir->generic.target; + intptr_t pc = lir->generic.offset + 4; + intptr_t target = targetLIR->generic.offset; + int delta = target - pc; + if (delta > 2046 || delta < -2048) { + // Convert to Thumb2BCond w/ kArmCondAl + lir->opcode = kThumb2BUncond; + lir->operands[0] = 0; + oatSetupResourceMasks(lir); + res = kRetryAll; + } + lir->operands[0] = delta >> 1; + if ((lir->operands[0] == 0) || + (lir->operands[0] == -1)) { // Useless branch? + lir->flags.isNop = true; + res = kRetryAll; + } + } else if (lir->opcode == kThumbBlx1) { + DCHECK(NEXT_LIR(lir)->opcode == kThumbBlx2); + /* curPC is Thumb */ + intptr_t curPC = (startAddr + lir->generic.offset + 4) & ~3; + intptr_t target = lir->operands[1]; - /* Match bit[1] in target with base */ - if (curPC & 0x2) { - target |= 0x2; - } - int delta = target - curPC; - DCHECK((delta >= -(1<<22)) && (delta <= ((1<<22)-2))); + /* Match bit[1] in target with base */ + if (curPC & 0x2) { + target |= 0x2; + } + int delta = target - curPC; + DCHECK((delta >= -(1<<22)) && (delta <= ((1<<22)-2))); - lir->operands[0] = (delta >> 12) & 0x7ff; - NEXT_LIR(lir)->operands[0] = (delta>> 1) & 0x7ff; - } else if (lir->opcode == kThumbBl1) { - DCHECK(NEXT_LIR(lir)->opcode == kThumbBl2); - /* Both curPC and target are Thumb */ - intptr_t curPC = startAddr + lir->generic.offset + 4; - intptr_t target = lir->operands[1]; + lir->operands[0] = (delta >> 12) & 0x7ff; + NEXT_LIR(lir)->operands[0] = (delta>> 1) & 0x7ff; + } else if (lir->opcode == kThumbBl1) { + DCHECK(NEXT_LIR(lir)->opcode == kThumbBl2); + /* Both curPC and target are Thumb */ + intptr_t curPC = startAddr + lir->generic.offset + 4; + intptr_t target = lir->operands[1]; - int delta = target - curPC; - DCHECK((delta >= -(1<<22)) && (delta <= ((1<<22)-2))); + int delta = target - curPC; + DCHECK((delta >= -(1<<22)) && (delta <= ((1<<22)-2))); - lir->operands[0] = (delta >> 12) & 0x7ff; - NEXT_LIR(lir)->operands[0] = (delta>> 1) & 0x7ff; - } else if (lir->opcode == kThumb2Adr) { - SwitchTable *tabRec = (SwitchTable*)lir->operands[2]; - ArmLIR* target = (ArmLIR*)lir->generic.target; - int targetDisp = tabRec ? tabRec->offset : target->generic.offset; - int disp = targetDisp - ((lir->generic.offset + 4) & ~3); - if (disp < 4096) { - lir->operands[1] = disp; - } else { - // convert to ldimm16l, ldimm16h, add tgt, pc, operands[0] - ArmLIR *newMov16L = - (ArmLIR *)oatNew(sizeof(ArmLIR), true); - newMov16L->generic.dalvikOffset = lir->generic.dalvikOffset; - newMov16L->generic.target = lir->generic.target; - newMov16L->opcode = kThumb2MovImm16LST; - newMov16L->operands[0] = lir->operands[0]; - newMov16L->operands[2] = (intptr_t)lir; - newMov16L->operands[3] = (intptr_t)tabRec; - oatSetupResourceMasks(newMov16L); - oatInsertLIRBefore((LIR*)lir, (LIR*)newMov16L); - ArmLIR *newMov16H = - (ArmLIR *)oatNew(sizeof(ArmLIR), true); - newMov16H->generic.dalvikOffset = lir->generic.dalvikOffset; - newMov16H->generic.target = lir->generic.target; - newMov16H->opcode = kThumb2MovImm16HST; - newMov16H->operands[0] = lir->operands[0]; - newMov16H->operands[2] = (intptr_t)lir; - newMov16H->operands[3] = (intptr_t)tabRec; - oatSetupResourceMasks(newMov16H); - oatInsertLIRBefore((LIR*)lir, (LIR*)newMov16H); - lir->opcode = kThumb2AddRRR; - lir->operands[1] = rPC; - lir->operands[2] = lir->operands[0]; - oatSetupResourceMasks(lir); - res = kRetryAll; + lir->operands[0] = (delta >> 12) & 0x7ff; + NEXT_LIR(lir)->operands[0] = (delta>> 1) & 0x7ff; + } else if (lir->opcode == kThumb2Adr) { + SwitchTable *tabRec = (SwitchTable*)lir->operands[2]; + ArmLIR* target = (ArmLIR*)lir->generic.target; + int targetDisp = tabRec ? tabRec->offset + : target->generic.offset; + int disp = targetDisp - ((lir->generic.offset + 4) & ~3); + if (disp < 4096) { + lir->operands[1] = disp; + } else { + // convert to ldimm16l, ldimm16h, add tgt, pc, operands[0] + ArmLIR *newMov16L = + (ArmLIR *)oatNew(sizeof(ArmLIR), true, kAllocLIR); + newMov16L->generic.dalvikOffset = lir->generic.dalvikOffset; + newMov16L->generic.target = lir->generic.target; + newMov16L->opcode = kThumb2MovImm16LST; + newMov16L->operands[0] = lir->operands[0]; + newMov16L->operands[2] = (intptr_t)lir; + newMov16L->operands[3] = (intptr_t)tabRec; + oatSetupResourceMasks(newMov16L); + oatInsertLIRBefore((LIR*)lir, (LIR*)newMov16L); + ArmLIR *newMov16H = + (ArmLIR *)oatNew(sizeof(ArmLIR), true, kAllocLIR); + newMov16H->generic.dalvikOffset = lir->generic.dalvikOffset; + newMov16H->generic.target = lir->generic.target; + newMov16H->opcode = kThumb2MovImm16HST; + newMov16H->operands[0] = lir->operands[0]; + newMov16H->operands[2] = (intptr_t)lir; + newMov16H->operands[3] = (intptr_t)tabRec; + oatSetupResourceMasks(newMov16H); + oatInsertLIRBefore((LIR*)lir, (LIR*)newMov16H); + lir->opcode = kThumb2AddRRR; + lir->operands[1] = rPC; + lir->operands[2] = lir->operands[0]; + oatSetupResourceMasks(lir); + res = kRetryAll; + } + } else if (lir->opcode == kThumb2MovImm16LST) { + // operands[1] should hold disp, [2] has add, [3] has tabRec + ArmLIR *addPCInst = (ArmLIR*)lir->operands[2]; + SwitchTable *tabRec = (SwitchTable*)lir->operands[3]; + // If tabRec is null, this is a literal load. Use generic.target + ArmLIR* target = (ArmLIR*)lir->generic.target; + int targetDisp = tabRec ? tabRec->offset + : target->generic.offset; + lir->operands[1] = (targetDisp - + (addPCInst->generic.offset + 4)) & 0xffff; + } else if (lir->opcode == kThumb2MovImm16HST) { + // operands[1] should hold disp, [2] has add, [3] has tabRec + ArmLIR *addPCInst = (ArmLIR*)lir->operands[2]; + SwitchTable *tabRec = (SwitchTable*)lir->operands[3]; + // If tabRec is null, this is a literal load. Use generic.target + ArmLIR* target = (ArmLIR*)lir->generic.target; + int targetDisp = tabRec ? tabRec->offset + : target->generic.offset; + lir->operands[1] = ((targetDisp - + (addPCInst->generic.offset + 4)) >> 16) & 0xffff; } - } else if (lir->opcode == kThumb2MovImm16LST) { - // operands[1] should hold disp, [2] has add, [3] has tabRec - ArmLIR *addPCInst = (ArmLIR*)lir->operands[2]; - SwitchTable *tabRec = (SwitchTable*)lir->operands[3]; - // If tabRec is null, this is a literal load - use generic.target - ArmLIR* target = (ArmLIR*)lir->generic.target; - int targetDisp = tabRec ? tabRec->offset : target->generic.offset; - lir->operands[1] = (targetDisp - - (addPCInst->generic.offset + 4)) & 0xffff; - } else if (lir->opcode == kThumb2MovImm16HST) { - // operands[1] should hold disp, [2] has add, [3] has tabRec - ArmLIR *addPCInst = (ArmLIR*)lir->operands[2]; - SwitchTable *tabRec = (SwitchTable*)lir->operands[3]; - // If tabRec is null, this is a literal load - use generic.target - ArmLIR* target = (ArmLIR*)lir->generic.target; - int targetDisp = tabRec ? tabRec->offset : target->generic.offset; - lir->operands[1] = ((targetDisp - - (addPCInst->generic.offset + 4)) >> 16) & 0xffff; } ArmEncodingMap *encoder = &EncodingMap[lir->opcode]; u4 bits = encoder->skeleton; @@ -1526,9 +1533,11 @@ void assignOffsets(CompilationUnit* cUnit) armLIR; armLIR = NEXT_LIR(armLIR)) { armLIR->generic.offset = offset; - if (armLIR->opcode >= 0 && !armLIR->flags.isNop) { - armLIR->flags.size = EncodingMap[armLIR->opcode].size * 2; - offset += armLIR->flags.size; + if (armLIR->opcode >= 0) { + if (!armLIR->flags.isNop) { + armLIR->flags.size = EncodingMap[armLIR->opcode].size * 2; + offset += armLIR->flags.size; + } } else if (armLIR->opcode == kArmPseudoPseudoAlign4) { if (offset & 0x2) { offset += 2; diff --git a/src/compiler/codegen/arm/CodegenCommon.cc b/src/compiler/codegen/arm/CodegenCommon.cc index 26c17ef17b..c99573f11c 100644 --- a/src/compiler/codegen/arm/CodegenCommon.cc +++ b/src/compiler/codegen/arm/CodegenCommon.cc @@ -124,6 +124,10 @@ STATIC void setupResourceMasks(ArmLIR* lir) flags = EncodingMap[lir->opcode].flags; + if (flags & NEEDS_FIXUP) { + lir->flags.pcRelFixup = true; + } + /* Set up the mask for resources that are updated */ if (flags & (IS_LOAD | IS_STORE)) { /* Default to heap - will catch specialized classes later */ @@ -241,7 +245,7 @@ STATIC void setupResourceMasks(ArmLIR* lir) */ STATIC ArmLIR* newLIR0(CompilationUnit* cUnit, ArmOpcode opcode) { - ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true); + ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR); DCHECK(isPseudoOpcode(opcode) || (EncodingMap[opcode].flags & NO_OPERAND)); insn->opcode = opcode; setupResourceMasks(insn); @@ -253,7 +257,7 @@ STATIC ArmLIR* newLIR0(CompilationUnit* cUnit, ArmOpcode opcode) STATIC ArmLIR* newLIR1(CompilationUnit* cUnit, ArmOpcode opcode, int dest) { - ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true); + ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR); DCHECK(isPseudoOpcode(opcode) || (EncodingMap[opcode].flags & IS_UNARY_OP)); insn->opcode = opcode; insn->operands[0] = dest; @@ -266,7 +270,7 @@ STATIC ArmLIR* newLIR1(CompilationUnit* cUnit, ArmOpcode opcode, STATIC ArmLIR* newLIR2(CompilationUnit* cUnit, ArmOpcode opcode, int dest, int src1) { - ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true); + ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR); DCHECK(isPseudoOpcode(opcode) || (EncodingMap[opcode].flags & IS_BINARY_OP)); insn->opcode = opcode; @@ -281,7 +285,7 @@ STATIC ArmLIR* newLIR2(CompilationUnit* cUnit, ArmOpcode opcode, STATIC ArmLIR* newLIR3(CompilationUnit* cUnit, ArmOpcode opcode, int dest, int src1, int src2) { - ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true); + ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR); DCHECK(isPseudoOpcode(opcode) || (EncodingMap[opcode].flags & IS_TERTIARY_OP)) << (int)opcode << " " @@ -301,7 +305,7 @@ STATIC ArmLIR* newLIR3(CompilationUnit* cUnit, ArmOpcode opcode, STATIC ArmLIR* newLIR4(CompilationUnit* cUnit, ArmOpcode opcode, int dest, int src1, int src2, int info) { - ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true); + ArmLIR* insn = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR); DCHECK(isPseudoOpcode(opcode) || (EncodingMap[opcode].flags & IS_QUAD_OP)); insn->opcode = opcode; @@ -361,7 +365,7 @@ STATIC ArmLIR* addWordData(CompilationUnit* cUnit, LIR* *constantListP, { /* Add the constant to the literal pool */ if (constantListP) { - ArmLIR* newValue = (ArmLIR* ) oatNew(sizeof(ArmLIR), true); + ArmLIR* newValue = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocData); newValue->operands[0] = value; newValue->generic.next = *constantListP; *constantListP = (LIR*) newValue; diff --git a/src/compiler/codegen/arm/LocalOptimizations.cc b/src/compiler/codegen/arm/LocalOptimizations.cc index eba701b195..2883209148 100644 --- a/src/compiler/codegen/arm/LocalOptimizations.cc +++ b/src/compiler/codegen/arm/LocalOptimizations.cc @@ -236,7 +236,7 @@ STATIC void applyLoadStoreElimination(CompilationUnit* cUnit, /* Only sink store instructions */ if (sinkDistance && !isThisLIRLoad) { ArmLIR* newStoreLIR = - (ArmLIR* ) oatNew(sizeof(ArmLIR), true); + (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR); *newStoreLIR = *thisLIR; /* * Stop point found - insert *before* the checkLIR @@ -424,7 +424,7 @@ STATIC void applyLoadHoisting(CompilationUnit* cUnit, if (slot >= 0) { ArmLIR* curLIR = prevInstList[slot]; ArmLIR* newLoadLIR = (ArmLIR* ) oatNew(sizeof(ArmLIR), - true); + true, kAllocLIR); *newLoadLIR = *thisLIR; /* * Insertion is guaranteed to succeed since checkLIR diff --git a/src/compiler/codegen/arm/MethodCodegenDriver.cc b/src/compiler/codegen/arm/MethodCodegenDriver.cc index bb66451221..1efab120e1 100644 --- a/src/compiler/codegen/arm/MethodCodegenDriver.cc +++ b/src/compiler/codegen/arm/MethodCodegenDriver.cc @@ -1859,13 +1859,20 @@ STATIC const char* extendedMIROpNames[kMirOpLast - kMirOpFirst] = { STATIC void handleExtendedMethodMIR(CompilationUnit* cUnit, MIR* mir) { int opOffset = mir->dalvikInsn.opcode - kMirOpFirst; - char* msg = (char*)oatNew(strlen(extendedMIROpNames[opOffset]) + 1, false); - strcpy(msg, extendedMIROpNames[opOffset]); + char* msg = NULL; + if (cUnit->printMe) { + msg = (char*)oatNew(strlen(extendedMIROpNames[opOffset]) + 1, false, + kAllocDebugInfo); + strcpy(msg, extendedMIROpNames[opOffset]); + } ArmLIR* op = newLIR1(cUnit, kArmPseudoExtended, (int) msg); switch ((ExtendedMIROpcode)mir->dalvikInsn.opcode) { case kMirOpPhi: { - char* ssaString = oatGetSSAString(cUnit, mir->ssaRep); + char* ssaString = NULL; + if (cUnit->printMe) { + ssaString = oatGetSSAString(cUnit, mir->ssaRep); + } op->flags.isNop = true; newLIR1(cUnit, kArmPseudoSSARep, (int) ssaString); break; @@ -2043,9 +2050,10 @@ STATIC bool methodBlockCodeGen(CompilationUnit* cUnit, BasicBlock* bb) ArmLIR* boundaryLIR; /* Mark the beginning of a Dalvik instruction for line tracking */ + char* instStr = cUnit->printMe ? + oatGetDalvikDisassembly(&mir->dalvikInsn, "") : NULL; boundaryLIR = newLIR1(cUnit, kArmPseudoDalvikByteCodeBoundary, - (int) oatGetDalvikDisassembly( - &mir->dalvikInsn, "")); + (intptr_t) instStr); cUnit->boundaryMap.insert(std::make_pair(mir->offset, (LIR*)boundaryLIR)); /* Remember the first LIR for this block */ @@ -2227,7 +2235,7 @@ void oatMethodMIR2LIR(CompilationUnit* cUnit) { /* Used to hold the labels of each block */ cUnit->blockLabelList = - (void *) oatNew(sizeof(ArmLIR) * cUnit->numBlocks, true); + (void *) oatNew(sizeof(ArmLIR) * cUnit->numBlocks, true, kAllocLIR); oatDataFlowAnalysisDispatcher(cUnit, methodBlockCodeGen, kPreOrderDFSTraversal, false /* Iterative */); diff --git a/src/compiler/codegen/arm/Thumb2/Factory.cc b/src/compiler/codegen/arm/Thumb2/Factory.cc index ebc30f8daa..34ffa603cb 100644 --- a/src/compiler/codegen/arm/Thumb2/Factory.cc +++ b/src/compiler/codegen/arm/Thumb2/Factory.cc @@ -69,7 +69,7 @@ STATIC ArmLIR* loadFPConstantValue(CompilationUnit* cUnit, int rDest, if (dataTarget == NULL) { dataTarget = addWordData(cUnit, &cUnit->literalList, value); } - ArmLIR* loadPcRel = (ArmLIR* ) oatNew(sizeof(ArmLIR), true); + ArmLIR* loadPcRel = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR); loadPcRel->generic.dalvikOffset = cUnit->currentDalvikOffset; loadPcRel->opcode = kThumb2Vldrs; loadPcRel->generic.target = (LIR* ) dataTarget; @@ -178,7 +178,7 @@ STATIC ArmLIR* loadConstantNoClobber(CompilationUnit* cUnit, int rDest, if (dataTarget == NULL) { dataTarget = addWordData(cUnit, &cUnit->literalList, value); } - ArmLIR* loadPcRel = (ArmLIR* ) oatNew(sizeof(ArmLIR), true); + ArmLIR* loadPcRel = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR); loadPcRel->opcode = kThumb2LdrPcRel12; loadPcRel->generic.target = (LIR* ) dataTarget; loadPcRel->generic.dalvikOffset = cUnit->currentDalvikOffset; @@ -655,7 +655,8 @@ STATIC ArmLIR* loadConstantValueWide(CompilationUnit* cUnit, int rDestLo, dataTarget = addWideData(cUnit, &cUnit->literalList, valLo, valHi); } - ArmLIR* loadPcRel = (ArmLIR* ) oatNew(sizeof(ArmLIR), true); + ArmLIR* loadPcRel = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, + kAllocLIR); loadPcRel->generic.dalvikOffset = cUnit->currentDalvikOffset; loadPcRel->opcode = kThumb2Vldrd; loadPcRel->generic.target = (LIR* ) dataTarget; @@ -1071,7 +1072,7 @@ STATIC ArmLIR* genCmpImmBranch(CompilationUnit* cUnit, STATIC ArmLIR* fpRegCopy(CompilationUnit* cUnit, int rDest, int rSrc) { - ArmLIR* res = (ArmLIR* ) oatNew(sizeof(ArmLIR), true); + ArmLIR* res = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR); res->generic.dalvikOffset = cUnit->currentDalvikOffset; res->operands[0] = rDest; res->operands[1] = rSrc; @@ -1102,7 +1103,7 @@ STATIC ArmLIR* genRegCopyNoInsert(CompilationUnit* cUnit, int rDest, int rSrc) ArmOpcode opcode; if (FPREG(rDest) || FPREG(rSrc)) return fpRegCopy(cUnit, rDest, rSrc); - res = (ArmLIR* ) oatNew(sizeof(ArmLIR), true); + res = (ArmLIR* ) oatNew(sizeof(ArmLIR), true, kAllocLIR); res->generic.dalvikOffset = cUnit->currentDalvikOffset; if (LOWREG(rDest) && LOWREG(rSrc)) opcode = kThumbMovRR; diff --git a/src/compiler/codegen/arm/Thumb2/Gen.cc b/src/compiler/codegen/arm/Thumb2/Gen.cc index 1c2f85082b..fe0d3f251e 100644 --- a/src/compiler/codegen/arm/Thumb2/Gen.cc +++ b/src/compiler/codegen/arm/Thumb2/Gen.cc @@ -134,7 +134,7 @@ STATIC ArmLIR* insertCaseLabel(CompilationUnit* cUnit, int vaddr, int keyVal) if (it == cUnit->boundaryMap.end()) { LOG(FATAL) << "Error: didn't find vaddr 0x" << std::hex << vaddr; } - ArmLIR* newLabel = (ArmLIR*)oatNew(sizeof(ArmLIR), true); + ArmLIR* newLabel = (ArmLIR*)oatNew(sizeof(ArmLIR), true, kAllocLIR); newLabel->generic.dalvikOffset = vaddr; newLabel->opcode = kArmPseudoCaseLabel; newLabel->operands[0] = keyVal; @@ -260,11 +260,12 @@ STATIC void genSparseSwitch(CompilationUnit* cUnit, MIR* mir, } // Add the table to the list - we'll process it later SwitchTable *tabRec = (SwitchTable *)oatNew(sizeof(SwitchTable), - true); + true, kAllocData); tabRec->table = table; tabRec->vaddr = mir->offset; int size = table[1]; - tabRec->targets = (ArmLIR* *)oatNew(size * sizeof(ArmLIR*), true); + tabRec->targets = (ArmLIR* *)oatNew(size * sizeof(ArmLIR*), true, + kAllocLIR); oatInsertGrowableList(&cUnit->switchTables, (intptr_t)tabRec); // Get the switch value @@ -310,11 +311,12 @@ STATIC void genPackedSwitch(CompilationUnit* cUnit, MIR* mir, } // Add the table to the list - we'll process it later SwitchTable *tabRec = (SwitchTable *)oatNew(sizeof(SwitchTable), - true); + true, kAllocData); tabRec->table = table; tabRec->vaddr = mir->offset; int size = table[1]; - tabRec->targets = (ArmLIR* *)oatNew(size * sizeof(ArmLIR*), true); + tabRec->targets = (ArmLIR* *)oatNew(size * sizeof(ArmLIR*), true, + kAllocLIR); oatInsertGrowableList(&cUnit->switchTables, (intptr_t)tabRec); // Get the switch value @@ -365,7 +367,7 @@ STATIC void genFillArrayData(CompilationUnit* cUnit, MIR* mir, const u2* table = cUnit->insns + mir->offset + mir->dalvikInsn.vB; // Add the table to the list - we'll process it later FillArrayData *tabRec = (FillArrayData *) - oatNew(sizeof(FillArrayData), true); + oatNew(sizeof(FillArrayData), true, kAllocData); tabRec->table = table; tabRec->vaddr = mir->offset; u2 width = tabRec->table[1]; @@ -932,14 +934,17 @@ void oatInitializeRegAlloc(CompilationUnit* cUnit) int numTemps = sizeof(coreTemps)/sizeof(*coreTemps); int numFPRegs = sizeof(fpRegs)/sizeof(*fpRegs); int numFPTemps = sizeof(fpTemps)/sizeof(*fpTemps); - RegisterPool *pool = (RegisterPool *)oatNew(sizeof(*pool), true); + RegisterPool *pool = (RegisterPool *)oatNew(sizeof(*pool), true, + kAllocRegAlloc); cUnit->regPool = pool; pool->numCoreRegs = numRegs; pool->coreRegs = (RegisterInfo *) - oatNew(numRegs * sizeof(*cUnit->regPool->coreRegs), true); + oatNew(numRegs * sizeof(*cUnit->regPool->coreRegs), true, + kAllocRegAlloc); pool->numFPRegs = numFPRegs; pool->FPRegs = (RegisterInfo *) - oatNew(numFPRegs * sizeof(*cUnit->regPool->FPRegs), true); + oatNew(numFPRegs * sizeof(*cUnit->regPool->FPRegs), true, + kAllocRegAlloc); oatInitPool(pool->coreRegs, coreRegs, pool->numCoreRegs); oatInitPool(pool->FPRegs, fpRegs, pool->numFPRegs); // Keep special registers from being allocated @@ -959,7 +964,8 @@ void oatInitializeRegAlloc(CompilationUnit* cUnit) } // Construct the alias map. cUnit->phiAliasMap = (int*)oatNew(cUnit->numSSARegs * - sizeof(cUnit->phiAliasMap[0]), false); + sizeof(cUnit->phiAliasMap[0]), false, + kAllocDFInfo); for (int i = 0; i < cUnit->numSSARegs; i++) { cUnit->phiAliasMap[i] = i; } @@ -1810,7 +1816,7 @@ STATIC void genSuspendTest(CompilationUnit* cUnit, MIR* mir) ArmLIR* branch = opCondBranch(cUnit, kArmCondEq); ArmLIR* retLab = newLIR0(cUnit, kArmPseudoTargetLabel); retLab->defMask = ENCODE_ALL; - ArmLIR* target = (ArmLIR*)oatNew(sizeof(ArmLIR), true); + ArmLIR* target = (ArmLIR*)oatNew(sizeof(ArmLIR), true, kAllocLIR); target->generic.dalvikOffset = cUnit->currentDalvikOffset; target->opcode = kArmPseudoSuspendTarget; target->operands[0] = (intptr_t)retLab; |