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author buzbee <buzbee@google.com> 2011-08-28 12:56:51 -0700
committer buzbee <buzbee@google.com> 2011-08-28 13:10:06 -0700
commitdfd3d70e58c37b5d56eded3a4469082d8bb26ee0 (patch)
tree3e1a15f133e5e72710e71bc4989a74319ee60442 /src/compiler/codegen/arm/ArmRallocUtil.cc
parent9cc262e2ad5cb507c21cc83b8dc954e9354a469c (diff)
Enable virtual invokes, use new alloc, misc
Make use of the new alloc routines. Extended the filter to allow simple virtual invoke test to get through. Fixed a register allocation problem. Note that the invoke sequeces are still the verbose & long path. Will start using the new CodeandDirectMethods mechanism in upcoming CL Change-Id: I8ff79f6392ff3da14d7679dcf65029ae48f18eba
Diffstat (limited to 'src/compiler/codegen/arm/ArmRallocUtil.cc')
-rw-r--r--src/compiler/codegen/arm/ArmRallocUtil.cc16
1 files changed, 10 insertions, 6 deletions
diff --git a/src/compiler/codegen/arm/ArmRallocUtil.cc b/src/compiler/codegen/arm/ArmRallocUtil.cc
index 400fff6bb3..b2217d0de1 100644
--- a/src/compiler/codegen/arm/ArmRallocUtil.cc
+++ b/src/compiler/codegen/arm/ArmRallocUtil.cc
@@ -248,12 +248,12 @@ extern void oatDoPromotion(CompilationUnit* cUnit)
if (base->fpLocation == kLocPhysReg) {
if (curr->wide) {
/* TUNING: consider alignment during allocation */
- if (base->fpLowReg & 1) {
- // Pair must start on even reg - don't promote
- continue;
- }
- /* Make sure upper half is also in reg or skip */
- if (baseNext->fpLocation != kLocPhysReg) {
+ if ((base->fpLowReg & 1) ||
+ (baseNext->fpLocation != kLocPhysReg)) {
+ /* Half-promoted or bad alignment - demote */
+ curr->location = kLocDalvikFrame;
+ curr->lowReg = INVALID_REG;
+ curr->highReg = INVALID_REG;
continue;
}
curr->highReg = baseNext->fpLowReg;
@@ -268,6 +268,10 @@ extern void oatDoPromotion(CompilationUnit* cUnit)
if (curr->wide) {
/* Make sure upper half is also in reg or skip */
if (baseNext->location != kLocPhysReg) {
+ /* Only half promoted; demote to frame */
+ curr->location = kLocDalvikFrame;
+ curr->lowReg = INVALID_REG;
+ curr->highReg = INVALID_REG;
continue;
}
curr->highReg = baseNext->lowReg;