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author buzbee <buzbee@google.com> 2012-07-13 16:42:30 -0700
committer buzbee <buzbee@google.com> 2012-07-16 14:20:36 -0700
commit2a83e8f06031948741ae3dda3633433ddd669693 (patch)
tree8f189b330f9593746b6e4ab379bbf09b75e30020 /src/compiler/codegen/RallocUtil.cc
parent7c7679cd76e76b44c75a3e32a8727148d3ab9ada (diff)
Quick compiler, fix wide bug
In Dalvik, 64-bit data items are represented as a pair of 32-bit registers. The Art compiler maintained this notation, while llvm expects properly typed data. During the conversion to bitcode, we must drop the high word of pairs, while correctly typing the low. This CL fixes several bugs related to this. "Placeholder" llvm Values are created only for the low word of pairs, and we now skip Phi node generation for high words. Doing this required a bit of tightening up of the size & type inference code (which previously was able to get away with ignoring high words). Also, I've moved shift operations into intrinics because Dalvik and llvm have different ideas about what a shift means. Bitcode generation is only supported for the Arm target at the moment. With this CL, all target tests pass and the phone boots. Some caveats: o Performance data is not yet meaningful, either compile or run times. o When configured for Quick, we run single-threaded. o In a small percentage of methods, we generate invalid llvm bitcode (missing exception edges). As-checked-in, llvm function generation is turned off to avoid missing edge complaints (to enable testing of the Quick backend). Change-Id: I66932ffb44d299fcaf0a112e0d1c217c49341ccf
Diffstat (limited to 'src/compiler/codegen/RallocUtil.cc')
-rw-r--r--src/compiler/codegen/RallocUtil.cc2
1 files changed, 0 insertions, 2 deletions
diff --git a/src/compiler/codegen/RallocUtil.cc b/src/compiler/codegen/RallocUtil.cc
index 2088cdc360..9d1878a02b 100644
--- a/src/compiler/codegen/RallocUtil.cc
+++ b/src/compiler/codegen/RallocUtil.cc
@@ -998,14 +998,12 @@ extern RegLocation oatGetRawSrc(CompilationUnit* cUnit, MIR* mir, int num)
{
DCHECK(num < mir->ssaRep->numUses);
RegLocation res = cUnit->regLocation[mir->ssaRep->uses[num]];
- DCHECK(!res.wide || num < (mir->ssaRep->numUses - 1));
return res;
}
extern RegLocation oatGetRawDest(CompilationUnit* cUnit, MIR* mir)
{
DCHECK_GT(mir->ssaRep->numDefs, 0);
RegLocation res = cUnit->regLocation[mir->ssaRep->defs[0]];
- DCHECK(!res.wide || mir->ssaRep->numDefs == 2);
return res;
}
extern RegLocation oatGetDest(CompilationUnit* cUnit, MIR* mir)