Remove all TARGET_[ARM|X86|MIPS] #ifdefs

Two steps forward, one step back towards elimination of the
"#include" build model for target-specific compilers.  This CL
does some restructuring to eliminate all of the TARGET_xxx #ifdefs
and convert them to run-time tests.

Considerable work is still required to fully eliminate the multiple
builds.  In particular, much of the "common" codegen code relies on
macros defined by the target-specific [Arm|X86|Mips]Lir.h include file.

Next step is more restructuring to better isolate target-independent
code generation code.

Change-Id: If6efbde65c48031a48423344d8dc3e2ff2c4ad9d

1 files changed, 36 insertions, 0 deletions

diff --git a/src/compiler/codegen/CompilerCodegen.h b/src/compiler/codegen/CompilerCodegen.h
index 61ea6b6cef..d349412950 100644
--- a/src/compiler/codegen/CompilerCodegen.h
+++ b/src/compiler/codegen/CompilerCodegen.h
@@ -79,6 +79,42 @@ int oatTargetOptHint(int key);
 /* Implemented in codegen/<target>/<target_variant>/ArchVariant.c */
 void oatGenMemBarrier(CompilationUnit* cUnit, int barrierKind);
 
+LIR* genRegMemCheck(CompilationUnit* cUnit, ConditionCode cCode,
+                    int reg1, int base, int offset, ThrowKind kind);
+LIR* opThreadMem(CompilationUnit* cUnit, OpKind op, int threadOffset);
+LIR* opMem(CompilationUnit* cUnit, OpKind op, int rBase, int disp);
+LIR* storeBaseIndexedDisp(CompilationUnit *cUnit,
+                          int rBase, int rIndex, int scale, int displacement,
+                          int rSrc, int rSrcHi, OpSize size, int sReg);
+LIR* opRegMem(CompilationUnit *cUnit, OpKind op, int rDest, int rBase, int offset);
+LIR* opCmpBranch(CompilationUnit* cUnit, ConditionCode cond, int src1,
+                 int src2, LIR* target);
+void oatSetupRegMask(CompilationUnit* cUnit, u8* mask, int reg);
+u8 oatGetRegMaskCommon(CompilationUnit* cUnit, int reg);
+void setupTargetResourceMasks(CompilationUnit* cUnit, LIR* lir);
+RegLocation genDivRem(CompilationUnit* cUnit, RegLocation rlDest, int regLo, int regHi, bool isDiv);
+RegLocation genDivRemLit(CompilationUnit* cUnit, RegLocation rlDest, int regLo, int lit, bool isDiv);
+void markGCCard(CompilationUnit* cUnit, int valReg, int tgtAddrReg);
+bool genInlinedMinMaxInt(CompilationUnit *cUnit, CallInfo* info, bool isMin);
+void opLea(CompilationUnit* cUnit, int rBase, int reg1, int reg2, int scale, int offset);
+void opTlsCmp(CompilationUnit* cUnit, int offset, int val);
+bool genInlinedSqrt(CompilationUnit* cUnit, CallInfo* info);
+bool genInlinedCas32(CompilationUnit* cUnit, CallInfo* info, bool need_write_barrier);
+LIR* opPcRelLoad(CompilationUnit* cUnit, int reg, LIR* target);
+LIR* opVldm(CompilationUnit* cUnit, int rBase, int count);
+LIR* opVstm(CompilationUnit* cUnit, int rBase, int count);
+void genMultiplyByTwoBitMultiplier(CompilationUnit* cUnit, RegLocation rlSrc,
+                                   RegLocation rlResult, int lit,
+                                   int firstBit, int secondBit);
+RegLocation inlineTarget(CompilationUnit* cUnit, CallInfo* info);
+RegLocation inlineTargetWide(CompilationUnit* cUnit, CallInfo* info);
+void genDivZeroCheck(CompilationUnit* cUnit, int regLo, int regHi);
+LIR* genImmedCheck(CompilationUnit* cUnit, ConditionCode cCode,
+                   int reg, int immVal, ThrowKind kind);
+LIR* opTestSuspend(CompilationUnit* cUnit, LIR* target);
+LIR* opDecAndBranch(CompilationUnit* cUnit, ConditionCode cCode, int reg, LIR* target);
+LIR* opIT(CompilationUnit* cUnit, ArmConditionCode cond, const char* guide);
+
 }  // namespace art
 
 #endif  // ART_SRC_COMPILER_COMPILERCODEGEN_H_