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author Vladimir Marko <vmarko@google.com> 2020-02-12 10:52:22 +0000
committer Vladimir Marko <vmarko@google.com> 2020-02-14 12:01:58 +0000
commit41b605c5ad4b06ea127ac56c6e3a4c92e8913efd (patch)
treef7b28eb11051f3faada99c11dc594cccd34a5786 /runtime/stack.cc
parent30b38f8d01cdb4c80092638f23c61d73e0d287f4 (diff)
Remove MIPS support from runtime/.
Test: aosp_taimen-userdebug boots. Test: m test-art-host-gtest Test: testrunner.py --host --optimizing Bug: 147346243 Change-Id: If1fc8be94caa69f734438d7a1f4c715addfd8876
Diffstat (limited to 'runtime/stack.cc')
-rw-r--r--runtime/stack.cc8
1 files changed, 0 insertions, 8 deletions
diff --git a/runtime/stack.cc b/runtime/stack.cc
index 04590910fa..8916618f1a 100644
--- a/runtime/stack.cc
+++ b/runtime/stack.cc
@@ -370,14 +370,6 @@ bool StackVisitor::GetRegisterIfAccessible(uint32_t reg, VRegKind kind, uint32_t
reg = (kind == kDoubleHiVReg) ? (2 * reg + 1) : (2 * reg);
}
- // MIPS32 float registers are used as 64-bit (for MIPS32r2 it is pair
- // F(2n)-F(2n+1), and for MIPS32r6 it is 64-bit register F(2n)). When
- // accessing upper 32-bits from double, reg + 1 should be used.
- if ((kRuntimeISA == InstructionSet::kMips) && (kind == kDoubleHiVReg)) {
- DCHECK_ALIGNED(reg, 2);
- reg++;
- }
-
if (!IsAccessibleRegister(reg, is_float)) {
return false;
}