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| author | 2019-12-04 21:10:23 +0000 | |
|---|---|---|
| committer | 2021-02-04 06:16:33 +0000 | |
| commit | 8ba4de1a5684686447a578bdc425321fd3bccca6 (patch) | |
| tree | 20c24450b24950266ccc235306e3ad2109c57497 /runtime/javaheapprof/javaheapsampler.cc | |
| parent | 32bf6d39bc020cacfc655ce60630f4a0da3b45cf (diff) | |
ART: Implement predicated SIMD vectorization.
This CL brings support for predicated execution for
auto-vectorizer and implements arm64 SVE vector backend.
This version passes all the VIXL simulator-runnable tests in
SVE mode with checker off (as all VecOp CHECKs need to be
adjusted for an extra input) and all tests in NEON mode.
Test: art SIMD tests on VIXL simulator.
Test: art tests on FVP (steps in test/README.arm_fvp.md)
Change-Id: Ib78bde31a15e6713d875d6668ad4458f5519605f
Diffstat (limited to 'runtime/javaheapprof/javaheapsampler.cc')
0 files changed, 0 insertions, 0 deletions