riscv64: define instruction set features.

At the moment we assume the basic extension set G (IMAFD) plus the C
extension (compression). V extension (vector) is also defined, but not
assumed by default.

Test: lunch aosp_riscv64-userdebug && m dist

Co-authored-by: Ulya Trafimovich <skvadrik@google.com>
Change-Id: Ie3e7c1d5ad8e720d8bcab28a82fc602005efbb7f

1 files changed, 4 insertions, 0 deletions

diff --git a/runtime/arch/instruction_set_features.h b/runtime/arch/instruction_set_features.h
index cee8c5d42f..1f41b39023 100644
--- a/runtime/arch/instruction_set_features.h
+++ b/runtime/arch/instruction_set_features.h
@@ -28,6 +28,7 @@ namespace art {
 
 class ArmInstructionSetFeatures;
 class Arm64InstructionSetFeatures;
+class Riscv64InstructionSetFeatures;
 class X86InstructionSetFeatures;
 class X86_64InstructionSetFeatures;
 
@@ -121,6 +122,9 @@ class InstructionSetFeatures {
   // Down cast this Arm64InstructionFeatures.
   const Arm64InstructionSetFeatures* AsArm64InstructionSetFeatures() const;
 
+  // Down cast this Riscv64InstructionFeatures.
+  const Riscv64InstructionSetFeatures* AsRiscv64InstructionSetFeatures() const;
+
   // Down cast this X86InstructionFeatures.
   const X86InstructionSetFeatures* AsX86InstructionSetFeatures() const;