diff options
| author | 2023-07-20 13:12:29 +0000 | |
|---|---|---|
| committer | 2023-08-24 06:21:49 +0000 | |
| commit | d9fc1b683fd305d2d5369a5e605084e5f9c8040c (patch) | |
| tree | 7939842812c6c434cfd4e873c8c0e1c92a6078be /disassembler | |
| parent | c9986c6475bd62994826314057484380387e899e (diff) | |
riscv64: Enable Optimizing compiler for more instructions.
And fix a bad DCHECK() in disassembler that failed for some
checker tests.
Test: run-gtests.sh
# Ignore pre-existing timeout in `TestImageLayout`.
Test: testrunner.py --target --64 --ndebug --optimizing --jit
# Ignore flakes in 004-ThreadStress. Ignore pre-existing
# failures (57 for --optimizing, down from 68; 98 for
# --jit, down from 104).
Bug: 283082089
Change-Id: I9aef19a0791afa231111d45409e775b394bff847
Diffstat (limited to 'disassembler')
| -rw-r--r-- | disassembler/disassembler_riscv64.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/disassembler/disassembler_riscv64.cc b/disassembler/disassembler_riscv64.cc index 1dcf1a31cd..3592cfe4a2 100644 --- a/disassembler/disassembler_riscv64.cc +++ b/disassembler/disassembler_riscv64.cc @@ -532,7 +532,7 @@ void DisassemblerRiscv64::Printer::Print32Atomic(uint32_t insn32) { } void DisassemblerRiscv64::Printer::Print32FpOp(uint32_t insn32) { - DCHECK_EQ(insn32 & 0x7fu, 0x4fu); + DCHECK_EQ(insn32 & 0x7fu, 0x53u); uint32_t rd = GetRd(insn32); uint32_t rs1 = GetRs1(insn32); uint32_t rs2 = GetRs2(insn32); // Sometimes used to to differentiate opcodes. |