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| author | 2024-02-21 16:52:49 +0000 | |
|---|---|---|
| committer | 2024-02-24 07:26:43 +0000 | |
| commit | b9e18d2ed06e2868a9e36374a18affa1e46bada5 (patch) | |
| tree | 068893d77be2a720d695752d025af4a919b70fd2 /disassembler/disassembler_riscv64.cc | |
| parent | 501a89cd3e7a129652f8b38cb07af96212092ca7 (diff) | |
riscv64: Make "C" extension default for assembler tests.
Move responsibility for restricting the instruction set to
individual tests.
Test: m test-art-host-gtest
Bug: 283082089
Change-Id: I4a4f96df2d3b8fd1feae4b56cf13053b542ee732
Diffstat (limited to 'disassembler/disassembler_riscv64.cc')
| -rw-r--r-- | disassembler/disassembler_riscv64.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/disassembler/disassembler_riscv64.cc b/disassembler/disassembler_riscv64.cc index 41a6b3fb31..09e9faf7d7 100644 --- a/disassembler/disassembler_riscv64.cc +++ b/disassembler/disassembler_riscv64.cc @@ -163,7 +163,7 @@ class DisassemblerRiscv64::Printer { // Extracts the immediate from a compressed instruction // where `imm[5]` is in bit `[12]` and `imm[4:0]` is in bits `[6:2]` - // and performes sign-extension if required + // and performs sign-extension if required template <typename T> static T Decode16Imm6(uint32_t insn16) { DCHECK(IsUint<16>(insn16)); |