diff options
| author | 2023-08-16 09:05:02 +0000 | |
|---|---|---|
| committer | 2023-08-16 10:21:23 +0000 | |
| commit | 0296de460da0ba2009ab7620a4a1347b99488d81 (patch) | |
| tree | dfb1cfb37c4618567174550c99109d0a852229f5 /disassembler/disassembler_riscv64.cc | |
| parent | c64421f323f548bd8bab07dd1ac922b1840f8842 (diff) | |
riscv64: Fix disassembly of SRAI/SRAIW.
Test: m dump-oat # Manually inspect the output.
Bug: 283082089
Change-Id: Iab0330771f354e011f4fe0eb6b4373a6f613d4b0
Diffstat (limited to 'disassembler/disassembler_riscv64.cc')
| -rw-r--r-- | disassembler/disassembler_riscv64.cc | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/disassembler/disassembler_riscv64.cc b/disassembler/disassembler_riscv64.cc index 18ca5bece3..cdb0390ce0 100644 --- a/disassembler/disassembler_riscv64.cc +++ b/disassembler/disassembler_riscv64.cc @@ -396,12 +396,12 @@ void DisassemblerRiscv64::Printer::Print32BinOpImm(uint32_t insn32) { } else { bool bad_high_bits = false; if (funct3 == /*SLLI*/ 1u || funct3 == /*SRLI/SRAI*/ 5u) { + imm &= (narrow ? 0x1fu : 0x3fu); uint32_t high_bits = insn32 & (narrow ? 0xfe000000u : 0xfc000000u); if (high_bits == 0x40000000u && funct3 == /*SRAI*/ 5u) { os_ << "srai"; } else { os_ << ((funct3 == /*SRLI*/ 5u) ? "srli" : "slli"); - imm &= (narrow ? 0x1fu : 0x3fu); bad_high_bits = (high_bits != 0u); } } else if (!narrow || funct3 == /*ADDI*/ 0u) { |