Fix gtest failures due to userfaultfd GC

Mostly involved replacing compile-test check for read-barrier with
runtime one.

Bug: 160737021
Test: art/test/testrunner/run_build_test_target.py -j <core-count> art-test
Change-Id: I685e4b717d314a19f7714ece5c8b84f23154cc66

2 files changed, 29 insertions, 9 deletions

diff --git a/compiler/jni/jni_cfi_test.cc b/compiler/jni/jni_cfi_test.cc
index 9e3bb86fb1..368b87c9cd 100644
--- a/compiler/jni/jni_cfi_test.cc
+++ b/compiler/jni/jni_cfi_test.cc
@@ -124,22 +124,31 @@ class JNICFITest : public CFITest {
     TestImpl(InstructionSet::isa, #isa, expected_asm, expected_cfi);  \
   }
 
+// We can't use compile-time macros for read-barrier as the introduction
+// of userfaultfd-GC has made it a runtime choice.
+#define TEST_ISA_ONLY_CC(isa)                                           \
+  TEST_F(JNICFITest, isa) {                                             \
+    if (kUseBakerReadBarrier && gUseReadBarrier) {                      \
+      std::vector<uint8_t> expected_asm(expected_asm_##isa,             \
+          expected_asm_##isa + arraysize(expected_asm_##isa));          \
+      std::vector<uint8_t> expected_cfi(expected_cfi_##isa,             \
+          expected_cfi_##isa + arraysize(expected_cfi_##isa));          \
+      TestImpl(InstructionSet::isa, #isa, expected_asm, expected_cfi);  \
+    }                                                                   \
+  }
+
 #ifdef ART_ENABLE_CODEGEN_arm
 // Run the tests for ARM only with Baker read barriers, as the
 // expected generated code contains a Marking Register refresh
 // instruction.
-#if defined(USE_READ_BARRIER) && defined(USE_BAKER_READ_BARRIER)
-TEST_ISA(kThumb2)
-#endif
+TEST_ISA_ONLY_CC(kThumb2)
 #endif
 
 #ifdef ART_ENABLE_CODEGEN_arm64
 // Run the tests for ARM64 only with Baker read barriers, as the
 // expected generated code contains a Marking Register refresh
 // instruction.
-#if defined(USE_READ_BARRIER) && defined(USE_BAKER_READ_BARRIER)
-TEST_ISA(kArm64)
-#endif
+TEST_ISA_ONLY_CC(kArm64)
 #endif
 
 #ifdef ART_ENABLE_CODEGEN_x86
diff --git a/compiler/optimizing/optimizing_cfi_test.cc b/compiler/optimizing/optimizing_cfi_test.cc
index bad540e03c..73e1fbea55 100644
--- a/compiler/optimizing/optimizing_cfi_test.cc
+++ b/compiler/optimizing/optimizing_cfi_test.cc
@@ -167,9 +167,20 @@ TEST_ISA(kThumb2)
 // barrier configuration, and as such is removed from the set of
 // callee-save registers in the ARM64 code generator of the Optimizing
 // compiler.
-#if defined(USE_READ_BARRIER) && defined(USE_BAKER_READ_BARRIER)
-TEST_ISA(kArm64)
-#endif
+//
+// We can't use compile-time macros for read-barrier as the introduction
+// of userfaultfd-GC has made it a runtime choice.
+TEST_F(OptimizingCFITest, kArm64) {
+  if (kUseBakerReadBarrier && gUseReadBarrier) {
+    std::vector<uint8_t> expected_asm(
+        expected_asm_kArm64,
+        expected_asm_kArm64 + arraysize(expected_asm_kArm64));
+    std::vector<uint8_t> expected_cfi(
+        expected_cfi_kArm64,
+        expected_cfi_kArm64 + arraysize(expected_cfi_kArm64));
+    TestImpl(InstructionSet::kArm64, "kArm64", expected_asm, expected_cfi);
+  }
+}
 #endif
 
 #ifdef ART_ENABLE_CODEGEN_x86