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| author | 2017-04-19 13:23:28 +0000 | |
|---|---|---|
| committer | 2017-04-19 13:23:28 +0000 | |
| commit | 275ece38c1feb61eb1d964d22f783936ea42f374 (patch) | |
| tree | 90f3a61d8699cf9521c214a934b2f0363258acab /compiler | |
| parent | 7ff1ef220ca6da0865e047efdec94b57b8f99303 (diff) | |
| parent | 246d2917753a099de25004935a1d225f948ac18b (diff) | |
Merge "Fix ARM64 SystemArrayCopy intrinsic with large constant dest position." into oc-dev
Diffstat (limited to 'compiler')
| -rw-r--r-- | compiler/optimizing/intrinsics_arm64.cc | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/compiler/optimizing/intrinsics_arm64.cc b/compiler/optimizing/intrinsics_arm64.cc index 423fd3c6ae..8485c32e39 100644 --- a/compiler/optimizing/intrinsics_arm64.cc +++ b/compiler/optimizing/intrinsics_arm64.cc @@ -2755,9 +2755,17 @@ void IntrinsicCodeGeneratorARM64::VisitSystemArrayCopy(HInvoke* invoke) { // Make sure `tmp` is not IP0, as it is clobbered by // ReadBarrierMarkRegX entry points in // ReadBarrierSystemArrayCopySlowPathARM64. + DCHECK(temps.IsAvailable(ip0)); temps.Exclude(ip0); Register tmp = temps.AcquireW(); DCHECK_NE(LocationFrom(tmp).reg(), IP0); + // Put IP0 back in the pool so that VIXL has at least one + // scratch register available to emit macro-instructions (note + // that IP1 is already used for `tmp`). Indeed some + // macro-instructions used in GenSystemArrayCopyAddresses + // (invoked hereunder) may require a scratch register (for + // instance to emit a load with a large constant offset). + temps.Include(ip0); // /* int32_t */ monitor = src->monitor_ __ Ldr(tmp, HeapOperand(src.W(), monitor_offset)); |