diff options
| author | 2024-03-21 14:50:33 +0300 | |
|---|---|---|
| committer | 2024-03-21 14:06:10 +0000 | |
| commit | bbace920baad1fffaefb17cadb1131acec622bd2 (patch) | |
| tree | 28aa3744d4d76b61118e7941f27b7bfbd98f26a5 /compiler/utils | |
| parent | 1e78696010ab61314b29802e1772c3bba8ad9b00 (diff) | |
riscv64: Add missed CHECK in CAddi16Sp instr
Add missed assertion check about immediate operand
Test: None
Bug: 328561342
Change-Id: Iaa75c77690549f6d7bff313fccb8e907b526cfa2
Diffstat (limited to 'compiler/utils')
| -rw-r--r-- | compiler/utils/riscv64/assembler_riscv64.cc | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/compiler/utils/riscv64/assembler_riscv64.cc b/compiler/utils/riscv64/assembler_riscv64.cc index 09778add1e..37c2f17eca 100644 --- a/compiler/utils/riscv64/assembler_riscv64.cc +++ b/compiler/utils/riscv64/assembler_riscv64.cc @@ -997,6 +997,7 @@ void Riscv64Assembler::CAddi16Sp(int32_t nzimm) { AssertExtensionsEnabled(Riscv64Extension::kZca); DCHECK_NE(nzimm, 0); DCHECK(IsAligned<16>(nzimm)); + DCHECK(IsInt<10>(nzimm)); uint32_t unzimm = static_cast<uint32_t>(nzimm); |