diff options
| author | 2014-11-12 17:53:18 +0000 | |
|---|---|---|
| committer | 2014-11-12 17:53:18 +0000 | |
| commit | 0eaf65edf1b2af63a3eeb77ee1864d84d3154d1e (patch) | |
| tree | 08d8c10c3300ae333115e35541a6664bf264b069 /compiler/utils | |
| parent | cbed7b6e3d41eac2f0abd06cde3fec870addd690 (diff) | |
| parent | 9574c4b5f5ef039d694ac12c97e25ca02eca83c0 (diff) | |
Merge "Implement and/or/xor in optimizing."
Diffstat (limited to 'compiler/utils')
| -rw-r--r-- | compiler/utils/x86/assembler_x86.cc | 23 | ||||
| -rw-r--r-- | compiler/utils/x86/assembler_x86.h | 3 | ||||
| -rw-r--r-- | compiler/utils/x86_64/assembler_x86_64.cc | 47 | ||||
| -rw-r--r-- | compiler/utils/x86_64/assembler_x86_64.h | 6 |
4 files changed, 79 insertions, 0 deletions
diff --git a/compiler/utils/x86/assembler_x86.cc b/compiler/utils/x86/assembler_x86.cc index 4ddf9793fd..8ebb40e338 100644 --- a/compiler/utils/x86/assembler_x86.cc +++ b/compiler/utils/x86/assembler_x86.cc @@ -873,6 +873,13 @@ void X86Assembler::andl(Register dst, Register src) { } +void X86Assembler::andl(Register reg, const Address& address) { + AssemblerBuffer::EnsureCapacity ensured(&buffer_); + EmitUint8(0x23); + EmitOperand(reg, address); +} + + void X86Assembler::andl(Register dst, const Immediate& imm) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); EmitComplex(4, Operand(dst), imm); @@ -886,6 +893,13 @@ void X86Assembler::orl(Register dst, Register src) { } +void X86Assembler::orl(Register reg, const Address& address) { + AssemblerBuffer::EnsureCapacity ensured(&buffer_); + EmitUint8(0x0B); + EmitOperand(reg, address); +} + + void X86Assembler::orl(Register dst, const Immediate& imm) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); EmitComplex(1, Operand(dst), imm); @@ -898,11 +912,20 @@ void X86Assembler::xorl(Register dst, Register src) { EmitOperand(dst, Operand(src)); } + +void X86Assembler::xorl(Register reg, const Address& address) { + AssemblerBuffer::EnsureCapacity ensured(&buffer_); + EmitUint8(0x33); + EmitOperand(reg, address); +} + + void X86Assembler::xorl(Register dst, const Immediate& imm) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); EmitComplex(6, Operand(dst), imm); } + void X86Assembler::addl(Register reg, const Immediate& imm) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); EmitComplex(0, Operand(reg), imm); diff --git a/compiler/utils/x86/assembler_x86.h b/compiler/utils/x86/assembler_x86.h index de4e6de878..8aed9348d6 100644 --- a/compiler/utils/x86/assembler_x86.h +++ b/compiler/utils/x86/assembler_x86.h @@ -350,12 +350,15 @@ class X86Assembler FINAL : public Assembler { void andl(Register dst, const Immediate& imm); void andl(Register dst, Register src); + void andl(Register dst, const Address& address); void orl(Register dst, const Immediate& imm); void orl(Register dst, Register src); + void orl(Register dst, const Address& address); void xorl(Register dst, Register src); void xorl(Register dst, const Immediate& imm); + void xorl(Register dst, const Address& address); void addl(Register dst, Register src); void addl(Register reg, const Immediate& imm); diff --git a/compiler/utils/x86_64/assembler_x86_64.cc b/compiler/utils/x86_64/assembler_x86_64.cc index c75fa786e8..5d1c9af202 100644 --- a/compiler/utils/x86_64/assembler_x86_64.cc +++ b/compiler/utils/x86_64/assembler_x86_64.cc @@ -1014,6 +1014,14 @@ void X86_64Assembler::andl(CpuRegister dst, CpuRegister src) { } +void X86_64Assembler::andl(CpuRegister reg, const Address& address) { + AssemblerBuffer::EnsureCapacity ensured(&buffer_); + EmitOptionalRex32(reg, address); + EmitUint8(0x23); + EmitOperand(reg.LowBits(), address); +} + + void X86_64Assembler::andl(CpuRegister dst, const Immediate& imm) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); EmitOptionalRex32(dst); @@ -1029,6 +1037,14 @@ void X86_64Assembler::andq(CpuRegister reg, const Immediate& imm) { } +void X86_64Assembler::andq(CpuRegister dst, CpuRegister src) { + AssemblerBuffer::EnsureCapacity ensured(&buffer_); + EmitRex64(dst, src); + EmitUint8(0x23); + EmitOperand(dst.LowBits(), Operand(src)); +} + + void X86_64Assembler::orl(CpuRegister dst, CpuRegister src) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); EmitOptionalRex32(dst, src); @@ -1037,6 +1053,14 @@ void X86_64Assembler::orl(CpuRegister dst, CpuRegister src) { } +void X86_64Assembler::orl(CpuRegister reg, const Address& address) { + AssemblerBuffer::EnsureCapacity ensured(&buffer_); + EmitOptionalRex32(reg, address); + EmitUint8(0x0B); + EmitOperand(reg.LowBits(), address); +} + + void X86_64Assembler::orl(CpuRegister dst, const Immediate& imm) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); EmitOptionalRex32(dst); @@ -1044,6 +1068,14 @@ void X86_64Assembler::orl(CpuRegister dst, const Immediate& imm) { } +void X86_64Assembler::orq(CpuRegister dst, CpuRegister src) { + AssemblerBuffer::EnsureCapacity ensured(&buffer_); + EmitRex64(dst, src); + EmitUint8(0x0B); + EmitOperand(dst.LowBits(), Operand(src)); +} + + void X86_64Assembler::xorl(CpuRegister dst, CpuRegister src) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); EmitOptionalRex32(dst, src); @@ -1052,6 +1084,21 @@ void X86_64Assembler::xorl(CpuRegister dst, CpuRegister src) { } +void X86_64Assembler::xorl(CpuRegister reg, const Address& address) { + AssemblerBuffer::EnsureCapacity ensured(&buffer_); + EmitOptionalRex32(reg, address); + EmitUint8(0x33); + EmitOperand(reg.LowBits(), address); +} + + +void X86_64Assembler::xorl(CpuRegister dst, const Immediate& imm) { + AssemblerBuffer::EnsureCapacity ensured(&buffer_); + EmitOptionalRex32(dst); + EmitComplex(6, Operand(dst), imm); +} + + void X86_64Assembler::xorq(CpuRegister dst, CpuRegister src) { AssemblerBuffer::EnsureCapacity ensured(&buffer_); EmitRex64(dst, src); diff --git a/compiler/utils/x86_64/assembler_x86_64.h b/compiler/utils/x86_64/assembler_x86_64.h index 42d774a558..285b4cfc43 100644 --- a/compiler/utils/x86_64/assembler_x86_64.h +++ b/compiler/utils/x86_64/assembler_x86_64.h @@ -398,12 +398,18 @@ class X86_64Assembler FINAL : public Assembler { void andl(CpuRegister dst, const Immediate& imm); void andl(CpuRegister dst, CpuRegister src); + void andl(CpuRegister reg, const Address& address); void andq(CpuRegister dst, const Immediate& imm); + void andq(CpuRegister dst, CpuRegister src); void orl(CpuRegister dst, const Immediate& imm); void orl(CpuRegister dst, CpuRegister src); + void orl(CpuRegister reg, const Address& address); + void orq(CpuRegister dst, CpuRegister src); void xorl(CpuRegister dst, CpuRegister src); + void xorl(CpuRegister dst, const Immediate& imm); + void xorl(CpuRegister reg, const Address& address); void xorq(CpuRegister dst, const Immediate& imm); void xorq(CpuRegister dst, CpuRegister src); |