diff options
| author | 2023-06-13 15:22:35 +0100 | |
|---|---|---|
| committer | 2023-06-14 09:51:16 +0000 | |
| commit | 02ca77109a7ca43b821dcdcc50b73a6d9b7d9df5 (patch) | |
| tree | f1603845df9f654a315436725974ec3203a5378f /compiler/utils | |
| parent | 3332372b835acb7a3f2d338f0a97f0a52456904d (diff) | |
riscv64: add UNIMP instruction to the assembler.
This is useful for debugging purposes or as a guard for unimplemented
code.
Test: m test-art-host-gtest
Bug: 283082089
Change-Id: I6d95402cce8c1904f9801957bccb9e4ca74caee8
Diffstat (limited to 'compiler/utils')
| -rw-r--r-- | compiler/utils/riscv64/assembler_riscv64.cc | 5 | ||||
| -rw-r--r-- | compiler/utils/riscv64/assembler_riscv64.h | 3 | ||||
| -rw-r--r-- | compiler/utils/riscv64/assembler_riscv64_test.cc | 5 |
3 files changed, 13 insertions, 0 deletions
diff --git a/compiler/utils/riscv64/assembler_riscv64.cc b/compiler/utils/riscv64/assembler_riscv64.cc index 98d24894b4..8cf33fc3fc 100644 --- a/compiler/utils/riscv64/assembler_riscv64.cc +++ b/compiler/utils/riscv64/assembler_riscv64.cc @@ -1183,6 +1183,11 @@ void Riscv64Assembler::FLoadd(FRegister rd, Literal* literal) { LoadLiteral(literal, rd, Branch::kLiteralDouble); } +void Riscv64Assembler::Unimp() { + // TODO(riscv64): use 16-bit zero C.UNIMP once we support compression + Emit(0xC0001073); +} + /////////////////////////////// RV64 MACRO Instructions END /////////////////////////////// const Riscv64Assembler::Branch::BranchInfo Riscv64Assembler::Branch::branch_info_[] = { diff --git a/compiler/utils/riscv64/assembler_riscv64.h b/compiler/utils/riscv64/assembler_riscv64.h index 09bbef0b6d..d94433f184 100644 --- a/compiler/utils/riscv64/assembler_riscv64.h +++ b/compiler/utils/riscv64/assembler_riscv64.h @@ -559,6 +559,9 @@ class Riscv64Assembler final : public Assembler { void FLoadw(FRegister rd, Literal* literal); void FLoadd(FRegister rd, Literal* literal); + // Illegal instruction that triggers SIGILL. + void Unimp(); + /////////////////////////////// RV64 MACRO Instructions END /////////////////////////////// void Bind(Label* label) override { Bind(down_cast<Riscv64Label*>(label)); } diff --git a/compiler/utils/riscv64/assembler_riscv64_test.cc b/compiler/utils/riscv64/assembler_riscv64_test.cc index b48b168947..31f72aef71 100644 --- a/compiler/utils/riscv64/assembler_riscv64_test.cc +++ b/compiler/utils/riscv64/assembler_riscv64_test.cc @@ -2328,6 +2328,11 @@ TEST_F(AssemblerRISCV64Test, FStored) { TestFPLoadStoreArbitraryOffset("FStored", "fsd", &Riscv64Assembler::FStored); } +TEST_F(AssemblerRISCV64Test, Unimp) { + __ Unimp(); + DriverStr("unimp\n", "Unimp"); +} + TEST_F(AssemblerRISCV64Test, LoadLabelAddress) { std::string expected; constexpr size_t kNumLoadsForward = 4 * KB; |