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author Roland Levillain <rpl@google.com> 2015-08-17 10:06:07 +0000
committer Gerrit Code Review <noreply-gerritcodereview@google.com> 2015-08-17 10:06:07 +0000
commit6103d9624f0d2f3e4a486d9f1b188fddf26c8e7c (patch)
tree1df8580a9a4086a28bf4186564832fcf11ae19bd /compiler/utils/x86/assembler_x86.cc
parent9d0f8210973aa0d823df3274f63b86116f2c58a8 (diff)
parent8ae3ffb29489a127f2a6242c33845dac8d50e508 (diff)
Merge "Add 'bsr' instruction to x86 and x86_64"
Diffstat (limited to 'compiler/utils/x86/assembler_x86.cc')
-rw-r--r--compiler/utils/x86/assembler_x86.cc14
1 files changed, 14 insertions, 0 deletions
diff --git a/compiler/utils/x86/assembler_x86.cc b/compiler/utils/x86/assembler_x86.cc
index 914bd56683..9b3d792903 100644
--- a/compiler/utils/x86/assembler_x86.cc
+++ b/compiler/utils/x86/assembler_x86.cc
@@ -158,6 +158,20 @@ void X86Assembler::bswapl(Register dst) {
EmitUint8(0xC8 + dst);
}
+void X86Assembler::bsrl(Register dst, Register src) {
+ AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+ EmitUint8(0x0F);
+ EmitUint8(0xBD);
+ EmitRegisterOperand(dst, src);
+}
+
+void X86Assembler::bsrl(Register dst, const Address& src) {
+ AssemblerBuffer::EnsureCapacity ensured(&buffer_);
+ EmitUint8(0x0F);
+ EmitUint8(0xBD);
+ EmitOperand(dst, src);
+}
+
void X86Assembler::movzxb(Register dst, ByteRegister src) {
AssemblerBuffer::EnsureCapacity ensured(&buffer_);
EmitUint8(0x0F);