diff options
| author | 2015-06-24 16:30:21 +0200 | |
|---|---|---|
| committer | 2015-06-24 16:34:07 +0200 | |
| commit | f652d605753f1387e7797461b47116c5dcdf928d (patch) | |
| tree | a513109ea9fcbc390125b03d07e8d45500a31503 /compiler/utils/mips64/assembler_mips64.cc | |
| parent | bb3dabaf804e0d0bd2bf34e69091b2f86fd4e78b (diff) | |
[MIPS64] JNI Compiler: Sign-extend int function arguments
MIPS n64 ABI differs from arm64. Arguments smaller than the 8B stack
slot need to be sign-extended.
Use combination (lw,sd), instead of (lw,sw) for 4B values.
Change fixes software keyboard crash on mips64.
Change-Id: I7574d37f6039e9e8c9e0047254be71d28d4c829a
Diffstat (limited to 'compiler/utils/mips64/assembler_mips64.cc')
| -rw-r--r-- | compiler/utils/mips64/assembler_mips64.cc | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/compiler/utils/mips64/assembler_mips64.cc b/compiler/utils/mips64/assembler_mips64.cc index a192d2fdb6..3333cd22bd 100644 --- a/compiler/utils/mips64/assembler_mips64.cc +++ b/compiler/utils/mips64/assembler_mips64.cc @@ -1334,7 +1334,7 @@ void Mips64Assembler::Copy(FrameOffset dest, FrameOffset src, CHECK(size == 4 || size == 8) << size; if (size == 4) { LoadFromOffset(kLoadWord, scratch.AsGpuRegister(), SP, src.Int32Value()); - StoreToOffset(kStoreWord, scratch.AsGpuRegister(), SP, dest.Int32Value()); + StoreToOffset(kStoreDoubleword, scratch.AsGpuRegister(), SP, dest.Int32Value()); } else if (size == 8) { LoadFromOffset(kLoadDoubleword, scratch.AsGpuRegister(), SP, src.Int32Value()); StoreToOffset(kStoreDoubleword, scratch.AsGpuRegister(), SP, dest.Int32Value()); @@ -1350,7 +1350,7 @@ void Mips64Assembler::Copy(FrameOffset dest, ManagedRegister src_base, Offset sr if (size == 4) { LoadFromOffset(kLoadWord, scratch, src_base.AsMips64().AsGpuRegister(), src_offset.Int32Value()); - StoreToOffset(kStoreWord, scratch, SP, dest.Int32Value()); + StoreToOffset(kStoreDoubleword, scratch, SP, dest.Int32Value()); } else if (size == 8) { LoadFromOffset(kLoadDoubleword, scratch, src_base.AsMips64().AsGpuRegister(), src_offset.Int32Value()); @@ -1366,7 +1366,7 @@ void Mips64Assembler::Copy(ManagedRegister dest_base, Offset dest_offset, FrameO CHECK(size == 4 || size == 8) << size; if (size == 4) { LoadFromOffset(kLoadWord, scratch, SP, src.Int32Value()); - StoreToOffset(kStoreWord, scratch, dest_base.AsMips64().AsGpuRegister(), + StoreToOffset(kStoreDoubleword, scratch, dest_base.AsMips64().AsGpuRegister(), dest_offset.Int32Value()); } else if (size == 8) { LoadFromOffset(kLoadDoubleword, scratch, SP, src.Int32Value()); @@ -1389,7 +1389,7 @@ void Mips64Assembler::Copy(ManagedRegister dest, Offset dest_offset, CHECK(size == 4 || size == 8) << size; if (size == 4) { LoadFromOffset(kLoadWord, scratch, src.AsMips64().AsGpuRegister(), src_offset.Int32Value()); - StoreToOffset(kStoreWord, scratch, dest.AsMips64().AsGpuRegister(), dest_offset.Int32Value()); + StoreToOffset(kStoreDoubleword, scratch, dest.AsMips64().AsGpuRegister(), dest_offset.Int32Value()); } else if (size == 8) { LoadFromOffset(kLoadDoubleword, scratch, src.AsMips64().AsGpuRegister(), src_offset.Int32Value()); |