diff options
author | 2016-06-07 23:40:37 -0700 | |
---|---|---|
committer | 2016-06-10 14:51:25 -0700 | |
commit | cad3a4c890a5df1dfd294b74384ca3c27888cd0a (patch) | |
tree | 141ab495cdd7e15e3c7c24979544820b122a325c /compiler/utils/mips/assembler_mips.h | |
parent | d27fd40d5353141660c033156492efd639c4d048 (diff) |
MIPS32: Improve offset calculations in loads and stores
Change-Id: I6c3773e8bc1233bcda83d5b7254438ef69e9570d
Diffstat (limited to 'compiler/utils/mips/assembler_mips.h')
-rw-r--r-- | compiler/utils/mips/assembler_mips.h | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/compiler/utils/mips/assembler_mips.h b/compiler/utils/mips/assembler_mips.h index ecb67bd053..68fa6bf918 100644 --- a/compiler/utils/mips/assembler_mips.h +++ b/compiler/utils/mips/assembler_mips.h @@ -183,6 +183,7 @@ class MipsAssembler FINAL : public Assembler { void Lbu(Register rt, Register rs, uint16_t imm16); void Lhu(Register rt, Register rs, uint16_t imm16); void Lui(Register rt, uint16_t imm16); + void Aui(Register rt, Register rs, uint16_t imm16); // R6 void Sync(uint32_t stype); void Mfhi(Register rd); // R2 void Mflo(Register rd); // R2 @@ -385,6 +386,10 @@ class MipsAssembler FINAL : public Assembler { void Bc1nez(FRegister ft, MipsLabel* label); // R6 void EmitLoad(ManagedRegister m_dst, Register src_register, int32_t src_offset, size_t size); + void AdjustBaseAndOffset(Register& base, + int32_t& offset, + bool is_doubleword, + bool is_float = false); void LoadFromOffset(LoadOperandType type, Register reg, Register base, int32_t offset); void LoadSFromOffset(FRegister reg, Register base, int32_t offset); void LoadDFromOffset(FRegister reg, Register base, int32_t offset); |