diff options
author | 2018-12-26 15:12:03 -0800 | |
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committer | 2018-12-27 12:56:39 -0800 | |
commit | 3db70689e3e1c92344d436a8ea4265046bdef449 (patch) | |
tree | 3db08743e968062ed5bdc143233cdb3c4564696b /compiler/utils/mips/assembler_mips.h | |
parent | 1650dafad62578a1766bd617d78458a4cf1e2a9a (diff) |
ART: Refactor for bugprone-argument-comment
Handles compiler.
Bug: 116054210
Test: WITH_TIDY=1 mmma art
Change-Id: I5cdfe73c31ac39144838a2736146b71de037425e
Diffstat (limited to 'compiler/utils/mips/assembler_mips.h')
-rw-r--r-- | compiler/utils/mips/assembler_mips.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/compiler/utils/mips/assembler_mips.h b/compiler/utils/mips/assembler_mips.h index 8a1e1df777..69189a49aa 100644 --- a/compiler/utils/mips/assembler_mips.h +++ b/compiler/utils/mips/assembler_mips.h @@ -862,7 +862,7 @@ class MipsAssembler final : public Assembler, public JNIMacroAssembler<PointerSi // We permit `base` and `temp` to coincide (however, we check that neither is AT), // in which case the `base` register may be overwritten in the process. CHECK_NE(temp, AT); // Must not use AT as temp, so as not to overwrite the adjusted base. - AdjustBaseAndOffset(base, offset, /* is_doubleword */ (type == kStoreDoubleword)); + AdjustBaseAndOffset(base, offset, /* is_doubleword= */ (type == kStoreDoubleword)); uint32_t low = Low32Bits(value); uint32_t high = High32Bits(value); Register reg; @@ -917,7 +917,7 @@ class MipsAssembler final : public Assembler, public JNIMacroAssembler<PointerSi Register base, int32_t offset, ImplicitNullChecker null_checker = NoImplicitNullChecker()) { - AdjustBaseAndOffset(base, offset, /* is_doubleword */ (type == kLoadDoubleword)); + AdjustBaseAndOffset(base, offset, /* is_doubleword= */ (type == kLoadDoubleword)); switch (type) { case kLoadSignedByte: Lb(reg, base, offset); @@ -960,7 +960,7 @@ class MipsAssembler final : public Assembler, public JNIMacroAssembler<PointerSi Register base, int32_t offset, ImplicitNullChecker null_checker = NoImplicitNullChecker()) { - AdjustBaseAndOffset(base, offset, /* is_doubleword */ false, /* is_float */ true); + AdjustBaseAndOffset(base, offset, /* is_doubleword= */ false, /* is_float= */ true); Lwc1(reg, base, offset); null_checker(); } @@ -970,7 +970,7 @@ class MipsAssembler final : public Assembler, public JNIMacroAssembler<PointerSi Register base, int32_t offset, ImplicitNullChecker null_checker = NoImplicitNullChecker()) { - AdjustBaseAndOffset(base, offset, /* is_doubleword */ true, /* is_float */ true); + AdjustBaseAndOffset(base, offset, /* is_doubleword= */ true, /* is_float= */ true); if (IsAligned<kMipsDoublewordSize>(offset)) { Ldc1(reg, base, offset); null_checker(); @@ -1016,7 +1016,7 @@ class MipsAssembler final : public Assembler, public JNIMacroAssembler<PointerSi // Must not use AT as `reg`, so as not to overwrite the value being stored // with the adjusted `base`. CHECK_NE(reg, AT); - AdjustBaseAndOffset(base, offset, /* is_doubleword */ (type == kStoreDoubleword)); + AdjustBaseAndOffset(base, offset, /* is_doubleword= */ (type == kStoreDoubleword)); switch (type) { case kStoreByte: Sb(reg, base, offset); @@ -1047,7 +1047,7 @@ class MipsAssembler final : public Assembler, public JNIMacroAssembler<PointerSi Register base, int32_t offset, ImplicitNullChecker null_checker = NoImplicitNullChecker()) { - AdjustBaseAndOffset(base, offset, /* is_doubleword */ false, /* is_float */ true); + AdjustBaseAndOffset(base, offset, /* is_doubleword= */ false, /* is_float= */ true); Swc1(reg, base, offset); null_checker(); } @@ -1057,7 +1057,7 @@ class MipsAssembler final : public Assembler, public JNIMacroAssembler<PointerSi Register base, int32_t offset, ImplicitNullChecker null_checker = NoImplicitNullChecker()) { - AdjustBaseAndOffset(base, offset, /* is_doubleword */ true, /* is_float */ true); + AdjustBaseAndOffset(base, offset, /* is_doubleword= */ true, /* is_float= */ true); if (IsAligned<kMipsDoublewordSize>(offset)) { Sdc1(reg, base, offset); null_checker(); |