MIPS32: java.lang.*.reverse

- int java.lang.Integer.reverse(int)
- long java.lang.Long.reverse(long)

Change-Id: I18d0f784b9e4bffdc1bda3604f4ed7d3c57b8d68

1 files changed, 5 insertions, 0 deletions

diff --git a/compiler/utils/mips/assembler_mips.cc b/compiler/utils/mips/assembler_mips.cc
index fc7ac7061a..86e5762f9c 100644
--- a/compiler/utils/mips/assembler_mips.cc
+++ b/compiler/utils/mips/assembler_mips.cc
@@ -314,6 +314,11 @@ void MipsAssembler::Wsbh(Register rd, Register rt) {
   EmitR(0x1f, static_cast<Register>(0), rt, rd, 2, 0x20);
 }
 
+void MipsAssembler::Bitswap(Register rd, Register rt) {
+  CHECK(IsR6());
+  EmitR(0x1f, static_cast<Register>(0), rt, rd, 0x0, 0x20);
+}
+
 void MipsAssembler::Sll(Register rd, Register rt, int shamt) {
   CHECK(IsUint<5>(shamt)) << shamt;
   EmitR(0, static_cast<Register>(0), rt, rd, shamt, 0x00);