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| author | 2017-06-06 16:09:59 +0100 | |
|---|---|---|
| committer | 2017-08-10 18:17:47 +0100 | |
| commit | 2b03a1f24600c8c9558fb13d3f8bca1ef0f8ee40 (patch) | |
| tree | 4d5fb728acd7f98f8949c84364375a804ff0ba63 /compiler/utils/mips/assembler_mips.cc | |
| parent | 461ec567f16039374dff35e2f3b808986c100249 (diff) | |
Instrument ARM64 generated code to check the Marking Register.
Generate run-time code in the Optimizing compiler checking that
the Marking Register's value matches `self.tls32_.is.gc_marking`
in debug mode (on target; and on host with JIT, or with AOT when
compiling the core image). If a check fails, abort.
Test: m test-art-target
Test: m test-art-target with tree built with ART_USE_READ_BARRIER=false
Test: ARM64 device boot test with libartd.
Bug: 37707231
Change-Id: Ie9b322b22b3d26654a06821e1db71dbda3c43061
Diffstat (limited to 'compiler/utils/mips/assembler_mips.cc')
0 files changed, 0 insertions, 0 deletions