MIPS32: Fill branch delay slots

Test: booted MIPS32 in QEMU
Test: test-art-host-gtest
Test: test-art-target-gtest
Test: test-art-target-run-test-optimizing on CI20

Change-Id: I727e80753395ab99fff004cb5d2e0a06409150d7

1 files changed, 10 insertions, 0 deletions

diff --git a/compiler/utils/assembler.h b/compiler/utils/assembler.h
index 8981776314..b616057e79 100644
--- a/compiler/utils/assembler.h
+++ b/compiler/utils/assembler.h
@@ -362,6 +362,16 @@ class Assembler : public DeletableArenaObject<kArenaAllocAssembler> {
   // Size of generated code
   virtual size_t CodeSize() const { return buffer_.Size(); }
   virtual const uint8_t* CodeBufferBaseAddress() const { return buffer_.contents(); }
+  // CodePosition() is a non-const method similar to CodeSize(), which is used to
+  // record positions within the code buffer for the purpose of signal handling
+  // (stack overflow checks and implicit null checks may trigger signals and the
+  // signal handlers expect them right before the recorded positions).
+  // On most architectures CodePosition() should be equivalent to CodeSize(), but
+  // the MIPS assembler needs to be aware of this recording, so it doesn't put
+  // the instructions that can trigger signals into branch delay slots. Handling
+  // signals from instructions in delay slots is a bit problematic and should be
+  // avoided.
+  virtual size_t CodePosition() { return CodeSize(); }
 
   // Copy instructions out of assembly buffer into the given region of memory
   virtual void FinalizeInstructions(const MemoryRegion& region) {